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Linux/arch/alpha/include/asm/io.h

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  1 #ifndef __ALPHA_IO_H
  2 #define __ALPHA_IO_H
  3 
  4 #ifdef __KERNEL__
  5 
  6 #include <linux/kernel.h>
  7 #include <linux/mm.h>
  8 #include <asm/compiler.h>
  9 #include <asm/pgtable.h>
 10 #include <asm/machvec.h>
 11 #include <asm/hwrpb.h>
 12 
 13 /* The generic header contains only prototypes.  Including it ensures that
 14    the implementation we have here matches that interface.  */
 15 #include <asm-generic/iomap.h>
 16 
 17 /* We don't use IO slowdowns on the Alpha, but.. */
 18 #define __SLOW_DOWN_IO  do { } while (0)
 19 #define SLOW_DOWN_IO    do { } while (0)
 20 
 21 /*
 22  * Virtual -> physical identity mapping starts at this offset
 23  */
 24 #ifdef USE_48_BIT_KSEG
 25 #define IDENT_ADDR     0xffff800000000000UL
 26 #else
 27 #define IDENT_ADDR     0xfffffc0000000000UL
 28 #endif
 29 
 30 /*
 31  * We try to avoid hae updates (thus the cache), but when we
 32  * do need to update the hae, we need to do it atomically, so
 33  * that any interrupts wouldn't get confused with the hae
 34  * register not being up-to-date with respect to the hardware
 35  * value.
 36  */
 37 extern inline void __set_hae(unsigned long new_hae)
 38 {
 39         unsigned long flags = swpipl(IPL_MAX);
 40 
 41         barrier();
 42 
 43         alpha_mv.hae_cache = new_hae;
 44         *alpha_mv.hae_register = new_hae;
 45         mb();
 46         /* Re-read to make sure it was written.  */
 47         new_hae = *alpha_mv.hae_register;
 48 
 49         setipl(flags);
 50         barrier();
 51 }
 52 
 53 extern inline void set_hae(unsigned long new_hae)
 54 {
 55         if (new_hae != alpha_mv.hae_cache)
 56                 __set_hae(new_hae);
 57 }
 58 
 59 /*
 60  * Change virtual addresses to physical addresses and vv.
 61  */
 62 #ifdef USE_48_BIT_KSEG
 63 static inline unsigned long virt_to_phys(void *address)
 64 {
 65         return (unsigned long)address - IDENT_ADDR;
 66 }
 67 
 68 static inline void * phys_to_virt(unsigned long address)
 69 {
 70         return (void *) (address + IDENT_ADDR);
 71 }
 72 #else
 73 static inline unsigned long virt_to_phys(void *address)
 74 {
 75         unsigned long phys = (unsigned long)address;
 76 
 77         /* Sign-extend from bit 41.  */
 78         phys <<= (64 - 41);
 79         phys = (long)phys >> (64 - 41);
 80 
 81         /* Crop to the physical address width of the processor.  */
 82         phys &= (1ul << hwrpb->pa_bits) - 1;
 83 
 84         return phys;
 85 }
 86 
 87 static inline void * phys_to_virt(unsigned long address)
 88 {
 89         return (void *)(IDENT_ADDR + (address & ((1ul << 41) - 1)));
 90 }
 91 #endif
 92 
 93 #define page_to_phys(page)      page_to_pa(page)
 94 
 95 static inline dma_addr_t __deprecated isa_page_to_bus(struct page *page)
 96 {
 97         return page_to_phys(page);
 98 }
 99 
100 /* Maximum PIO space address supported?  */
101 #define IO_SPACE_LIMIT 0xffff
102 
103 /*
104  * Change addresses as seen by the kernel (virtual) to addresses as
105  * seen by a device (bus), and vice versa.
106  *
107  * Note that this only works for a limited range of kernel addresses,
108  * and very well may not span all memory.  Consider this interface 
109  * deprecated in favour of the DMA-mapping API.
110  */
111 extern unsigned long __direct_map_base;
112 extern unsigned long __direct_map_size;
113 
114 static inline unsigned long __deprecated virt_to_bus(void *address)
115 {
116         unsigned long phys = virt_to_phys(address);
117         unsigned long bus = phys + __direct_map_base;
118         return phys <= __direct_map_size ? bus : 0;
119 }
120 #define isa_virt_to_bus virt_to_bus
121 
122 static inline void * __deprecated bus_to_virt(unsigned long address)
123 {
124         void *virt;
125 
126         /* This check is a sanity check but also ensures that bus address 0
127            maps to virtual address 0 which is useful to detect null pointers
128            (the NCR driver is much simpler if NULL pointers are preserved).  */
129         address -= __direct_map_base;
130         virt = phys_to_virt(address);
131         return (long)address <= 0 ? NULL : virt;
132 }
133 #define isa_bus_to_virt bus_to_virt
134 
135 /*
136  * There are different chipsets to interface the Alpha CPUs to the world.
137  */
138 
139 #define IO_CONCAT(a,b)  _IO_CONCAT(a,b)
140 #define _IO_CONCAT(a,b) a ## _ ## b
141 
142 #ifdef CONFIG_ALPHA_GENERIC
143 
144 /* In a generic kernel, we always go through the machine vector.  */
145 
146 #define REMAP1(TYPE, NAME, QUAL)                                        \
147 static inline TYPE generic_##NAME(QUAL void __iomem *addr)              \
148 {                                                                       \
149         return alpha_mv.mv_##NAME(addr);                                \
150 }
151 
152 #define REMAP2(TYPE, NAME, QUAL)                                        \
153 static inline void generic_##NAME(TYPE b, QUAL void __iomem *addr)      \
154 {                                                                       \
155         alpha_mv.mv_##NAME(b, addr);                                    \
156 }
157 
158 REMAP1(unsigned int, ioread8, /**/)
159 REMAP1(unsigned int, ioread16, /**/)
160 REMAP1(unsigned int, ioread32, /**/)
161 REMAP1(u8, readb, const volatile)
162 REMAP1(u16, readw, const volatile)
163 REMAP1(u32, readl, const volatile)
164 REMAP1(u64, readq, const volatile)
165 
166 REMAP2(u8, iowrite8, /**/)
167 REMAP2(u16, iowrite16, /**/)
168 REMAP2(u32, iowrite32, /**/)
169 REMAP2(u8, writeb, volatile)
170 REMAP2(u16, writew, volatile)
171 REMAP2(u32, writel, volatile)
172 REMAP2(u64, writeq, volatile)
173 
174 #undef REMAP1
175 #undef REMAP2
176 
177 extern inline void __iomem *generic_ioportmap(unsigned long a)
178 {
179         return alpha_mv.mv_ioportmap(a);
180 }
181 
182 static inline void __iomem *generic_ioremap(unsigned long a, unsigned long s)
183 {
184         return alpha_mv.mv_ioremap(a, s);
185 }
186 
187 static inline void generic_iounmap(volatile void __iomem *a)
188 {
189         return alpha_mv.mv_iounmap(a);
190 }
191 
192 static inline int generic_is_ioaddr(unsigned long a)
193 {
194         return alpha_mv.mv_is_ioaddr(a);
195 }
196 
197 static inline int generic_is_mmio(const volatile void __iomem *a)
198 {
199         return alpha_mv.mv_is_mmio(a);
200 }
201 
202 #define __IO_PREFIX             generic
203 #define generic_trivial_rw_bw   0
204 #define generic_trivial_rw_lq   0
205 #define generic_trivial_io_bw   0
206 #define generic_trivial_io_lq   0
207 #define generic_trivial_iounmap 0
208 
209 #else
210 
211 #if defined(CONFIG_ALPHA_APECS)
212 # include <asm/core_apecs.h>
213 #elif defined(CONFIG_ALPHA_CIA)
214 # include <asm/core_cia.h>
215 #elif defined(CONFIG_ALPHA_IRONGATE)
216 # include <asm/core_irongate.h>
217 #elif defined(CONFIG_ALPHA_JENSEN)
218 # include <asm/jensen.h>
219 #elif defined(CONFIG_ALPHA_LCA)
220 # include <asm/core_lca.h>
221 #elif defined(CONFIG_ALPHA_MARVEL)
222 # include <asm/core_marvel.h>
223 #elif defined(CONFIG_ALPHA_MCPCIA)
224 # include <asm/core_mcpcia.h>
225 #elif defined(CONFIG_ALPHA_POLARIS)
226 # include <asm/core_polaris.h>
227 #elif defined(CONFIG_ALPHA_T2)
228 # include <asm/core_t2.h>
229 #elif defined(CONFIG_ALPHA_TSUNAMI)
230 # include <asm/core_tsunami.h>
231 #elif defined(CONFIG_ALPHA_TITAN)
232 # include <asm/core_titan.h>
233 #elif defined(CONFIG_ALPHA_WILDFIRE)
234 # include <asm/core_wildfire.h>
235 #else
236 #error "What system is this?"
237 #endif
238 
239 #endif /* GENERIC */
240 
241 /*
242  * We always have external versions of these routines.
243  */
244 extern u8               inb(unsigned long port);
245 extern u16              inw(unsigned long port);
246 extern u32              inl(unsigned long port);
247 extern void             outb(u8 b, unsigned long port);
248 extern void             outw(u16 b, unsigned long port);
249 extern void             outl(u32 b, unsigned long port);
250 
251 extern u8               readb(const volatile void __iomem *addr);
252 extern u16              readw(const volatile void __iomem *addr);
253 extern u32              readl(const volatile void __iomem *addr);
254 extern u64              readq(const volatile void __iomem *addr);
255 extern void             writeb(u8 b, volatile void __iomem *addr);
256 extern void             writew(u16 b, volatile void __iomem *addr);
257 extern void             writel(u32 b, volatile void __iomem *addr);
258 extern void             writeq(u64 b, volatile void __iomem *addr);
259 
260 extern u8               __raw_readb(const volatile void __iomem *addr);
261 extern u16              __raw_readw(const volatile void __iomem *addr);
262 extern u32              __raw_readl(const volatile void __iomem *addr);
263 extern u64              __raw_readq(const volatile void __iomem *addr);
264 extern void             __raw_writeb(u8 b, volatile void __iomem *addr);
265 extern void             __raw_writew(u16 b, volatile void __iomem *addr);
266 extern void             __raw_writel(u32 b, volatile void __iomem *addr);
267 extern void             __raw_writeq(u64 b, volatile void __iomem *addr);
268 
269 /*
270  * Mapping from port numbers to __iomem space is pretty easy.
271  */
272 
273 /* These two have to be extern inline because of the extern prototype from
274    <asm-generic/iomap.h>.  It is not legal to mix "extern" and "static" for
275    the same declaration.  */
276 extern inline void __iomem *ioport_map(unsigned long port, unsigned int size)
277 {
278         return IO_CONCAT(__IO_PREFIX,ioportmap) (port);
279 }
280 
281 extern inline void ioport_unmap(void __iomem *addr)
282 {
283 }
284 
285 static inline void __iomem *ioremap(unsigned long port, unsigned long size)
286 {
287         return IO_CONCAT(__IO_PREFIX,ioremap) (port, size);
288 }
289 
290 static inline void __iomem *__ioremap(unsigned long port, unsigned long size,
291                                       unsigned long flags)
292 {
293         return ioremap(port, size);
294 }
295 
296 static inline void __iomem * ioremap_nocache(unsigned long offset,
297                                              unsigned long size)
298 {
299         return ioremap(offset, size);
300 }
301 
302 #define ioremap_uc ioremap_nocache
303 
304 static inline void iounmap(volatile void __iomem *addr)
305 {
306         IO_CONCAT(__IO_PREFIX,iounmap)(addr);
307 }
308 
309 static inline int __is_ioaddr(unsigned long addr)
310 {
311         return IO_CONCAT(__IO_PREFIX,is_ioaddr)(addr);
312 }
313 #define __is_ioaddr(a)          __is_ioaddr((unsigned long)(a))
314 
315 static inline int __is_mmio(const volatile void __iomem *addr)
316 {
317         return IO_CONCAT(__IO_PREFIX,is_mmio)(addr);
318 }
319 
320 
321 /*
322  * If the actual I/O bits are sufficiently trivial, then expand inline.
323  */
324 
325 #if IO_CONCAT(__IO_PREFIX,trivial_io_bw)
326 extern inline unsigned int ioread8(void __iomem *addr)
327 {
328         unsigned int ret = IO_CONCAT(__IO_PREFIX,ioread8)(addr);
329         mb();
330         return ret;
331 }
332 
333 extern inline unsigned int ioread16(void __iomem *addr)
334 {
335         unsigned int ret = IO_CONCAT(__IO_PREFIX,ioread16)(addr);
336         mb();
337         return ret;
338 }
339 
340 extern inline void iowrite8(u8 b, void __iomem *addr)
341 {
342         IO_CONCAT(__IO_PREFIX,iowrite8)(b, addr);
343         mb();
344 }
345 
346 extern inline void iowrite16(u16 b, void __iomem *addr)
347 {
348         IO_CONCAT(__IO_PREFIX,iowrite16)(b, addr);
349         mb();
350 }
351 
352 extern inline u8 inb(unsigned long port)
353 {
354         return ioread8(ioport_map(port, 1));
355 }
356 
357 extern inline u16 inw(unsigned long port)
358 {
359         return ioread16(ioport_map(port, 2));
360 }
361 
362 extern inline void outb(u8 b, unsigned long port)
363 {
364         iowrite8(b, ioport_map(port, 1));
365 }
366 
367 extern inline void outw(u16 b, unsigned long port)
368 {
369         iowrite16(b, ioport_map(port, 2));
370 }
371 #endif
372 
373 #if IO_CONCAT(__IO_PREFIX,trivial_io_lq)
374 extern inline unsigned int ioread32(void __iomem *addr)
375 {
376         unsigned int ret = IO_CONCAT(__IO_PREFIX,ioread32)(addr);
377         mb();
378         return ret;
379 }
380 
381 extern inline void iowrite32(u32 b, void __iomem *addr)
382 {
383         IO_CONCAT(__IO_PREFIX,iowrite32)(b, addr);
384         mb();
385 }
386 
387 extern inline u32 inl(unsigned long port)
388 {
389         return ioread32(ioport_map(port, 4));
390 }
391 
392 extern inline void outl(u32 b, unsigned long port)
393 {
394         iowrite32(b, ioport_map(port, 4));
395 }
396 #endif
397 
398 #if IO_CONCAT(__IO_PREFIX,trivial_rw_bw) == 1
399 extern inline u8 __raw_readb(const volatile void __iomem *addr)
400 {
401         return IO_CONCAT(__IO_PREFIX,readb)(addr);
402 }
403 
404 extern inline u16 __raw_readw(const volatile void __iomem *addr)
405 {
406         return IO_CONCAT(__IO_PREFIX,readw)(addr);
407 }
408 
409 extern inline void __raw_writeb(u8 b, volatile void __iomem *addr)
410 {
411         IO_CONCAT(__IO_PREFIX,writeb)(b, addr);
412 }
413 
414 extern inline void __raw_writew(u16 b, volatile void __iomem *addr)
415 {
416         IO_CONCAT(__IO_PREFIX,writew)(b, addr);
417 }
418 
419 extern inline u8 readb(const volatile void __iomem *addr)
420 {
421         u8 ret = __raw_readb(addr);
422         mb();
423         return ret;
424 }
425 
426 extern inline u16 readw(const volatile void __iomem *addr)
427 {
428         u16 ret = __raw_readw(addr);
429         mb();
430         return ret;
431 }
432 
433 extern inline void writeb(u8 b, volatile void __iomem *addr)
434 {
435         __raw_writeb(b, addr);
436         mb();
437 }
438 
439 extern inline void writew(u16 b, volatile void __iomem *addr)
440 {
441         __raw_writew(b, addr);
442         mb();
443 }
444 #endif
445 
446 #if IO_CONCAT(__IO_PREFIX,trivial_rw_lq) == 1
447 extern inline u32 __raw_readl(const volatile void __iomem *addr)
448 {
449         return IO_CONCAT(__IO_PREFIX,readl)(addr);
450 }
451 
452 extern inline u64 __raw_readq(const volatile void __iomem *addr)
453 {
454         return IO_CONCAT(__IO_PREFIX,readq)(addr);
455 }
456 
457 extern inline void __raw_writel(u32 b, volatile void __iomem *addr)
458 {
459         IO_CONCAT(__IO_PREFIX,writel)(b, addr);
460 }
461 
462 extern inline void __raw_writeq(u64 b, volatile void __iomem *addr)
463 {
464         IO_CONCAT(__IO_PREFIX,writeq)(b, addr);
465 }
466 
467 extern inline u32 readl(const volatile void __iomem *addr)
468 {
469         u32 ret = __raw_readl(addr);
470         mb();
471         return ret;
472 }
473 
474 extern inline u64 readq(const volatile void __iomem *addr)
475 {
476         u64 ret = __raw_readq(addr);
477         mb();
478         return ret;
479 }
480 
481 extern inline void writel(u32 b, volatile void __iomem *addr)
482 {
483         __raw_writel(b, addr);
484         mb();
485 }
486 
487 extern inline void writeq(u64 b, volatile void __iomem *addr)
488 {
489         __raw_writeq(b, addr);
490         mb();
491 }
492 #endif
493 
494 #define ioread16be(p) be16_to_cpu(ioread16(p))
495 #define ioread32be(p) be32_to_cpu(ioread32(p))
496 #define iowrite16be(v,p) iowrite16(cpu_to_be16(v), (p))
497 #define iowrite32be(v,p) iowrite32(cpu_to_be32(v), (p))
498 
499 #define inb_p           inb
500 #define inw_p           inw
501 #define inl_p           inl
502 #define outb_p          outb
503 #define outw_p          outw
504 #define outl_p          outl
505 #define readb_relaxed(addr)     __raw_readb(addr)
506 #define readw_relaxed(addr)     __raw_readw(addr)
507 #define readl_relaxed(addr)     __raw_readl(addr)
508 #define readq_relaxed(addr)     __raw_readq(addr)
509 #define writeb_relaxed(b, addr) __raw_writeb(b, addr)
510 #define writew_relaxed(b, addr) __raw_writew(b, addr)
511 #define writel_relaxed(b, addr) __raw_writel(b, addr)
512 #define writeq_relaxed(b, addr) __raw_writeq(b, addr)
513 
514 #define mmiowb()
515 
516 /*
517  * String version of IO memory access ops:
518  */
519 extern void memcpy_fromio(void *, const volatile void __iomem *, long);
520 extern void memcpy_toio(volatile void __iomem *, const void *, long);
521 extern void _memset_c_io(volatile void __iomem *, unsigned long, long);
522 
523 static inline void memset_io(volatile void __iomem *addr, u8 c, long len)
524 {
525         _memset_c_io(addr, 0x0101010101010101UL * c, len);
526 }
527 
528 #define __HAVE_ARCH_MEMSETW_IO
529 static inline void memsetw_io(volatile void __iomem *addr, u16 c, long len)
530 {
531         _memset_c_io(addr, 0x0001000100010001UL * c, len);
532 }
533 
534 /*
535  * String versions of in/out ops:
536  */
537 extern void insb (unsigned long port, void *dst, unsigned long count);
538 extern void insw (unsigned long port, void *dst, unsigned long count);
539 extern void insl (unsigned long port, void *dst, unsigned long count);
540 extern void outsb (unsigned long port, const void *src, unsigned long count);
541 extern void outsw (unsigned long port, const void *src, unsigned long count);
542 extern void outsl (unsigned long port, const void *src, unsigned long count);
543 
544 /*
545  * The Alpha Jensen hardware for some rather strange reason puts
546  * the RTC clock at 0x170 instead of 0x70. Probably due to some
547  * misguided idea about using 0x70 for NMI stuff.
548  *
549  * These defines will override the defaults when doing RTC queries
550  */
551 
552 #ifdef CONFIG_ALPHA_GENERIC
553 # define RTC_PORT(x)    ((x) + alpha_mv.rtc_port)
554 #else
555 # ifdef CONFIG_ALPHA_JENSEN
556 #  define RTC_PORT(x)   (0x170+(x))
557 # else
558 #  define RTC_PORT(x)   (0x70 + (x))
559 # endif
560 #endif
561 #define RTC_ALWAYS_BCD  0
562 
563 /*
564  * Some mucking forons use if[n]def writeq to check if platform has it.
565  * It's a bloody bad idea and we probably want ARCH_HAS_WRITEQ for them
566  * to play with; for now just use cpp anti-recursion logics and make sure
567  * that damn thing is defined and expands to itself.
568  */
569 
570 #define writeq writeq
571 #define readq readq
572 
573 /*
574  * Convert a physical pointer to a virtual kernel pointer for /dev/mem
575  * access
576  */
577 #define xlate_dev_mem_ptr(p)    __va(p)
578 
579 /*
580  * Convert a virtual cached pointer to an uncached pointer
581  */
582 #define xlate_dev_kmem_ptr(p)   p
583 
584 #endif /* __KERNEL__ */
585 
586 #endif /* __ALPHA_IO_H */
587 

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