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Linux/arch/alpha/kernel/core_lca.c

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  1 // SPDX-License-Identifier: GPL-2.0
  2 /*
  3  *      linux/arch/alpha/kernel/core_lca.c
  4  *
  5  * Written by David Mosberger (davidm@cs.arizona.edu) with some code
  6  * taken from Dave Rusling's (david.rusling@reo.mts.dec.com) 32-bit
  7  * bios code.
  8  *
  9  * Code common to all LCA core logic chips.
 10  */
 11 
 12 #define __EXTERN_INLINE inline
 13 #include <asm/io.h>
 14 #include <asm/core_lca.h>
 15 #undef __EXTERN_INLINE
 16 
 17 #include <linux/types.h>
 18 #include <linux/pci.h>
 19 #include <linux/init.h>
 20 #include <linux/tty.h>
 21 
 22 #include <asm/ptrace.h>
 23 #include <asm/irq_regs.h>
 24 #include <asm/smp.h>
 25 
 26 #include "proto.h"
 27 #include "pci_impl.h"
 28 
 29 
 30 /*
 31  * BIOS32-style PCI interface:
 32  */
 33 
 34 /*
 35  * Machine check reasons.  Defined according to PALcode sources
 36  * (osf.h and platform.h).
 37  */
 38 #define MCHK_K_TPERR            0x0080
 39 #define MCHK_K_TCPERR           0x0082
 40 #define MCHK_K_HERR             0x0084
 41 #define MCHK_K_ECC_C            0x0086
 42 #define MCHK_K_ECC_NC           0x0088
 43 #define MCHK_K_UNKNOWN          0x008A
 44 #define MCHK_K_CACKSOFT         0x008C
 45 #define MCHK_K_BUGCHECK         0x008E
 46 #define MCHK_K_OS_BUGCHECK      0x0090
 47 #define MCHK_K_DCPERR           0x0092
 48 #define MCHK_K_ICPERR           0x0094
 49 
 50 
 51 /*
 52  * Platform-specific machine-check reasons:
 53  */
 54 #define MCHK_K_SIO_SERR         0x204   /* all platforms so far */
 55 #define MCHK_K_SIO_IOCHK        0x206   /* all platforms so far */
 56 #define MCHK_K_DCSR             0x208   /* all but Noname */
 57 
 58 
 59 /*
 60  * Given a bus, device, and function number, compute resulting
 61  * configuration space address and setup the LCA_IOC_CONF register
 62  * accordingly.  It is therefore not safe to have concurrent
 63  * invocations to configuration space access routines, but there
 64  * really shouldn't be any need for this.
 65  *
 66  * Type 0:
 67  *
 68  *  3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1 
 69  *  3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
 70  * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
 71  * | | | | | | | | | | | | | | | | | | | | | | | |F|F|F|R|R|R|R|R|R|0|0|
 72  * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
 73  *
 74  *      31:11   Device select bit.
 75  *      10:8    Function number
 76  *       7:2    Register number
 77  *
 78  * Type 1:
 79  *
 80  *  3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1 
 81  *  3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
 82  * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
 83  * | | | | | | | | | | |B|B|B|B|B|B|B|B|D|D|D|D|D|F|F|F|R|R|R|R|R|R|0|1|
 84  * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
 85  *
 86  *      31:24   reserved
 87  *      23:16   bus number (8 bits = 128 possible buses)
 88  *      15:11   Device number (5 bits)
 89  *      10:8    function number
 90  *       7:2    register number
 91  *  
 92  * Notes:
 93  *      The function number selects which function of a multi-function device 
 94  *      (e.g., SCSI and Ethernet).
 95  * 
 96  *      The register selects a DWORD (32 bit) register offset.  Hence it
 97  *      doesn't get shifted by 2 bits as we want to "drop" the bottom two
 98  *      bits.
 99  */
100 
101 static int
102 mk_conf_addr(struct pci_bus *pbus, unsigned int device_fn, int where,
103              unsigned long *pci_addr)
104 {
105         unsigned long addr;
106         u8 bus = pbus->number;
107 
108         if (bus == 0) {
109                 int device = device_fn >> 3;
110                 int func = device_fn & 0x7;
111 
112                 /* Type 0 configuration cycle.  */
113 
114                 if (device > 12) {
115                         return -1;
116                 }
117 
118                 *(vulp)LCA_IOC_CONF = 0;
119                 addr = (1 << (11 + device)) | (func << 8) | where;
120         } else {
121                 /* Type 1 configuration cycle.  */
122                 *(vulp)LCA_IOC_CONF = 1;
123                 addr = (bus << 16) | (device_fn << 8) | where;
124         }
125         *pci_addr = addr;
126         return 0;
127 }
128 
129 static unsigned int
130 conf_read(unsigned long addr)
131 {
132         unsigned long flags, code, stat0;
133         unsigned int value;
134 
135         local_irq_save(flags);
136 
137         /* Reset status register to avoid losing errors.  */
138         stat0 = *(vulp)LCA_IOC_STAT0;
139         *(vulp)LCA_IOC_STAT0 = stat0;
140         mb();
141 
142         /* Access configuration space.  */
143         value = *(vuip)addr;
144         draina();
145 
146         stat0 = *(vulp)LCA_IOC_STAT0;
147         if (stat0 & LCA_IOC_STAT0_ERR) {
148                 code = ((stat0 >> LCA_IOC_STAT0_CODE_SHIFT)
149                         & LCA_IOC_STAT0_CODE_MASK);
150                 if (code != 1) {
151                         printk("lca.c:conf_read: got stat0=%lx\n", stat0);
152                 }
153 
154                 /* Reset error status.  */
155                 *(vulp)LCA_IOC_STAT0 = stat0;
156                 mb();
157 
158                 /* Reset machine check.  */
159                 wrmces(0x7);
160 
161                 value = 0xffffffff;
162         }
163         local_irq_restore(flags);
164         return value;
165 }
166 
167 static void
168 conf_write(unsigned long addr, unsigned int value)
169 {
170         unsigned long flags, code, stat0;
171 
172         local_irq_save(flags);  /* avoid getting hit by machine check */
173 
174         /* Reset status register to avoid losing errors.  */
175         stat0 = *(vulp)LCA_IOC_STAT0;
176         *(vulp)LCA_IOC_STAT0 = stat0;
177         mb();
178 
179         /* Access configuration space.  */
180         *(vuip)addr = value;
181         draina();
182 
183         stat0 = *(vulp)LCA_IOC_STAT0;
184         if (stat0 & LCA_IOC_STAT0_ERR) {
185                 code = ((stat0 >> LCA_IOC_STAT0_CODE_SHIFT)
186                         & LCA_IOC_STAT0_CODE_MASK);
187                 if (code != 1) {
188                         printk("lca.c:conf_write: got stat0=%lx\n", stat0);
189                 }
190 
191                 /* Reset error status.  */
192                 *(vulp)LCA_IOC_STAT0 = stat0;
193                 mb();
194 
195                 /* Reset machine check. */
196                 wrmces(0x7);
197         }
198         local_irq_restore(flags);
199 }
200 
201 static int
202 lca_read_config(struct pci_bus *bus, unsigned int devfn, int where,
203                 int size, u32 *value)
204 {
205         unsigned long addr, pci_addr;
206         long mask;
207         int shift;
208 
209         if (mk_conf_addr(bus, devfn, where, &pci_addr))
210                 return PCIBIOS_DEVICE_NOT_FOUND;
211 
212         shift = (where & 3) * 8;
213         mask = (size - 1) * 8;
214         addr = (pci_addr << 5) + mask + LCA_CONF;
215         *value = conf_read(addr) >> (shift);
216         return PCIBIOS_SUCCESSFUL;
217 }
218 
219 static int 
220 lca_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size,
221                  u32 value)
222 {
223         unsigned long addr, pci_addr;
224         long mask;
225 
226         if (mk_conf_addr(bus, devfn, where, &pci_addr))
227                 return PCIBIOS_DEVICE_NOT_FOUND;
228 
229         mask = (size - 1) * 8;
230         addr = (pci_addr << 5) + mask + LCA_CONF;
231         conf_write(addr, value << ((where & 3) * 8));
232         return PCIBIOS_SUCCESSFUL;
233 }
234 
235 struct pci_ops lca_pci_ops = 
236 {
237         .read =         lca_read_config,
238         .write =        lca_write_config,
239 };
240 
241 void
242 lca_pci_tbi(struct pci_controller *hose, dma_addr_t start, dma_addr_t end)
243 {
244         wmb();
245         *(vulp)LCA_IOC_TBIA = 0;
246         mb();
247 }
248 
249 void __init
250 lca_init_arch(void)
251 {
252         struct pci_controller *hose;
253 
254         /*
255          * Create our single hose.
256          */
257 
258         pci_isa_hose = hose = alloc_pci_controller();
259         hose->io_space = &ioport_resource;
260         hose->mem_space = &iomem_resource;
261         hose->index = 0;
262 
263         hose->sparse_mem_base = LCA_SPARSE_MEM - IDENT_ADDR;
264         hose->dense_mem_base = LCA_DENSE_MEM - IDENT_ADDR;
265         hose->sparse_io_base = LCA_IO - IDENT_ADDR;
266         hose->dense_io_base = 0;
267 
268         /*
269          * Set up the PCI to main memory translation windows.
270          *
271          * Mimic the SRM settings for the direct-map window.
272          *   Window 0 is scatter-gather 8MB at 8MB (for isa).
273          *   Window 1 is direct access 1GB at 1GB.
274          *
275          * Note that we do not try to save any of the DMA window CSRs
276          * before setting them, since we cannot read those CSRs on LCA.
277          */
278         hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 0);
279         hose->sg_pci = NULL;
280         __direct_map_base = 0x40000000;
281         __direct_map_size = 0x40000000;
282 
283         *(vulp)LCA_IOC_W_BASE0 = hose->sg_isa->dma_base | (3UL << 32);
284         *(vulp)LCA_IOC_W_MASK0 = (hose->sg_isa->size - 1) & 0xfff00000;
285         *(vulp)LCA_IOC_T_BASE0 = virt_to_phys(hose->sg_isa->ptes);
286 
287         *(vulp)LCA_IOC_W_BASE1 = __direct_map_base | (2UL << 32);
288         *(vulp)LCA_IOC_W_MASK1 = (__direct_map_size - 1) & 0xfff00000;
289         *(vulp)LCA_IOC_T_BASE1 = 0;
290 
291         *(vulp)LCA_IOC_TB_ENA = 0x80;
292 
293         lca_pci_tbi(hose, 0, -1);
294 
295         /*
296          * Disable PCI parity for now.  The NCR53c810 chip has
297          * troubles meeting the PCI spec which results in
298          * data parity errors.
299          */
300         *(vulp)LCA_IOC_PAR_DIS = 1UL<<5;
301 
302         /*
303          * Finally, set up for restoring the correct HAE if using SRM.
304          * Again, since we cannot read many of the CSRs on the LCA,
305          * one of which happens to be the HAE, we save the value that
306          * the SRM will expect...
307          */
308         if (alpha_using_srm)
309                 srm_hae = 0x80000000UL;
310 }
311 
312 /*
313  * Constants used during machine-check handling.  I suppose these
314  * could be moved into lca.h but I don't see much reason why anybody
315  * else would want to use them.
316  */
317 
318 #define ESR_EAV         (1UL<< 0)       /* error address valid */
319 #define ESR_CEE         (1UL<< 1)       /* correctable error */
320 #define ESR_UEE         (1UL<< 2)       /* uncorrectable error */
321 #define ESR_WRE         (1UL<< 3)       /* write-error */
322 #define ESR_SOR         (1UL<< 4)       /* error source */
323 #define ESR_CTE         (1UL<< 7)       /* cache-tag error */
324 #define ESR_MSE         (1UL<< 9)       /* multiple soft errors */
325 #define ESR_MHE         (1UL<<10)       /* multiple hard errors */
326 #define ESR_NXM         (1UL<<12)       /* non-existent memory */
327 
328 #define IOC_ERR         (  1<<4)        /* ioc logs an error */
329 #define IOC_CMD_SHIFT   0
330 #define IOC_CMD         (0xf<<IOC_CMD_SHIFT)
331 #define IOC_CODE_SHIFT  8
332 #define IOC_CODE        (0xf<<IOC_CODE_SHIFT)
333 #define IOC_LOST        (  1<<5)
334 #define IOC_P_NBR       ((__u32) ~((1<<13) - 1))
335 
336 static void
337 mem_error(unsigned long esr, unsigned long ear)
338 {
339         printk("    %s %s error to %s occurred at address %x\n",
340                ((esr & ESR_CEE) ? "Correctable" :
341                 (esr & ESR_UEE) ? "Uncorrectable" : "A"),
342                (esr & ESR_WRE) ? "write" : "read",
343                (esr & ESR_SOR) ? "memory" : "b-cache",
344                (unsigned) (ear & 0x1ffffff8));
345         if (esr & ESR_CTE) {
346                 printk("    A b-cache tag parity error was detected.\n");
347         }
348         if (esr & ESR_MSE) {
349                 printk("    Several other correctable errors occurred.\n");
350         }
351         if (esr & ESR_MHE) {
352                 printk("    Several other uncorrectable errors occurred.\n");
353         }
354         if (esr & ESR_NXM) {
355                 printk("    Attempted to access non-existent memory.\n");
356         }
357 }
358 
359 static void
360 ioc_error(__u32 stat0, __u32 stat1)
361 {
362         static const char * const pci_cmd[] = {
363                 "Interrupt Acknowledge", "Special", "I/O Read", "I/O Write",
364                 "Rsvd 1", "Rsvd 2", "Memory Read", "Memory Write", "Rsvd3",
365                 "Rsvd4", "Configuration Read", "Configuration Write",
366                 "Memory Read Multiple", "Dual Address", "Memory Read Line",
367                 "Memory Write and Invalidate"
368         };
369         static const char * const err_name[] = {
370                 "exceeded retry limit", "no device", "bad data parity",
371                 "target abort", "bad address parity", "page table read error",
372                 "invalid page", "data error"
373         };
374         unsigned code = (stat0 & IOC_CODE) >> IOC_CODE_SHIFT;
375         unsigned cmd  = (stat0 & IOC_CMD)  >> IOC_CMD_SHIFT;
376 
377         printk("    %s initiated PCI %s cycle to address %x"
378                " failed due to %s.\n",
379                code > 3 ? "PCI" : "CPU", pci_cmd[cmd], stat1, err_name[code]);
380 
381         if (code == 5 || code == 6) {
382                 printk("    (Error occurred at PCI memory address %x.)\n",
383                        (stat0 & ~IOC_P_NBR));
384         }
385         if (stat0 & IOC_LOST) {
386                 printk("    Other PCI errors occurred simultaneously.\n");
387         }
388 }
389 
390 void
391 lca_machine_check(unsigned long vector, unsigned long la_ptr)
392 {
393         const char * reason;
394         union el_lca el;
395 
396         el.c = (struct el_common *) la_ptr;
397 
398         wrmces(rdmces());       /* reset machine check pending flag */
399 
400         printk(KERN_CRIT "LCA machine check: vector=%#lx pc=%#lx code=%#x\n",
401                vector, get_irq_regs()->pc, (unsigned int) el.c->code);
402 
403         /*
404          * The first quadword after the common header always seems to
405          * be the machine check reason---don't know why this isn't
406          * part of the common header instead.  In the case of a long
407          * logout frame, the upper 32 bits is the machine check
408          * revision level, which we ignore for now.
409          */
410         switch ((unsigned int) el.c->code) {
411         case MCHK_K_TPERR:      reason = "tag parity error"; break;
412         case MCHK_K_TCPERR:     reason = "tag control parity error"; break;
413         case MCHK_K_HERR:       reason = "access to non-existent memory"; break;
414         case MCHK_K_ECC_C:      reason = "correctable ECC error"; break;
415         case MCHK_K_ECC_NC:     reason = "non-correctable ECC error"; break;
416         case MCHK_K_CACKSOFT:   reason = "MCHK_K_CACKSOFT"; break;
417         case MCHK_K_BUGCHECK:   reason = "illegal exception in PAL mode"; break;
418         case MCHK_K_OS_BUGCHECK: reason = "callsys in kernel mode"; break;
419         case MCHK_K_DCPERR:     reason = "d-cache parity error"; break;
420         case MCHK_K_ICPERR:     reason = "i-cache parity error"; break;
421         case MCHK_K_SIO_SERR:   reason = "SIO SERR occurred on PCI bus"; break;
422         case MCHK_K_SIO_IOCHK:  reason = "SIO IOCHK occurred on ISA bus"; break;
423         case MCHK_K_DCSR:       reason = "MCHK_K_DCSR"; break;
424         case MCHK_K_UNKNOWN:
425         default:                reason = "unknown"; break;
426         }
427 
428         switch (el.c->size) {
429         case sizeof(struct el_lca_mcheck_short):
430                 printk(KERN_CRIT
431                        "  Reason: %s (short frame%s, dc_stat=%#lx):\n",
432                        reason, el.c->retry ? ", retryable" : "",
433                        el.s->dc_stat);
434                 if (el.s->esr & ESR_EAV) {
435                         mem_error(el.s->esr, el.s->ear);
436                 }
437                 if (el.s->ioc_stat0 & IOC_ERR) {
438                         ioc_error(el.s->ioc_stat0, el.s->ioc_stat1);
439                 }
440                 break;
441 
442         case sizeof(struct el_lca_mcheck_long):
443                 printk(KERN_CRIT "  Reason: %s (long frame%s):\n",
444                        reason, el.c->retry ? ", retryable" : "");
445                 printk(KERN_CRIT
446                        "    reason: %#lx  exc_addr: %#lx  dc_stat: %#lx\n", 
447                        el.l->pt[0], el.l->exc_addr, el.l->dc_stat);
448                 printk(KERN_CRIT "    car: %#lx\n", el.l->car);
449                 if (el.l->esr & ESR_EAV) {
450                         mem_error(el.l->esr, el.l->ear);
451                 }
452                 if (el.l->ioc_stat0 & IOC_ERR) {
453                         ioc_error(el.l->ioc_stat0, el.l->ioc_stat1);
454                 }
455                 break;
456 
457         default:
458                 printk(KERN_CRIT "  Unknown errorlog size %d\n", el.c->size);
459         }
460 
461         /* Dump the logout area to give all info.  */
462 #ifdef CONFIG_VERBOSE_MCHECK
463         if (alpha_verbose_mcheck > 1) {
464                 unsigned long * ptr = (unsigned long *) la_ptr;
465                 long i;
466                 for (i = 0; i < el.c->size / sizeof(long); i += 2) {
467                         printk(KERN_CRIT " +%8lx %016lx %016lx\n",
468                                i*sizeof(long), ptr[i], ptr[i+1]);
469                 }
470         }
471 #endif /* CONFIG_VERBOSE_MCHECK */
472 }
473 
474 /*
475  * The following routines are needed to support the SPEED changing
476  * necessary to successfully manage the thermal problem on the AlphaBook1.
477  */
478 
479 void
480 lca_clock_print(void)
481 {
482         long    pmr_reg;
483 
484         pmr_reg = LCA_READ_PMR;
485 
486         printk("Status of clock control:\n");
487         printk("\tPrimary clock divisor\t0x%lx\n", LCA_GET_PRIMARY(pmr_reg));
488         printk("\tOverride clock divisor\t0x%lx\n", LCA_GET_OVERRIDE(pmr_reg));
489         printk("\tInterrupt override is %s\n",
490                (pmr_reg & LCA_PMR_INTO) ? "on" : "off"); 
491         printk("\tDMA override is %s\n",
492                (pmr_reg & LCA_PMR_DMAO) ? "on" : "off"); 
493 
494 }
495 
496 int
497 lca_get_clock(void)
498 {
499         long    pmr_reg;
500 
501         pmr_reg = LCA_READ_PMR;
502         return(LCA_GET_PRIMARY(pmr_reg));
503 
504 }
505 
506 void
507 lca_clock_fiddle(int divisor)
508 {
509         long    pmr_reg;
510 
511         pmr_reg = LCA_READ_PMR;
512         LCA_SET_PRIMARY_CLOCK(pmr_reg, divisor);
513         /* lca_norm_clock = divisor; */
514         LCA_WRITE_PMR(pmr_reg);
515         mb();
516 }
517 

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