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Linux/arch/arc/include/asm/cacheflush.h

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  1 /*
  2  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
  3  *
  4  * This program is free software; you can redistribute it and/or modify
  5  * it under the terms of the GNU General Public License version 2 as
  6  * published by the Free Software Foundation.
  7  *
  8  *  vineetg: May 2011: for Non-aliasing VIPT D-cache following can be NOPs
  9  *   -flush_cache_dup_mm (fork)
 10  *   -likewise for flush_cache_mm (exit/execve)
 11  *   -likewise for flush_cache_{range,page} (munmap, exit, COW-break)
 12  *
 13  *  vineetg: April 2008
 14  *   -Added a critical CacheLine flush to copy_to_user_page( ) which
 15  *     was causing gdbserver to not setup breakpoints consistently
 16  */
 17 
 18 #ifndef _ASM_CACHEFLUSH_H
 19 #define _ASM_CACHEFLUSH_H
 20 
 21 #include <linux/mm.h>
 22 #include <asm/shmparam.h>
 23 
 24 /*
 25  * Semantically we need this because icache doesn't snoop dcache/dma.
 26  * However ARC Cache flush requires paddr as well as vaddr, latter not available
 27  * in the flush_icache_page() API. So we no-op it but do the equivalent work
 28  * in update_mmu_cache()
 29  */
 30 #define flush_icache_page(vma, page)
 31 
 32 void flush_cache_all(void);
 33 
 34 void flush_icache_range(unsigned long kstart, unsigned long kend);
 35 void __sync_icache_dcache(phys_addr_t paddr, unsigned long vaddr, int len);
 36 void __inv_icache_page(phys_addr_t paddr, unsigned long vaddr);
 37 void __flush_dcache_page(phys_addr_t paddr, unsigned long vaddr);
 38 
 39 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
 40 
 41 void flush_dcache_page(struct page *page);
 42 
 43 void dma_cache_wback_inv(phys_addr_t start, unsigned long sz);
 44 void dma_cache_inv(phys_addr_t start, unsigned long sz);
 45 void dma_cache_wback(phys_addr_t start, unsigned long sz);
 46 
 47 #define flush_dcache_mmap_lock(mapping)         do { } while (0)
 48 #define flush_dcache_mmap_unlock(mapping)       do { } while (0)
 49 
 50 /* TBD: optimize this */
 51 #define flush_cache_vmap(start, end)            flush_cache_all()
 52 #define flush_cache_vunmap(start, end)          flush_cache_all()
 53 
 54 #define flush_cache_dup_mm(mm)                  /* called on fork (VIVT only) */
 55 
 56 #ifndef CONFIG_ARC_CACHE_VIPT_ALIASING
 57 
 58 #define flush_cache_mm(mm)                      /* called on munmap/exit */
 59 #define flush_cache_range(mm, u_vstart, u_vend)
 60 #define flush_cache_page(vma, u_vaddr, pfn)     /* PF handling/COW-break */
 61 
 62 #else   /* VIPT aliasing dcache */
 63 
 64 /* To clear out stale userspace mappings */
 65 void flush_cache_mm(struct mm_struct *mm);
 66 void flush_cache_range(struct vm_area_struct *vma,
 67         unsigned long start,unsigned long end);
 68 void flush_cache_page(struct vm_area_struct *vma,
 69         unsigned long user_addr, unsigned long page);
 70 
 71 /*
 72  * To make sure that userspace mapping is flushed to memory before
 73  * get_user_pages() uses a kernel mapping to access the page
 74  */
 75 #define ARCH_HAS_FLUSH_ANON_PAGE
 76 void flush_anon_page(struct vm_area_struct *vma,
 77         struct page *page, unsigned long u_vaddr);
 78 
 79 #endif  /* CONFIG_ARC_CACHE_VIPT_ALIASING */
 80 
 81 /*
 82  * A new pagecache page has PG_arch_1 clear - thus dcache dirty by default
 83  * This works around some PIO based drivers which don't call flush_dcache_page
 84  * to record that they dirtied the dcache
 85  */
 86 #define PG_dc_clean     PG_arch_1
 87 
 88 #define CACHE_COLORS_NUM        4
 89 #define CACHE_COLORS_MSK        (CACHE_COLORS_NUM - 1)
 90 #define CACHE_COLOR(addr)       (((unsigned long)(addr) >> (PAGE_SHIFT)) & CACHE_COLORS_MSK)
 91 
 92 /*
 93  * Simple wrapper over config option
 94  * Bootup code ensures that hardware matches kernel configuration
 95  */
 96 static inline int cache_is_vipt_aliasing(void)
 97 {
 98         return IS_ENABLED(CONFIG_ARC_CACHE_VIPT_ALIASING);
 99 }
100 
101 /*
102  * checks if two addresses (after page aligning) index into same cache set
103  */
104 #define addr_not_cache_congruent(addr1, addr2)                          \
105 ({                                                                      \
106         cache_is_vipt_aliasing() ?                                      \
107                 (CACHE_COLOR(addr1) != CACHE_COLOR(addr2)) : 0;         \
108 })
109 
110 #define copy_to_user_page(vma, page, vaddr, dst, src, len)              \
111 do {                                                                    \
112         memcpy(dst, src, len);                                          \
113         if (vma->vm_flags & VM_EXEC)                                    \
114                 __sync_icache_dcache((unsigned long)(dst), vaddr, len); \
115 } while (0)
116 
117 #define copy_from_user_page(vma, page, vaddr, dst, src, len)            \
118         memcpy(dst, src, len);                                          \
119 
120 #endif
121 

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