~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

TOMOYO Linux Cross Reference
Linux/arch/arm/mach-davinci/devices-da8xx.c

Version: ~ [ linux-5.9-rc6 ] ~ [ linux-5.8.10 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.66 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.146 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.198 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.236 ] ~ [ linux-4.8.17 ] ~ [ linux-4.7.10 ] ~ [ linux-4.6.7 ] ~ [ linux-4.5.7 ] ~ [ linux-4.4.236 ] ~ [ linux-4.3.6 ] ~ [ linux-4.2.8 ] ~ [ linux-4.1.52 ] ~ [ linux-4.0.9 ] ~ [ linux-3.19.8 ] ~ [ linux-3.18.140 ] ~ [ linux-3.17.8 ] ~ [ linux-3.16.85 ] ~ [ linux-3.15.10 ] ~ [ linux-3.14.79 ] ~ [ linux-3.13.11 ] ~ [ linux-3.12.74 ] ~ [ linux-3.11.10 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.5 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 /*
  2  * DA8XX/OMAP L1XX platform device data
  3  *
  4  * Copyright (c) 2007-2009, MontaVista Software, Inc. <source@mvista.com>
  5  * Derived from code that was:
  6  *      Copyright (C) 2006 Komal Shah <komal_shah802003@yahoo.com>
  7  *
  8  * This program is free software; you can redistribute it and/or modify
  9  * it under the terms of the GNU General Public License as published by
 10  * the Free Software Foundation; either version 2 of the License, or
 11  * (at your option) any later version.
 12  */
 13 #include <linux/init.h>
 14 #include <linux/platform_device.h>
 15 #include <linux/dma-contiguous.h>
 16 #include <linux/serial_8250.h>
 17 #include <linux/ahci_platform.h>
 18 #include <linux/clk.h>
 19 #include <linux/reboot.h>
 20 #include <linux/dmaengine.h>
 21 
 22 #include <mach/cputype.h>
 23 #include <mach/common.h>
 24 #include <mach/time.h>
 25 #include <mach/da8xx.h>
 26 #include "cpuidle.h"
 27 #include "sram.h"
 28 
 29 #include "clock.h"
 30 #include "asp.h"
 31 
 32 #define DA8XX_TPCC_BASE                 0x01c00000
 33 #define DA8XX_TPTC0_BASE                0x01c08000
 34 #define DA8XX_TPTC1_BASE                0x01c08400
 35 #define DA8XX_WDOG_BASE                 0x01c21000 /* DA8XX_TIMER64P1_BASE */
 36 #define DA8XX_I2C0_BASE                 0x01c22000
 37 #define DA8XX_RTC_BASE                  0x01c23000
 38 #define DA8XX_PRUSS_MEM_BASE            0x01c30000
 39 #define DA8XX_MMCSD0_BASE               0x01c40000
 40 #define DA8XX_SPI0_BASE                 0x01c41000
 41 #define DA830_SPI1_BASE                 0x01e12000
 42 #define DA8XX_LCD_CNTRL_BASE            0x01e13000
 43 #define DA850_SATA_BASE                 0x01e18000
 44 #define DA850_MMCSD1_BASE               0x01e1b000
 45 #define DA8XX_EMAC_CPPI_PORT_BASE       0x01e20000
 46 #define DA8XX_EMAC_CPGMACSS_BASE        0x01e22000
 47 #define DA8XX_EMAC_CPGMAC_BASE          0x01e23000
 48 #define DA8XX_EMAC_MDIO_BASE            0x01e24000
 49 #define DA8XX_I2C1_BASE                 0x01e28000
 50 #define DA850_TPCC1_BASE                0x01e30000
 51 #define DA850_TPTC2_BASE                0x01e38000
 52 #define DA850_SPI1_BASE                 0x01f0e000
 53 #define DA8XX_DDR2_CTL_BASE             0xb0000000
 54 
 55 #define DA8XX_EMAC_CTRL_REG_OFFSET      0x3000
 56 #define DA8XX_EMAC_MOD_REG_OFFSET       0x2000
 57 #define DA8XX_EMAC_RAM_OFFSET           0x0000
 58 #define DA8XX_EMAC_CTRL_RAM_SIZE        SZ_8K
 59 
 60 #define DA8XX_DMA_SPI0_RX       EDMA_CTLR_CHAN(0, 14)
 61 #define DA8XX_DMA_SPI0_TX       EDMA_CTLR_CHAN(0, 15)
 62 #define DA8XX_DMA_MMCSD0_RX     EDMA_CTLR_CHAN(0, 16)
 63 #define DA8XX_DMA_MMCSD0_TX     EDMA_CTLR_CHAN(0, 17)
 64 #define DA8XX_DMA_SPI1_RX       EDMA_CTLR_CHAN(0, 18)
 65 #define DA8XX_DMA_SPI1_TX       EDMA_CTLR_CHAN(0, 19)
 66 #define DA850_DMA_MMCSD1_RX     EDMA_CTLR_CHAN(1, 28)
 67 #define DA850_DMA_MMCSD1_TX     EDMA_CTLR_CHAN(1, 29)
 68 
 69 void __iomem *da8xx_syscfg0_base;
 70 void __iomem *da8xx_syscfg1_base;
 71 
 72 static struct plat_serial8250_port da8xx_serial0_pdata[] = {
 73         {
 74                 .mapbase        = DA8XX_UART0_BASE,
 75                 .irq            = IRQ_DA8XX_UARTINT0,
 76                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
 77                                         UPF_IOREMAP,
 78                 .iotype         = UPIO_MEM,
 79                 .regshift       = 2,
 80         },
 81         {
 82                 .flags  = 0,
 83         }
 84 };
 85 static struct plat_serial8250_port da8xx_serial1_pdata[] = {
 86         {
 87                 .mapbase        = DA8XX_UART1_BASE,
 88                 .irq            = IRQ_DA8XX_UARTINT1,
 89                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
 90                                         UPF_IOREMAP,
 91                 .iotype         = UPIO_MEM,
 92                 .regshift       = 2,
 93         },
 94         {
 95                 .flags  = 0,
 96         }
 97 };
 98 static struct plat_serial8250_port da8xx_serial2_pdata[] = {
 99         {
100                 .mapbase        = DA8XX_UART2_BASE,
101                 .irq            = IRQ_DA8XX_UARTINT2,
102                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
103                                         UPF_IOREMAP,
104                 .iotype         = UPIO_MEM,
105                 .regshift       = 2,
106         },
107         {
108                 .flags  = 0,
109         }
110 };
111 
112 struct platform_device da8xx_serial_device[] = {
113         {
114                 .name   = "serial8250",
115                 .id     = PLAT8250_DEV_PLATFORM,
116                 .dev    = {
117                         .platform_data  = da8xx_serial0_pdata,
118                 }
119         },
120         {
121                 .name   = "serial8250",
122                 .id     = PLAT8250_DEV_PLATFORM1,
123                 .dev    = {
124                         .platform_data  = da8xx_serial1_pdata,
125                 }
126         },
127         {
128                 .name   = "serial8250",
129                 .id     = PLAT8250_DEV_PLATFORM2,
130                 .dev    = {
131                         .platform_data  = da8xx_serial2_pdata,
132                 }
133         },
134         {
135         }
136 };
137 
138 static s8 da8xx_queue_priority_mapping[][2] = {
139         /* {event queue no, Priority} */
140         {0, 3},
141         {1, 7},
142         {-1, -1}
143 };
144 
145 static s8 da850_queue_priority_mapping[][2] = {
146         /* {event queue no, Priority} */
147         {0, 3},
148         {-1, -1}
149 };
150 
151 static struct edma_soc_info da8xx_edma0_pdata = {
152         .queue_priority_mapping = da8xx_queue_priority_mapping,
153         .default_queue          = EVENTQ_1,
154 };
155 
156 static struct edma_soc_info da850_edma1_pdata = {
157         .queue_priority_mapping = da850_queue_priority_mapping,
158         .default_queue          = EVENTQ_0,
159 };
160 
161 static struct resource da8xx_edma0_resources[] = {
162         {
163                 .name   = "edma3_cc",
164                 .start  = DA8XX_TPCC_BASE,
165                 .end    = DA8XX_TPCC_BASE + SZ_32K - 1,
166                 .flags  = IORESOURCE_MEM,
167         },
168         {
169                 .name   = "edma3_tc0",
170                 .start  = DA8XX_TPTC0_BASE,
171                 .end    = DA8XX_TPTC0_BASE + SZ_1K - 1,
172                 .flags  = IORESOURCE_MEM,
173         },
174         {
175                 .name   = "edma3_tc1",
176                 .start  = DA8XX_TPTC1_BASE,
177                 .end    = DA8XX_TPTC1_BASE + SZ_1K - 1,
178                 .flags  = IORESOURCE_MEM,
179         },
180         {
181                 .name   = "edma3_ccint",
182                 .start  = IRQ_DA8XX_CCINT0,
183                 .flags  = IORESOURCE_IRQ,
184         },
185         {
186                 .name   = "edma3_ccerrint",
187                 .start  = IRQ_DA8XX_CCERRINT,
188                 .flags  = IORESOURCE_IRQ,
189         },
190 };
191 
192 static struct resource da850_edma1_resources[] = {
193         {
194                 .name   = "edma3_cc",
195                 .start  = DA850_TPCC1_BASE,
196                 .end    = DA850_TPCC1_BASE + SZ_32K - 1,
197                 .flags  = IORESOURCE_MEM,
198         },
199         {
200                 .name   = "edma3_tc0",
201                 .start  = DA850_TPTC2_BASE,
202                 .end    = DA850_TPTC2_BASE + SZ_1K - 1,
203                 .flags  = IORESOURCE_MEM,
204         },
205         {
206                 .name   = "edma3_ccint",
207                 .start  = IRQ_DA850_CCINT1,
208                 .flags  = IORESOURCE_IRQ,
209         },
210         {
211                 .name   = "edma3_ccerrint",
212                 .start  = IRQ_DA850_CCERRINT1,
213                 .flags  = IORESOURCE_IRQ,
214         },
215 };
216 
217 static const struct platform_device_info da8xx_edma0_device __initconst = {
218         .name           = "edma",
219         .id             = 0,
220         .dma_mask       = DMA_BIT_MASK(32),
221         .res            = da8xx_edma0_resources,
222         .num_res        = ARRAY_SIZE(da8xx_edma0_resources),
223         .data           = &da8xx_edma0_pdata,
224         .size_data      = sizeof(da8xx_edma0_pdata),
225 };
226 
227 static const struct platform_device_info da850_edma1_device __initconst = {
228         .name           = "edma",
229         .id             = 1,
230         .dma_mask       = DMA_BIT_MASK(32),
231         .res            = da850_edma1_resources,
232         .num_res        = ARRAY_SIZE(da850_edma1_resources),
233         .data           = &da850_edma1_pdata,
234         .size_data      = sizeof(da850_edma1_pdata),
235 };
236 
237 static const struct dma_slave_map da830_edma_map[] = {
238         { "davinci-mcasp.0", "rx", EDMA_FILTER_PARAM(0, 0) },
239         { "davinci-mcasp.0", "tx", EDMA_FILTER_PARAM(0, 1) },
240         { "davinci-mcasp.1", "rx", EDMA_FILTER_PARAM(0, 2) },
241         { "davinci-mcasp.1", "tx", EDMA_FILTER_PARAM(0, 3) },
242         { "davinci-mcasp.2", "rx", EDMA_FILTER_PARAM(0, 4) },
243         { "davinci-mcasp.2", "tx", EDMA_FILTER_PARAM(0, 5) },
244         { "spi_davinci.0", "rx", EDMA_FILTER_PARAM(0, 14) },
245         { "spi_davinci.0", "tx", EDMA_FILTER_PARAM(0, 15) },
246         { "da830-mmc.0", "rx", EDMA_FILTER_PARAM(0, 16) },
247         { "da830-mmc.0", "tx", EDMA_FILTER_PARAM(0, 17) },
248         { "spi_davinci.1", "rx", EDMA_FILTER_PARAM(0, 18) },
249         { "spi_davinci.1", "tx", EDMA_FILTER_PARAM(0, 19) },
250 };
251 
252 int __init da830_register_edma(struct edma_rsv_info *rsv)
253 {
254         struct platform_device *edma_pdev;
255 
256         da8xx_edma0_pdata.rsv = rsv;
257 
258         da8xx_edma0_pdata.slave_map = da830_edma_map;
259         da8xx_edma0_pdata.slavecnt = ARRAY_SIZE(da830_edma_map);
260 
261         edma_pdev = platform_device_register_full(&da8xx_edma0_device);
262         return IS_ERR(edma_pdev) ? PTR_ERR(edma_pdev) : 0;
263 }
264 
265 static const struct dma_slave_map da850_edma0_map[] = {
266         { "davinci-mcasp.0", "rx", EDMA_FILTER_PARAM(0, 0) },
267         { "davinci-mcasp.0", "tx", EDMA_FILTER_PARAM(0, 1) },
268         { "davinci-mcbsp.0", "rx", EDMA_FILTER_PARAM(0, 2) },
269         { "davinci-mcbsp.0", "tx", EDMA_FILTER_PARAM(0, 3) },
270         { "davinci-mcbsp.1", "rx", EDMA_FILTER_PARAM(0, 4) },
271         { "davinci-mcbsp.1", "tx", EDMA_FILTER_PARAM(0, 5) },
272         { "spi_davinci.0", "rx", EDMA_FILTER_PARAM(0, 14) },
273         { "spi_davinci.0", "tx", EDMA_FILTER_PARAM(0, 15) },
274         { "da830-mmc.0", "rx", EDMA_FILTER_PARAM(0, 16) },
275         { "da830-mmc.0", "tx", EDMA_FILTER_PARAM(0, 17) },
276         { "spi_davinci.1", "rx", EDMA_FILTER_PARAM(0, 18) },
277         { "spi_davinci.1", "tx", EDMA_FILTER_PARAM(0, 19) },
278 };
279 
280 static const struct dma_slave_map da850_edma1_map[] = {
281         { "da830-mmc.1", "rx", EDMA_FILTER_PARAM(1, 28) },
282         { "da830-mmc.1", "tx", EDMA_FILTER_PARAM(1, 29) },
283 };
284 
285 int __init da850_register_edma(struct edma_rsv_info *rsv[2])
286 {
287         struct platform_device *edma_pdev;
288 
289         if (rsv) {
290                 da8xx_edma0_pdata.rsv = rsv[0];
291                 da850_edma1_pdata.rsv = rsv[1];
292         }
293 
294         da8xx_edma0_pdata.slave_map = da850_edma0_map;
295         da8xx_edma0_pdata.slavecnt = ARRAY_SIZE(da850_edma0_map);
296 
297         edma_pdev = platform_device_register_full(&da8xx_edma0_device);
298         if (IS_ERR(edma_pdev)) {
299                 pr_warn("%s: Failed to register eDMA0\n", __func__);
300                 return PTR_ERR(edma_pdev);
301         }
302 
303         da850_edma1_pdata.slave_map = da850_edma1_map;
304         da850_edma1_pdata.slavecnt = ARRAY_SIZE(da850_edma1_map);
305 
306         edma_pdev = platform_device_register_full(&da850_edma1_device);
307         return IS_ERR(edma_pdev) ? PTR_ERR(edma_pdev) : 0;
308 }
309 
310 static struct resource da8xx_i2c_resources0[] = {
311         {
312                 .start  = DA8XX_I2C0_BASE,
313                 .end    = DA8XX_I2C0_BASE + SZ_4K - 1,
314                 .flags  = IORESOURCE_MEM,
315         },
316         {
317                 .start  = IRQ_DA8XX_I2CINT0,
318                 .end    = IRQ_DA8XX_I2CINT0,
319                 .flags  = IORESOURCE_IRQ,
320         },
321 };
322 
323 static struct platform_device da8xx_i2c_device0 = {
324         .name           = "i2c_davinci",
325         .id             = 1,
326         .num_resources  = ARRAY_SIZE(da8xx_i2c_resources0),
327         .resource       = da8xx_i2c_resources0,
328 };
329 
330 static struct resource da8xx_i2c_resources1[] = {
331         {
332                 .start  = DA8XX_I2C1_BASE,
333                 .end    = DA8XX_I2C1_BASE + SZ_4K - 1,
334                 .flags  = IORESOURCE_MEM,
335         },
336         {
337                 .start  = IRQ_DA8XX_I2CINT1,
338                 .end    = IRQ_DA8XX_I2CINT1,
339                 .flags  = IORESOURCE_IRQ,
340         },
341 };
342 
343 static struct platform_device da8xx_i2c_device1 = {
344         .name           = "i2c_davinci",
345         .id             = 2,
346         .num_resources  = ARRAY_SIZE(da8xx_i2c_resources1),
347         .resource       = da8xx_i2c_resources1,
348 };
349 
350 int __init da8xx_register_i2c(int instance,
351                 struct davinci_i2c_platform_data *pdata)
352 {
353         struct platform_device *pdev;
354 
355         if (instance == 0)
356                 pdev = &da8xx_i2c_device0;
357         else if (instance == 1)
358                 pdev = &da8xx_i2c_device1;
359         else
360                 return -EINVAL;
361 
362         pdev->dev.platform_data = pdata;
363         return platform_device_register(pdev);
364 }
365 
366 static struct resource da8xx_watchdog_resources[] = {
367         {
368                 .start  = DA8XX_WDOG_BASE,
369                 .end    = DA8XX_WDOG_BASE + SZ_4K - 1,
370                 .flags  = IORESOURCE_MEM,
371         },
372 };
373 
374 static struct platform_device da8xx_wdt_device = {
375         .name           = "davinci-wdt",
376         .id             = -1,
377         .num_resources  = ARRAY_SIZE(da8xx_watchdog_resources),
378         .resource       = da8xx_watchdog_resources,
379 };
380 
381 void da8xx_restart(enum reboot_mode mode, const char *cmd)
382 {
383         struct device *dev;
384 
385         dev = bus_find_device_by_name(&platform_bus_type, NULL, "davinci-wdt");
386         if (!dev) {
387                 pr_err("%s: failed to find watchdog device\n", __func__);
388                 return;
389         }
390 
391         davinci_watchdog_reset(to_platform_device(dev));
392 }
393 
394 int __init da8xx_register_watchdog(void)
395 {
396         return platform_device_register(&da8xx_wdt_device);
397 }
398 
399 static struct resource da8xx_emac_resources[] = {
400         {
401                 .start  = DA8XX_EMAC_CPPI_PORT_BASE,
402                 .end    = DA8XX_EMAC_CPPI_PORT_BASE + SZ_16K - 1,
403                 .flags  = IORESOURCE_MEM,
404         },
405         {
406                 .start  = IRQ_DA8XX_C0_RX_THRESH_PULSE,
407                 .end    = IRQ_DA8XX_C0_RX_THRESH_PULSE,
408                 .flags  = IORESOURCE_IRQ,
409         },
410         {
411                 .start  = IRQ_DA8XX_C0_RX_PULSE,
412                 .end    = IRQ_DA8XX_C0_RX_PULSE,
413                 .flags  = IORESOURCE_IRQ,
414         },
415         {
416                 .start  = IRQ_DA8XX_C0_TX_PULSE,
417                 .end    = IRQ_DA8XX_C0_TX_PULSE,
418                 .flags  = IORESOURCE_IRQ,
419         },
420         {
421                 .start  = IRQ_DA8XX_C0_MISC_PULSE,
422                 .end    = IRQ_DA8XX_C0_MISC_PULSE,
423                 .flags  = IORESOURCE_IRQ,
424         },
425 };
426 
427 struct emac_platform_data da8xx_emac_pdata = {
428         .ctrl_reg_offset        = DA8XX_EMAC_CTRL_REG_OFFSET,
429         .ctrl_mod_reg_offset    = DA8XX_EMAC_MOD_REG_OFFSET,
430         .ctrl_ram_offset        = DA8XX_EMAC_RAM_OFFSET,
431         .ctrl_ram_size          = DA8XX_EMAC_CTRL_RAM_SIZE,
432         .version                = EMAC_VERSION_2,
433 };
434 
435 static struct platform_device da8xx_emac_device = {
436         .name           = "davinci_emac",
437         .id             = 1,
438         .dev = {
439                 .platform_data  = &da8xx_emac_pdata,
440         },
441         .num_resources  = ARRAY_SIZE(da8xx_emac_resources),
442         .resource       = da8xx_emac_resources,
443 };
444 
445 static struct resource da8xx_mdio_resources[] = {
446         {
447                 .start  = DA8XX_EMAC_MDIO_BASE,
448                 .end    = DA8XX_EMAC_MDIO_BASE + SZ_4K - 1,
449                 .flags  = IORESOURCE_MEM,
450         },
451 };
452 
453 static struct platform_device da8xx_mdio_device = {
454         .name           = "davinci_mdio",
455         .id             = 0,
456         .num_resources  = ARRAY_SIZE(da8xx_mdio_resources),
457         .resource       = da8xx_mdio_resources,
458 };
459 
460 int __init da8xx_register_emac(void)
461 {
462         int ret;
463 
464         ret = platform_device_register(&da8xx_mdio_device);
465         if (ret < 0)
466                 return ret;
467 
468         return platform_device_register(&da8xx_emac_device);
469 }
470 
471 static struct resource da830_mcasp1_resources[] = {
472         {
473                 .name   = "mpu",
474                 .start  = DAVINCI_DA830_MCASP1_REG_BASE,
475                 .end    = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1,
476                 .flags  = IORESOURCE_MEM,
477         },
478         /* TX event */
479         {
480                 .name   = "tx",
481                 .start  = DAVINCI_DA830_DMA_MCASP1_AXEVT,
482                 .end    = DAVINCI_DA830_DMA_MCASP1_AXEVT,
483                 .flags  = IORESOURCE_DMA,
484         },
485         /* RX event */
486         {
487                 .name   = "rx",
488                 .start  = DAVINCI_DA830_DMA_MCASP1_AREVT,
489                 .end    = DAVINCI_DA830_DMA_MCASP1_AREVT,
490                 .flags  = IORESOURCE_DMA,
491         },
492         {
493                 .name   = "common",
494                 .start  = IRQ_DA8XX_MCASPINT,
495                 .flags  = IORESOURCE_IRQ,
496         },
497 };
498 
499 static struct platform_device da830_mcasp1_device = {
500         .name           = "davinci-mcasp",
501         .id             = 1,
502         .num_resources  = ARRAY_SIZE(da830_mcasp1_resources),
503         .resource       = da830_mcasp1_resources,
504 };
505 
506 static struct resource da830_mcasp2_resources[] = {
507         {
508                 .name   = "mpu",
509                 .start  = DAVINCI_DA830_MCASP2_REG_BASE,
510                 .end    = DAVINCI_DA830_MCASP2_REG_BASE + (SZ_1K * 12) - 1,
511                 .flags  = IORESOURCE_MEM,
512         },
513         /* TX event */
514         {
515                 .name   = "tx",
516                 .start  = DAVINCI_DA830_DMA_MCASP2_AXEVT,
517                 .end    = DAVINCI_DA830_DMA_MCASP2_AXEVT,
518                 .flags  = IORESOURCE_DMA,
519         },
520         /* RX event */
521         {
522                 .name   = "rx",
523                 .start  = DAVINCI_DA830_DMA_MCASP2_AREVT,
524                 .end    = DAVINCI_DA830_DMA_MCASP2_AREVT,
525                 .flags  = IORESOURCE_DMA,
526         },
527         {
528                 .name   = "common",
529                 .start  = IRQ_DA8XX_MCASPINT,
530                 .flags  = IORESOURCE_IRQ,
531         },
532 };
533 
534 static struct platform_device da830_mcasp2_device = {
535         .name           = "davinci-mcasp",
536         .id             = 2,
537         .num_resources  = ARRAY_SIZE(da830_mcasp2_resources),
538         .resource       = da830_mcasp2_resources,
539 };
540 
541 static struct resource da850_mcasp_resources[] = {
542         {
543                 .name   = "mpu",
544                 .start  = DAVINCI_DA8XX_MCASP0_REG_BASE,
545                 .end    = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1,
546                 .flags  = IORESOURCE_MEM,
547         },
548         /* TX event */
549         {
550                 .name   = "tx",
551                 .start  = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
552                 .end    = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
553                 .flags  = IORESOURCE_DMA,
554         },
555         /* RX event */
556         {
557                 .name   = "rx",
558                 .start  = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
559                 .end    = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
560                 .flags  = IORESOURCE_DMA,
561         },
562         {
563                 .name   = "common",
564                 .start  = IRQ_DA8XX_MCASPINT,
565                 .flags  = IORESOURCE_IRQ,
566         },
567 };
568 
569 static struct platform_device da850_mcasp_device = {
570         .name           = "davinci-mcasp",
571         .id             = 0,
572         .num_resources  = ARRAY_SIZE(da850_mcasp_resources),
573         .resource       = da850_mcasp_resources,
574 };
575 
576 void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata)
577 {
578         struct platform_device *pdev;
579 
580         switch (id) {
581         case 0:
582                 /* Valid for DA830/OMAP-L137 or DA850/OMAP-L138 */
583                 pdev = &da850_mcasp_device;
584                 break;
585         case 1:
586                 /* Valid for DA830/OMAP-L137 only */
587                 if (!cpu_is_davinci_da830())
588                         return;
589                 pdev = &da830_mcasp1_device;
590                 break;
591         case 2:
592                 /* Valid for DA830/OMAP-L137 only */
593                 if (!cpu_is_davinci_da830())
594                         return;
595                 pdev = &da830_mcasp2_device;
596                 break;
597         default:
598                 return;
599         }
600 
601         pdev->dev.platform_data = pdata;
602         platform_device_register(pdev);
603 }
604 
605 static struct resource da8xx_pruss_resources[] = {
606         {
607                 .start  = DA8XX_PRUSS_MEM_BASE,
608                 .end    = DA8XX_PRUSS_MEM_BASE + 0xFFFF,
609                 .flags  = IORESOURCE_MEM,
610         },
611         {
612                 .start  = IRQ_DA8XX_EVTOUT0,
613                 .end    = IRQ_DA8XX_EVTOUT0,
614                 .flags  = IORESOURCE_IRQ,
615         },
616         {
617                 .start  = IRQ_DA8XX_EVTOUT1,
618                 .end    = IRQ_DA8XX_EVTOUT1,
619                 .flags  = IORESOURCE_IRQ,
620         },
621         {
622                 .start  = IRQ_DA8XX_EVTOUT2,
623                 .end    = IRQ_DA8XX_EVTOUT2,
624                 .flags  = IORESOURCE_IRQ,
625         },
626         {
627                 .start  = IRQ_DA8XX_EVTOUT3,
628                 .end    = IRQ_DA8XX_EVTOUT3,
629                 .flags  = IORESOURCE_IRQ,
630         },
631         {
632                 .start  = IRQ_DA8XX_EVTOUT4,
633                 .end    = IRQ_DA8XX_EVTOUT4,
634                 .flags  = IORESOURCE_IRQ,
635         },
636         {
637                 .start  = IRQ_DA8XX_EVTOUT5,
638                 .end    = IRQ_DA8XX_EVTOUT5,
639                 .flags  = IORESOURCE_IRQ,
640         },
641         {
642                 .start  = IRQ_DA8XX_EVTOUT6,
643                 .end    = IRQ_DA8XX_EVTOUT6,
644                 .flags  = IORESOURCE_IRQ,
645         },
646         {
647                 .start  = IRQ_DA8XX_EVTOUT7,
648                 .end    = IRQ_DA8XX_EVTOUT7,
649                 .flags  = IORESOURCE_IRQ,
650         },
651 };
652 
653 static struct uio_pruss_pdata da8xx_uio_pruss_pdata = {
654         .pintc_base     = 0x4000,
655 };
656 
657 static struct platform_device da8xx_uio_pruss_dev = {
658         .name           = "pruss_uio",
659         .id             = -1,
660         .num_resources  = ARRAY_SIZE(da8xx_pruss_resources),
661         .resource       = da8xx_pruss_resources,
662         .dev            = {
663                 .coherent_dma_mask      = DMA_BIT_MASK(32),
664                 .platform_data          = &da8xx_uio_pruss_pdata,
665         }
666 };
667 
668 int __init da8xx_register_uio_pruss(void)
669 {
670         da8xx_uio_pruss_pdata.sram_pool = sram_get_gen_pool();
671         return platform_device_register(&da8xx_uio_pruss_dev);
672 }
673 
674 static struct lcd_ctrl_config lcd_cfg = {
675         .panel_shade            = COLOR_ACTIVE,
676         .bpp                    = 16,
677 };
678 
679 struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata = {
680         .manu_name              = "sharp",
681         .controller_data        = &lcd_cfg,
682         .type                   = "Sharp_LCD035Q3DG01",
683 };
684 
685 struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata = {
686         .manu_name              = "sharp",
687         .controller_data        = &lcd_cfg,
688         .type                   = "Sharp_LK043T1DG01",
689 };
690 
691 static struct resource da8xx_lcdc_resources[] = {
692         [0] = { /* registers */
693                 .start  = DA8XX_LCD_CNTRL_BASE,
694                 .end    = DA8XX_LCD_CNTRL_BASE + SZ_4K - 1,
695                 .flags  = IORESOURCE_MEM,
696         },
697         [1] = { /* interrupt */
698                 .start  = IRQ_DA8XX_LCDINT,
699                 .end    = IRQ_DA8XX_LCDINT,
700                 .flags  = IORESOURCE_IRQ,
701         },
702 };
703 
704 static struct platform_device da8xx_lcdc_device = {
705         .name           = "da8xx_lcdc",
706         .id             = 0,
707         .num_resources  = ARRAY_SIZE(da8xx_lcdc_resources),
708         .resource       = da8xx_lcdc_resources,
709 };
710 
711 int __init da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata)
712 {
713         da8xx_lcdc_device.dev.platform_data = pdata;
714         return platform_device_register(&da8xx_lcdc_device);
715 }
716 
717 static struct resource da8xx_gpio_resources[] = {
718         { /* registers */
719                 .start  = DA8XX_GPIO_BASE,
720                 .end    = DA8XX_GPIO_BASE + SZ_4K - 1,
721                 .flags  = IORESOURCE_MEM,
722         },
723         { /* interrupt */
724                 .start  = IRQ_DA8XX_GPIO0,
725                 .end    = IRQ_DA8XX_GPIO8,
726                 .flags  = IORESOURCE_IRQ,
727         },
728 };
729 
730 static struct platform_device da8xx_gpio_device = {
731         .name           = "davinci_gpio",
732         .id             = -1,
733         .num_resources  = ARRAY_SIZE(da8xx_gpio_resources),
734         .resource       = da8xx_gpio_resources,
735 };
736 
737 int __init da8xx_register_gpio(void *pdata)
738 {
739         da8xx_gpio_device.dev.platform_data = pdata;
740         return platform_device_register(&da8xx_gpio_device);
741 }
742 
743 static struct resource da8xx_mmcsd0_resources[] = {
744         {               /* registers */
745                 .start  = DA8XX_MMCSD0_BASE,
746                 .end    = DA8XX_MMCSD0_BASE + SZ_4K - 1,
747                 .flags  = IORESOURCE_MEM,
748         },
749         {               /* interrupt */
750                 .start  = IRQ_DA8XX_MMCSDINT0,
751                 .end    = IRQ_DA8XX_MMCSDINT0,
752                 .flags  = IORESOURCE_IRQ,
753         },
754         {               /* DMA RX */
755                 .start  = DA8XX_DMA_MMCSD0_RX,
756                 .end    = DA8XX_DMA_MMCSD0_RX,
757                 .flags  = IORESOURCE_DMA,
758         },
759         {               /* DMA TX */
760                 .start  = DA8XX_DMA_MMCSD0_TX,
761                 .end    = DA8XX_DMA_MMCSD0_TX,
762                 .flags  = IORESOURCE_DMA,
763         },
764 };
765 
766 static struct platform_device da8xx_mmcsd0_device = {
767         .name           = "da830-mmc",
768         .id             = 0,
769         .num_resources  = ARRAY_SIZE(da8xx_mmcsd0_resources),
770         .resource       = da8xx_mmcsd0_resources,
771 };
772 
773 int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config)
774 {
775         da8xx_mmcsd0_device.dev.platform_data = config;
776         return platform_device_register(&da8xx_mmcsd0_device);
777 }
778 
779 #ifdef CONFIG_ARCH_DAVINCI_DA850
780 static struct resource da850_mmcsd1_resources[] = {
781         {               /* registers */
782                 .start  = DA850_MMCSD1_BASE,
783                 .end    = DA850_MMCSD1_BASE + SZ_4K - 1,
784                 .flags  = IORESOURCE_MEM,
785         },
786         {               /* interrupt */
787                 .start  = IRQ_DA850_MMCSDINT0_1,
788                 .end    = IRQ_DA850_MMCSDINT0_1,
789                 .flags  = IORESOURCE_IRQ,
790         },
791         {               /* DMA RX */
792                 .start  = DA850_DMA_MMCSD1_RX,
793                 .end    = DA850_DMA_MMCSD1_RX,
794                 .flags  = IORESOURCE_DMA,
795         },
796         {               /* DMA TX */
797                 .start  = DA850_DMA_MMCSD1_TX,
798                 .end    = DA850_DMA_MMCSD1_TX,
799                 .flags  = IORESOURCE_DMA,
800         },
801 };
802 
803 static struct platform_device da850_mmcsd1_device = {
804         .name           = "da830-mmc",
805         .id             = 1,
806         .num_resources  = ARRAY_SIZE(da850_mmcsd1_resources),
807         .resource       = da850_mmcsd1_resources,
808 };
809 
810 int __init da850_register_mmcsd1(struct davinci_mmc_config *config)
811 {
812         da850_mmcsd1_device.dev.platform_data = config;
813         return platform_device_register(&da850_mmcsd1_device);
814 }
815 #endif
816 
817 static struct resource da8xx_rproc_resources[] = {
818         { /* DSP boot address */
819                 .start          = DA8XX_SYSCFG0_BASE + DA8XX_HOST1CFG_REG,
820                 .end            = DA8XX_SYSCFG0_BASE + DA8XX_HOST1CFG_REG + 3,
821                 .flags          = IORESOURCE_MEM,
822         },
823         { /* DSP interrupt registers */
824                 .start          = DA8XX_SYSCFG0_BASE + DA8XX_CHIPSIG_REG,
825                 .end            = DA8XX_SYSCFG0_BASE + DA8XX_CHIPSIG_REG + 7,
826                 .flags          = IORESOURCE_MEM,
827         },
828         { /* dsp irq */
829                 .start          = IRQ_DA8XX_CHIPINT0,
830                 .end            = IRQ_DA8XX_CHIPINT0,
831                 .flags          = IORESOURCE_IRQ,
832         },
833 };
834 
835 static struct platform_device da8xx_dsp = {
836         .name   = "davinci-rproc",
837         .dev    = {
838                 .coherent_dma_mask      = DMA_BIT_MASK(32),
839         },
840         .num_resources  = ARRAY_SIZE(da8xx_rproc_resources),
841         .resource       = da8xx_rproc_resources,
842 };
843 
844 #if IS_ENABLED(CONFIG_DA8XX_REMOTEPROC)
845 
846 static phys_addr_t rproc_base __initdata;
847 static unsigned long rproc_size __initdata;
848 
849 static int __init early_rproc_mem(char *p)
850 {
851         char *endp;
852 
853         if (p == NULL)
854                 return 0;
855 
856         rproc_size = memparse(p, &endp);
857         if (*endp == '@')
858                 rproc_base = memparse(endp + 1, NULL);
859 
860         return 0;
861 }
862 early_param("rproc_mem", early_rproc_mem);
863 
864 void __init da8xx_rproc_reserve_cma(void)
865 {
866         int ret;
867 
868         if (!rproc_base || !rproc_size) {
869                 pr_err("%s: 'rproc_mem=nn@address' badly specified\n"
870                        "    'nn' and 'address' must both be non-zero\n",
871                        __func__);
872 
873                 return;
874         }
875 
876         pr_info("%s: reserving 0x%lx @ 0x%lx...\n",
877                 __func__, rproc_size, (unsigned long)rproc_base);
878 
879         ret = dma_declare_contiguous(&da8xx_dsp.dev, rproc_size, rproc_base, 0);
880         if (ret)
881                 pr_err("%s: dma_declare_contiguous failed %d\n", __func__, ret);
882 }
883 
884 #else
885 
886 void __init da8xx_rproc_reserve_cma(void)
887 {
888 }
889 
890 #endif
891 
892 int __init da8xx_register_rproc(void)
893 {
894         int ret;
895 
896         ret = platform_device_register(&da8xx_dsp);
897         if (ret)
898                 pr_err("%s: can't register DSP device: %d\n", __func__, ret);
899 
900         return ret;
901 };
902 
903 static struct resource da8xx_rtc_resources[] = {
904         {
905                 .start          = DA8XX_RTC_BASE,
906                 .end            = DA8XX_RTC_BASE + SZ_4K - 1,
907                 .flags          = IORESOURCE_MEM,
908         },
909         { /* timer irq */
910                 .start          = IRQ_DA8XX_RTC,
911                 .end            = IRQ_DA8XX_RTC,
912                 .flags          = IORESOURCE_IRQ,
913         },
914         { /* alarm irq */
915                 .start          = IRQ_DA8XX_RTC,
916                 .end            = IRQ_DA8XX_RTC,
917                 .flags          = IORESOURCE_IRQ,
918         },
919 };
920 
921 static struct platform_device da8xx_rtc_device = {
922         .name           = "da830-rtc",
923         .id             = -1,
924         .num_resources  = ARRAY_SIZE(da8xx_rtc_resources),
925         .resource       = da8xx_rtc_resources,
926 };
927 
928 int da8xx_register_rtc(void)
929 {
930         return platform_device_register(&da8xx_rtc_device);
931 }
932 
933 static void __iomem *da8xx_ddr2_ctlr_base;
934 void __iomem * __init da8xx_get_mem_ctlr(void)
935 {
936         if (da8xx_ddr2_ctlr_base)
937                 return da8xx_ddr2_ctlr_base;
938 
939         da8xx_ddr2_ctlr_base = ioremap(DA8XX_DDR2_CTL_BASE, SZ_32K);
940         if (!da8xx_ddr2_ctlr_base)
941                 pr_warn("%s: Unable to map DDR2 controller", __func__);
942 
943         return da8xx_ddr2_ctlr_base;
944 }
945 
946 static struct resource da8xx_cpuidle_resources[] = {
947         {
948                 .start          = DA8XX_DDR2_CTL_BASE,
949                 .end            = DA8XX_DDR2_CTL_BASE + SZ_32K - 1,
950                 .flags          = IORESOURCE_MEM,
951         },
952 };
953 
954 /* DA8XX devices support DDR2 power down */
955 static struct davinci_cpuidle_config da8xx_cpuidle_pdata = {
956         .ddr2_pdown     = 1,
957 };
958 
959 
960 static struct platform_device da8xx_cpuidle_device = {
961         .name                   = "cpuidle-davinci",
962         .num_resources          = ARRAY_SIZE(da8xx_cpuidle_resources),
963         .resource               = da8xx_cpuidle_resources,
964         .dev = {
965                 .platform_data  = &da8xx_cpuidle_pdata,
966         },
967 };
968 
969 int __init da8xx_register_cpuidle(void)
970 {
971         da8xx_cpuidle_pdata.ddr2_ctlr_base = da8xx_get_mem_ctlr();
972 
973         return platform_device_register(&da8xx_cpuidle_device);
974 }
975 
976 static struct resource da8xx_spi0_resources[] = {
977         [0] = {
978                 .start  = DA8XX_SPI0_BASE,
979                 .end    = DA8XX_SPI0_BASE + SZ_4K - 1,
980                 .flags  = IORESOURCE_MEM,
981         },
982         [1] = {
983                 .start  = IRQ_DA8XX_SPINT0,
984                 .end    = IRQ_DA8XX_SPINT0,
985                 .flags  = IORESOURCE_IRQ,
986         },
987         [2] = {
988                 .start  = DA8XX_DMA_SPI0_RX,
989                 .end    = DA8XX_DMA_SPI0_RX,
990                 .flags  = IORESOURCE_DMA,
991         },
992         [3] = {
993                 .start  = DA8XX_DMA_SPI0_TX,
994                 .end    = DA8XX_DMA_SPI0_TX,
995                 .flags  = IORESOURCE_DMA,
996         },
997 };
998 
999 static struct resource da8xx_spi1_resources[] = {
1000         [0] = {
1001                 .start  = DA830_SPI1_BASE,
1002                 .end    = DA830_SPI1_BASE + SZ_4K - 1,
1003                 .flags  = IORESOURCE_MEM,
1004         },
1005         [1] = {
1006                 .start  = IRQ_DA8XX_SPINT1,
1007                 .end    = IRQ_DA8XX_SPINT1,
1008                 .flags  = IORESOURCE_IRQ,
1009         },
1010         [2] = {
1011                 .start  = DA8XX_DMA_SPI1_RX,
1012                 .end    = DA8XX_DMA_SPI1_RX,
1013                 .flags  = IORESOURCE_DMA,
1014         },
1015         [3] = {
1016                 .start  = DA8XX_DMA_SPI1_TX,
1017                 .end    = DA8XX_DMA_SPI1_TX,
1018                 .flags  = IORESOURCE_DMA,
1019         },
1020 };
1021 
1022 static struct davinci_spi_platform_data da8xx_spi_pdata[] = {
1023         [0] = {
1024                 .version        = SPI_VERSION_2,
1025                 .intr_line      = 1,
1026                 .dma_event_q    = EVENTQ_0,
1027                 .prescaler_limit = 2,
1028         },
1029         [1] = {
1030                 .version        = SPI_VERSION_2,
1031                 .intr_line      = 1,
1032                 .dma_event_q    = EVENTQ_0,
1033                 .prescaler_limit = 2,
1034         },
1035 };
1036 
1037 static struct platform_device da8xx_spi_device[] = {
1038         [0] = {
1039                 .name           = "spi_davinci",
1040                 .id             = 0,
1041                 .num_resources  = ARRAY_SIZE(da8xx_spi0_resources),
1042                 .resource       = da8xx_spi0_resources,
1043                 .dev            = {
1044                         .platform_data = &da8xx_spi_pdata[0],
1045                 },
1046         },
1047         [1] = {
1048                 .name           = "spi_davinci",
1049                 .id             = 1,
1050                 .num_resources  = ARRAY_SIZE(da8xx_spi1_resources),
1051                 .resource       = da8xx_spi1_resources,
1052                 .dev            = {
1053                         .platform_data = &da8xx_spi_pdata[1],
1054                 },
1055         },
1056 };
1057 
1058 int __init da8xx_register_spi_bus(int instance, unsigned num_chipselect)
1059 {
1060         if (instance < 0 || instance > 1)
1061                 return -EINVAL;
1062 
1063         da8xx_spi_pdata[instance].num_chipselect = num_chipselect;
1064 
1065         if (instance == 1 && cpu_is_davinci_da850()) {
1066                 da8xx_spi1_resources[0].start = DA850_SPI1_BASE;
1067                 da8xx_spi1_resources[0].end = DA850_SPI1_BASE + SZ_4K - 1;
1068         }
1069 
1070         return platform_device_register(&da8xx_spi_device[instance]);
1071 }
1072 
1073 #ifdef CONFIG_ARCH_DAVINCI_DA850
1074 static struct resource da850_sata_resources[] = {
1075         {
1076                 .start  = DA850_SATA_BASE,
1077                 .end    = DA850_SATA_BASE + 0x1fff,
1078                 .flags  = IORESOURCE_MEM,
1079         },
1080         {
1081                 .start  = DA8XX_SYSCFG1_BASE + DA8XX_PWRDN_REG,
1082                 .end    = DA8XX_SYSCFG1_BASE + DA8XX_PWRDN_REG + 0x3,
1083                 .flags  = IORESOURCE_MEM,
1084         },
1085         {
1086                 .start  = IRQ_DA850_SATAINT,
1087                 .flags  = IORESOURCE_IRQ,
1088         },
1089 };
1090 
1091 static u64 da850_sata_dmamask = DMA_BIT_MASK(32);
1092 
1093 static struct platform_device da850_sata_device = {
1094         .name   = "ahci_da850",
1095         .id     = -1,
1096         .dev    = {
1097                 .dma_mask               = &da850_sata_dmamask,
1098                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1099         },
1100         .num_resources  = ARRAY_SIZE(da850_sata_resources),
1101         .resource       = da850_sata_resources,
1102 };
1103 
1104 int __init da850_register_sata(unsigned long refclkpn)
1105 {
1106         /* please see comment in drivers/ata/ahci_da850.c */
1107         BUG_ON(refclkpn != 100 * 1000 * 1000);
1108 
1109         return platform_device_register(&da850_sata_device);
1110 }
1111 #endif
1112 

~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

kernel.org | git.kernel.org | LWN.net | Project Home | Wiki (Japanese) | Wiki (English) | SVN repository | Mail admin

Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.

osdn.jp