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TOMOYO Linux Cross Reference
Linux/arch/arm/mach-imx/mach-mx51_babbage.c

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  1 /*
  2  * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
  3  * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
  4  *
  5  * The code contained herein is licensed under the GNU General Public
  6  * License. You may obtain a copy of the GNU General Public License
  7  * Version 2 or later at the following locations:
  8  *
  9  * http://www.opensource.org/licenses/gpl-license.html
 10  * http://www.gnu.org/copyleft/gpl.html
 11  */
 12 
 13 #include <linux/init.h>
 14 #include <linux/platform_device.h>
 15 #include <linux/i2c.h>
 16 #include <linux/gpio.h>
 17 #include <linux/delay.h>
 18 #include <linux/io.h>
 19 #include <linux/input.h>
 20 #include <linux/spi/flash.h>
 21 #include <linux/spi/spi.h>
 22 
 23 #include <asm/setup.h>
 24 #include <asm/mach-types.h>
 25 #include <asm/mach/arch.h>
 26 #include <asm/mach/time.h>
 27 
 28 #include "common.h"
 29 #include "devices-imx51.h"
 30 #include "hardware.h"
 31 #include "iomux-mx51.h"
 32 
 33 #define BABBAGE_USB_HUB_RESET   IMX_GPIO_NR(1, 7)
 34 #define BABBAGE_USBH1_STP       IMX_GPIO_NR(1, 27)
 35 #define BABBAGE_USB_PHY_RESET   IMX_GPIO_NR(2, 5)
 36 #define BABBAGE_FEC_PHY_RESET   IMX_GPIO_NR(2, 14)
 37 #define BABBAGE_POWER_KEY       IMX_GPIO_NR(2, 21)
 38 #define BABBAGE_ECSPI1_CS0      IMX_GPIO_NR(4, 24)
 39 #define BABBAGE_ECSPI1_CS1      IMX_GPIO_NR(4, 25)
 40 #define BABBAGE_SD2_CD          IMX_GPIO_NR(1, 6)
 41 #define BABBAGE_SD2_WP          IMX_GPIO_NR(1, 5)
 42 
 43 /* USB_CTRL_1 */
 44 #define MX51_USB_CTRL_1_OFFSET                  0x10
 45 #define MX51_USB_CTRL_UH1_EXT_CLK_EN            (1 << 25)
 46 
 47 #define MX51_USB_PLLDIV_12_MHZ          0x00
 48 #define MX51_USB_PLL_DIV_19_2_MHZ       0x01
 49 #define MX51_USB_PLL_DIV_24_MHZ 0x02
 50 
 51 static struct gpio_keys_button babbage_buttons[] = {
 52         {
 53                 .gpio           = BABBAGE_POWER_KEY,
 54                 .code           = BTN_0,
 55                 .desc           = "PWR",
 56                 .active_low     = 1,
 57                 .wakeup         = 1,
 58         },
 59 };
 60 
 61 static const struct gpio_keys_platform_data imx_button_data __initconst = {
 62         .buttons        = babbage_buttons,
 63         .nbuttons       = ARRAY_SIZE(babbage_buttons),
 64 };
 65 
 66 static iomux_v3_cfg_t mx51babbage_pads[] = {
 67         /* UART1 */
 68         MX51_PAD_UART1_RXD__UART1_RXD,
 69         MX51_PAD_UART1_TXD__UART1_TXD,
 70         MX51_PAD_UART1_RTS__UART1_RTS,
 71         MX51_PAD_UART1_CTS__UART1_CTS,
 72 
 73         /* UART2 */
 74         MX51_PAD_UART2_RXD__UART2_RXD,
 75         MX51_PAD_UART2_TXD__UART2_TXD,
 76 
 77         /* UART3 */
 78         MX51_PAD_EIM_D25__UART3_RXD,
 79         MX51_PAD_EIM_D26__UART3_TXD,
 80         MX51_PAD_EIM_D27__UART3_RTS,
 81         MX51_PAD_EIM_D24__UART3_CTS,
 82 
 83         /* I2C1 */
 84         MX51_PAD_EIM_D16__I2C1_SDA,
 85         MX51_PAD_EIM_D19__I2C1_SCL,
 86 
 87         /* I2C2 */
 88         MX51_PAD_KEY_COL4__I2C2_SCL,
 89         MX51_PAD_KEY_COL5__I2C2_SDA,
 90 
 91         /* HSI2C */
 92         MX51_PAD_I2C1_CLK__I2C1_CLK,
 93         MX51_PAD_I2C1_DAT__I2C1_DAT,
 94 
 95         /* USB HOST1 */
 96         MX51_PAD_USBH1_CLK__USBH1_CLK,
 97         MX51_PAD_USBH1_DIR__USBH1_DIR,
 98         MX51_PAD_USBH1_NXT__USBH1_NXT,
 99         MX51_PAD_USBH1_DATA0__USBH1_DATA0,
100         MX51_PAD_USBH1_DATA1__USBH1_DATA1,
101         MX51_PAD_USBH1_DATA2__USBH1_DATA2,
102         MX51_PAD_USBH1_DATA3__USBH1_DATA3,
103         MX51_PAD_USBH1_DATA4__USBH1_DATA4,
104         MX51_PAD_USBH1_DATA5__USBH1_DATA5,
105         MX51_PAD_USBH1_DATA6__USBH1_DATA6,
106         MX51_PAD_USBH1_DATA7__USBH1_DATA7,
107 
108         /* USB HUB reset line*/
109         MX51_PAD_GPIO1_7__GPIO1_7,
110 
111         /* USB PHY reset line */
112         MX51_PAD_EIM_D21__GPIO2_5,
113 
114         /* FEC */
115         MX51_PAD_EIM_EB2__FEC_MDIO,
116         MX51_PAD_EIM_EB3__FEC_RDATA1,
117         MX51_PAD_EIM_CS2__FEC_RDATA2,
118         MX51_PAD_EIM_CS3__FEC_RDATA3,
119         MX51_PAD_EIM_CS4__FEC_RX_ER,
120         MX51_PAD_EIM_CS5__FEC_CRS,
121         MX51_PAD_NANDF_RB2__FEC_COL,
122         MX51_PAD_NANDF_RB3__FEC_RX_CLK,
123         MX51_PAD_NANDF_D9__FEC_RDATA0,
124         MX51_PAD_NANDF_D8__FEC_TDATA0,
125         MX51_PAD_NANDF_CS2__FEC_TX_ER,
126         MX51_PAD_NANDF_CS3__FEC_MDC,
127         MX51_PAD_NANDF_CS4__FEC_TDATA1,
128         MX51_PAD_NANDF_CS5__FEC_TDATA2,
129         MX51_PAD_NANDF_CS6__FEC_TDATA3,
130         MX51_PAD_NANDF_CS7__FEC_TX_EN,
131         MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK,
132 
133         /* FEC PHY reset line */
134         MX51_PAD_EIM_A20__GPIO2_14,
135 
136         /* SD 1 */
137         MX51_PAD_SD1_CMD__SD1_CMD,
138         MX51_PAD_SD1_CLK__SD1_CLK,
139         MX51_PAD_SD1_DATA0__SD1_DATA0,
140         MX51_PAD_SD1_DATA1__SD1_DATA1,
141         MX51_PAD_SD1_DATA2__SD1_DATA2,
142         MX51_PAD_SD1_DATA3__SD1_DATA3,
143         /* CD/WP from controller */
144         MX51_PAD_GPIO1_0__SD1_CD,
145         MX51_PAD_GPIO1_1__SD1_WP,
146 
147         /* SD 2 */
148         MX51_PAD_SD2_CMD__SD2_CMD,
149         MX51_PAD_SD2_CLK__SD2_CLK,
150         MX51_PAD_SD2_DATA0__SD2_DATA0,
151         MX51_PAD_SD2_DATA1__SD2_DATA1,
152         MX51_PAD_SD2_DATA2__SD2_DATA2,
153         MX51_PAD_SD2_DATA3__SD2_DATA3,
154         /* CD/WP gpio */
155         MX51_PAD_GPIO1_6__GPIO1_6,
156         MX51_PAD_GPIO1_5__GPIO1_5,
157 
158         /* eCSPI1 */
159         MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
160         MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
161         MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
162         MX51_PAD_CSPI1_SS0__GPIO4_24,
163         MX51_PAD_CSPI1_SS1__GPIO4_25,
164 
165         /* Audio */
166         MX51_PAD_AUD3_BB_TXD__AUD3_TXD,
167         MX51_PAD_AUD3_BB_RXD__AUD3_RXD,
168         MX51_PAD_AUD3_BB_CK__AUD3_TXC,
169         MX51_PAD_AUD3_BB_FS__AUD3_TXFS,
170 };
171 
172 /* Serial ports */
173 static const struct imxuart_platform_data uart_pdata __initconst = {
174         .flags = IMXUART_HAVE_RTSCTS,
175 };
176 
177 static const struct imxi2c_platform_data babbage_i2c_data __initconst = {
178         .bitrate = 100000,
179 };
180 
181 static const struct imxi2c_platform_data babbage_hsi2c_data __initconst = {
182         .bitrate = 400000,
183 };
184 
185 static struct gpio mx51_babbage_usbh1_gpios[] = {
186         { BABBAGE_USBH1_STP, GPIOF_OUT_INIT_LOW, "usbh1_stp" },
187         { BABBAGE_USB_PHY_RESET, GPIOF_OUT_INIT_LOW, "usbh1_phy_reset" },
188 };
189 
190 static int gpio_usbh1_active(void)
191 {
192         iomux_v3_cfg_t usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO1_27;
193         int ret;
194 
195         /* Set USBH1_STP to GPIO and toggle it */
196         mxc_iomux_v3_setup_pad(usbh1stp_gpio);
197         ret = gpio_request_array(mx51_babbage_usbh1_gpios,
198                                         ARRAY_SIZE(mx51_babbage_usbh1_gpios));
199 
200         if (ret) {
201                 pr_debug("failed to get USBH1 pins: %d\n", ret);
202                 return ret;
203         }
204 
205         msleep(100);
206         gpio_set_value(BABBAGE_USBH1_STP, 1);
207         gpio_set_value(BABBAGE_USB_PHY_RESET, 1);
208         gpio_free_array(mx51_babbage_usbh1_gpios,
209                                         ARRAY_SIZE(mx51_babbage_usbh1_gpios));
210         return 0;
211 }
212 
213 static inline void babbage_usbhub_reset(void)
214 {
215         int ret;
216 
217         /* Reset USB hub */
218         ret = gpio_request_one(BABBAGE_USB_HUB_RESET,
219                                         GPIOF_OUT_INIT_LOW, "GPIO1_7");
220         if (ret) {
221                 printk(KERN_ERR"failed to get GPIO_USB_HUB_RESET: %d\n", ret);
222                 return;
223         }
224 
225         msleep(2);
226         /* Deassert reset */
227         gpio_set_value(BABBAGE_USB_HUB_RESET, 1);
228 }
229 
230 static inline void babbage_fec_reset(void)
231 {
232         int ret;
233 
234         /* reset FEC PHY */
235         ret = gpio_request_one(BABBAGE_FEC_PHY_RESET,
236                                         GPIOF_OUT_INIT_LOW, "fec-phy-reset");
237         if (ret) {
238                 printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret);
239                 return;
240         }
241         msleep(1);
242         gpio_set_value(BABBAGE_FEC_PHY_RESET, 1);
243 }
244 
245 /* This function is board specific as the bit mask for the plldiv will also
246 be different for other Freescale SoCs, thus a common bitmask is not
247 possible and cannot get place in /plat-mxc/ehci.c.*/
248 static int initialize_otg_port(struct platform_device *pdev)
249 {
250         u32 v;
251         void __iomem *usb_base;
252         void __iomem *usbother_base;
253 
254         usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
255         if (!usb_base)
256                 return -ENOMEM;
257         usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
258 
259         /* Set the PHY clock to 19.2MHz */
260         v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
261         v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
262         v |= MX51_USB_PLL_DIV_19_2_MHZ;
263         __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
264         iounmap(usb_base);
265 
266         mdelay(10);
267 
268         return mx51_initialize_usb_hw(0, MXC_EHCI_INTERNAL_PHY);
269 }
270 
271 static int initialize_usbh1_port(struct platform_device *pdev)
272 {
273         u32 v;
274         void __iomem *usb_base;
275         void __iomem *usbother_base;
276 
277         usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
278         if (!usb_base)
279                 return -ENOMEM;
280         usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
281 
282         /* The clock for the USBH1 ULPI port will come externally from the PHY. */
283         v = __raw_readl(usbother_base + MX51_USB_CTRL_1_OFFSET);
284         __raw_writel(v | MX51_USB_CTRL_UH1_EXT_CLK_EN, usbother_base + MX51_USB_CTRL_1_OFFSET);
285         iounmap(usb_base);
286 
287         mdelay(10);
288 
289         return mx51_initialize_usb_hw(1, MXC_EHCI_POWER_PINS_ENABLED |
290                         MXC_EHCI_ITC_NO_THRESHOLD);
291 }
292 
293 static const struct mxc_usbh_platform_data dr_utmi_config __initconst = {
294         .init           = initialize_otg_port,
295         .portsc = MXC_EHCI_UTMI_16BIT,
296 };
297 
298 static const struct fsl_usb2_platform_data usb_pdata __initconst = {
299         .operating_mode = FSL_USB2_DR_DEVICE,
300         .phy_mode       = FSL_USB2_PHY_UTMI_WIDE,
301 };
302 
303 static const struct mxc_usbh_platform_data usbh1_config __initconst = {
304         .init           = initialize_usbh1_port,
305         .portsc = MXC_EHCI_MODE_ULPI,
306 };
307 
308 static bool otg_mode_host __initdata;
309 
310 static int __init babbage_otg_mode(char *options)
311 {
312         if (!strcmp(options, "host"))
313                 otg_mode_host = true;
314         else if (!strcmp(options, "device"))
315                 otg_mode_host = false;
316         else
317                 pr_info("otg_mode neither \"host\" nor \"device\". "
318                         "Defaulting to device\n");
319         return 1;
320 }
321 __setup("otg_mode=", babbage_otg_mode);
322 
323 static struct spi_board_info mx51_babbage_spi_board_info[] __initdata = {
324         {
325                 .modalias = "mtd_dataflash",
326                 .max_speed_hz = 25000000,
327                 .bus_num = 0,
328                 .chip_select = 1,
329                 .mode = SPI_MODE_0,
330                 .platform_data = NULL,
331         },
332 };
333 
334 static int mx51_babbage_spi_cs[] = {
335         BABBAGE_ECSPI1_CS0,
336         BABBAGE_ECSPI1_CS1,
337 };
338 
339 static const struct spi_imx_master mx51_babbage_spi_pdata __initconst = {
340         .chipselect     = mx51_babbage_spi_cs,
341         .num_chipselect = ARRAY_SIZE(mx51_babbage_spi_cs),
342 };
343 
344 static const struct esdhc_platform_data mx51_babbage_sd1_data __initconst = {
345         .cd_type = ESDHC_CD_CONTROLLER,
346         .wp_type = ESDHC_WP_CONTROLLER,
347 };
348 
349 static const struct esdhc_platform_data mx51_babbage_sd2_data __initconst = {
350         .cd_gpio = BABBAGE_SD2_CD,
351         .wp_gpio = BABBAGE_SD2_WP,
352         .cd_type = ESDHC_CD_GPIO,
353         .wp_type = ESDHC_WP_GPIO,
354 };
355 
356 void __init imx51_babbage_common_init(void)
357 {
358         mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads,
359                                          ARRAY_SIZE(mx51babbage_pads));
360 }
361 
362 /*
363  * Board specific initialization.
364  */
365 static void __init mx51_babbage_init(void)
366 {
367         iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP;
368         iomux_v3_cfg_t power_key = NEW_PAD_CTRL(MX51_PAD_EIM_A27__GPIO2_21,
369                 PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH);
370 
371         imx51_soc_init();
372 
373         imx51_babbage_common_init();
374 
375         imx51_add_imx_uart(0, &uart_pdata);
376         imx51_add_imx_uart(1, NULL);
377         imx51_add_imx_uart(2, &uart_pdata);
378 
379         babbage_fec_reset();
380         imx51_add_fec(NULL);
381 
382         /* Set the PAD settings for the pwr key. */
383         mxc_iomux_v3_setup_pad(power_key);
384         imx_add_gpio_keys(&imx_button_data);
385 
386         imx51_add_imx_i2c(0, &babbage_i2c_data);
387         imx51_add_imx_i2c(1, &babbage_i2c_data);
388         imx51_add_hsi2c(&babbage_hsi2c_data);
389 
390         if (otg_mode_host)
391                 imx51_add_mxc_ehci_otg(&dr_utmi_config);
392         else {
393                 initialize_otg_port(NULL);
394                 imx51_add_fsl_usb2_udc(&usb_pdata);
395         }
396 
397         gpio_usbh1_active();
398         imx51_add_mxc_ehci_hs(1, &usbh1_config);
399         /* setback USBH1_STP to be function */
400         mxc_iomux_v3_setup_pad(usbh1stp);
401         babbage_usbhub_reset();
402 
403         imx51_add_sdhci_esdhc_imx(0, &mx51_babbage_sd1_data);
404         imx51_add_sdhci_esdhc_imx(1, &mx51_babbage_sd2_data);
405 
406         spi_register_board_info(mx51_babbage_spi_board_info,
407                 ARRAY_SIZE(mx51_babbage_spi_board_info));
408         imx51_add_ecspi(0, &mx51_babbage_spi_pdata);
409         imx51_add_imx2_wdt(0);
410 }
411 
412 static void __init mx51_babbage_timer_init(void)
413 {
414         mx51_clocks_init(32768, 24000000, 22579200, 0);
415 }
416 
417 MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board")
418         /* Maintainer: Amit Kucheria <amit.kucheria@canonical.com> */
419         .atag_offset = 0x100,
420         .map_io = mx51_map_io,
421         .init_early = imx51_init_early,
422         .init_irq = mx51_init_irq,
423         .handle_irq = imx51_handle_irq,
424         .init_time      = mx51_babbage_timer_init,
425         .init_machine = mx51_babbage_init,
426         .init_late      = imx51_init_late,
427         .restart        = mxc_restart,
428 MACHINE_END
429 

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