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TOMOYO Linux Cross Reference
Linux/arch/arm/mach-omap1/include/mach/mux.h

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  1 /*
  2  * arch/arm/plat-omap/include/mach/mux.h
  3  *
  4  * Table of the Omap register configurations for the FUNC_MUX and
  5  * PULL_DWN combinations.
  6  *
  7  * Copyright (C) 2004 - 2008 Texas Instruments Inc.
  8  * Copyright (C) 2003 - 2008 Nokia Corporation
  9  *
 10  * Written by Tony Lindgren
 11  *
 12  * This program is free software; you can redistribute it and/or modify
 13  * it under the terms of the GNU General Public License as published by
 14  * the Free Software Foundation; either version 2 of the License, or
 15  * (at your option) any later version.
 16  *
 17  * This program is distributed in the hope that it will be useful,
 18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 20  * GNU General Public License for more details.
 21  *
 22  * You should have received a copy of the GNU General Public License
 23  * along with this program; if not, write to the Free Software
 24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 25  *
 26  * NOTE: Please use the following naming style for new pin entries.
 27  *       For example, W8_1610_MMC2_DAT0, where:
 28  *       - W8        = ball
 29  *       - 1610      = 1510 or 1610, none if common for both 1510 and 1610
 30  *       - MMC2_DAT0 = function
 31  */
 32 
 33 #ifndef __ASM_ARCH_MUX_H
 34 #define __ASM_ARCH_MUX_H
 35 
 36 #define PU_PD_SEL_NA            0       /* No pu_pd reg available */
 37 #define PULL_DWN_CTRL_NA        0       /* No pull-down control needed */
 38 
 39 #ifdef  CONFIG_OMAP_MUX_DEBUG
 40 #define MUX_REG(reg, mode_offset, mode) .mux_reg_name = "FUNC_MUX_CTRL_"#reg, \
 41                                         .mux_reg = FUNC_MUX_CTRL_##reg, \
 42                                         .mask_offset = mode_offset, \
 43                                         .mask = mode,
 44 
 45 #define PULL_REG(reg, bit, status)      .pull_name = "PULL_DWN_CTRL_"#reg, \
 46                                         .pull_reg = PULL_DWN_CTRL_##reg, \
 47                                         .pull_bit = bit, \
 48                                         .pull_val = status,
 49 
 50 #define PU_PD_REG(reg, status)          .pu_pd_name = "PU_PD_SEL_"#reg, \
 51                                         .pu_pd_reg = PU_PD_SEL_##reg, \
 52                                         .pu_pd_val = status,
 53 
 54 #define MUX_REG_7XX(reg, mode_offset, mode) .mux_reg_name = "OMAP7XX_IO_CONF_"#reg, \
 55                                         .mux_reg = OMAP7XX_IO_CONF_##reg, \
 56                                         .mask_offset = mode_offset, \
 57                                         .mask = mode,
 58 
 59 #define PULL_REG_7XX(reg, bit, status)  .pull_name = "OMAP7XX_IO_CONF_"#reg, \
 60                                         .pull_reg = OMAP7XX_IO_CONF_##reg, \
 61                                         .pull_bit = bit, \
 62                                         .pull_val = status,
 63 
 64 #else
 65 
 66 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \
 67                                         .mask_offset = mode_offset, \
 68                                         .mask = mode,
 69 
 70 #define PULL_REG(reg, bit, status)      .pull_reg = PULL_DWN_CTRL_##reg, \
 71                                         .pull_bit = bit, \
 72                                         .pull_val = status,
 73 
 74 #define PU_PD_REG(reg, status)          .pu_pd_reg = PU_PD_SEL_##reg, \
 75                                         .pu_pd_val = status,
 76 
 77 #define MUX_REG_7XX(reg, mode_offset, mode) \
 78                                         .mux_reg = OMAP7XX_IO_CONF_##reg, \
 79                                         .mask_offset = mode_offset, \
 80                                         .mask = mode,
 81 
 82 #define PULL_REG_7XX(reg, bit, status)  .pull_reg = OMAP7XX_IO_CONF_##reg, \
 83                                         .pull_bit = bit, \
 84                                         .pull_val = status,
 85 
 86 #endif /* CONFIG_OMAP_MUX_DEBUG */
 87 
 88 #define MUX_CFG(desc, mux_reg, mode_offset, mode,       \
 89                 pull_reg, pull_bit, pull_status,        \
 90                 pu_pd_reg, pu_pd_status, debug_status)  \
 91 {                                                       \
 92         .name =  desc,                                  \
 93         .debug = debug_status,                          \
 94         MUX_REG(mux_reg, mode_offset, mode)             \
 95         PULL_REG(pull_reg, pull_bit, pull_status)       \
 96         PU_PD_REG(pu_pd_reg, pu_pd_status)              \
 97 },
 98 
 99 
100 /*
101  * OMAP730/850 has a slightly different config for the pin mux.
102  * - config regs are the OMAP7XX_IO_CONF_x regs (see omap7xx.h) regs and
103  *   not the FUNC_MUX_CTRL_x regs from hardware.h
104  * - for pull-up/down, only has one enable bit which is is in the same register
105  *   as mux config
106  */
107 #define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode,   \
108                    pull_bit, pull_status, debug_status)\
109 {                                                       \
110         .name =  desc,                                  \
111         .debug = debug_status,                          \
112         MUX_REG_7XX(mux_reg, mode_offset, mode)         \
113         PULL_REG_7XX(mux_reg, pull_bit, pull_status)    \
114         PU_PD_REG(NA, 0)                \
115 },
116 
117 struct pin_config {
118         char                    *name;
119         const unsigned int      mux_reg;
120         unsigned char           debug;
121 
122         const unsigned char mask_offset;
123         const unsigned char mask;
124 
125         const char *pull_name;
126         const unsigned int pull_reg;
127         const unsigned char pull_val;
128         const unsigned char pull_bit;
129 
130         const char *pu_pd_name;
131         const unsigned int pu_pd_reg;
132         const unsigned char pu_pd_val;
133 
134 #if     defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
135         const char *mux_reg_name;
136 #endif
137 
138 };
139 
140 enum omap7xx_index {
141         /* OMAP 730 keyboard */
142         E2_7XX_KBR0,
143         J7_7XX_KBR1,
144         E1_7XX_KBR2,
145         F3_7XX_KBR3,
146         D2_7XX_KBR4,
147         C2_7XX_KBC0,
148         D3_7XX_KBC1,
149         E4_7XX_KBC2,
150         F4_7XX_KBC3,
151         E3_7XX_KBC4,
152 
153         /* USB */
154         AA17_7XX_USB_DM,
155         W16_7XX_USB_PU_EN,
156         W17_7XX_USB_VBUSI,
157         W18_7XX_USB_DMCK_OUT,
158         W19_7XX_USB_DCRST,
159 
160         /* MMC */
161         MMC_7XX_CMD,
162         MMC_7XX_CLK,
163         MMC_7XX_DAT0,
164 
165         /* I2C */
166         I2C_7XX_SCL,
167         I2C_7XX_SDA,
168 
169         /* SPI */
170         SPI_7XX_1,
171         SPI_7XX_2,
172         SPI_7XX_3,
173         SPI_7XX_4,
174         SPI_7XX_5,
175         SPI_7XX_6,
176 
177         /* UART */
178         UART_7XX_1,
179         UART_7XX_2,
180 };
181 
182 enum omap1xxx_index {
183         /* UART1 (BT_UART_GATING)*/
184         UART1_TX = 0,
185         UART1_RTS,
186 
187         /* UART2 (COM_UART_GATING)*/
188         UART2_TX,
189         UART2_RX,
190         UART2_CTS,
191         UART2_RTS,
192 
193         /* UART3 (GIGA_UART_GATING) */
194         UART3_TX,
195         UART3_RX,
196         UART3_CTS,
197         UART3_RTS,
198         UART3_CLKREQ,
199         UART3_BCLK,     /* 12MHz clock out */
200         Y15_1610_UART3_RTS,
201 
202         /* PWT & PWL */
203         PWT,
204         PWL,
205 
206         /* USB master generic */
207         R18_USB_VBUS,
208         R18_1510_USB_GPIO0,
209         W4_USB_PUEN,
210         W4_USB_CLKO,
211         W4_USB_HIGHZ,
212         W4_GPIO58,
213 
214         /* USB1 master */
215         USB1_SUSP,
216         USB1_SEO,
217         W13_1610_USB1_SE0,
218         USB1_TXEN,
219         USB1_TXD,
220         USB1_VP,
221         USB1_VM,
222         USB1_RCV,
223         USB1_SPEED,
224         R13_1610_USB1_SPEED,
225         R13_1710_USB1_SE0,
226 
227         /* USB2 master */
228         USB2_SUSP,
229         USB2_VP,
230         USB2_TXEN,
231         USB2_VM,
232         USB2_RCV,
233         USB2_SEO,
234         USB2_TXD,
235 
236         /* OMAP-1510 GPIO */
237         R18_1510_GPIO0,
238         R19_1510_GPIO1,
239         M14_1510_GPIO2,
240 
241         /* OMAP1610 GPIO */
242         P18_1610_GPIO3,
243         Y15_1610_GPIO17,
244 
245         /* OMAP-1710 GPIO */
246         R18_1710_GPIO0,
247         V2_1710_GPIO10,
248         N21_1710_GPIO14,
249         W15_1710_GPIO40,
250 
251         /* MPUIO */
252         MPUIO2,
253         N15_1610_MPUIO2,
254         MPUIO4,
255         MPUIO5,
256         T20_1610_MPUIO5,
257         W11_1610_MPUIO6,
258         V10_1610_MPUIO7,
259         W11_1610_MPUIO9,
260         V10_1610_MPUIO10,
261         W10_1610_MPUIO11,
262         E20_1610_MPUIO13,
263         U20_1610_MPUIO14,
264         E19_1610_MPUIO15,
265 
266         /* MCBSP2 */
267         MCBSP2_CLKR,
268         MCBSP2_CLKX,
269         MCBSP2_DR,
270         MCBSP2_DX,
271         MCBSP2_FSR,
272         MCBSP2_FSX,
273 
274         /* MCBSP3 */
275         MCBSP3_CLKX,
276 
277         /* Misc ballouts */
278         BALLOUT_V8_ARMIO3,
279         N20_HDQ,
280 
281         /* OMAP-1610 MMC2 */
282         W8_1610_MMC2_DAT0,
283         V8_1610_MMC2_DAT1,
284         W15_1610_MMC2_DAT2,
285         R10_1610_MMC2_DAT3,
286         Y10_1610_MMC2_CLK,
287         Y8_1610_MMC2_CMD,
288         V9_1610_MMC2_CMDDIR,
289         V5_1610_MMC2_DATDIR0,
290         W19_1610_MMC2_DATDIR1,
291         R18_1610_MMC2_CLKIN,
292 
293         /* OMAP-1610 External Trace Interface */
294         M19_1610_ETM_PSTAT0,
295         L15_1610_ETM_PSTAT1,
296         L18_1610_ETM_PSTAT2,
297         L19_1610_ETM_D0,
298         J19_1610_ETM_D6,
299         J18_1610_ETM_D7,
300 
301         /* OMAP16XX GPIO */
302         P20_1610_GPIO4,
303         V9_1610_GPIO7,
304         W8_1610_GPIO9,
305         N20_1610_GPIO11,
306         N19_1610_GPIO13,
307         P10_1610_GPIO22,
308         V5_1610_GPIO24,
309         AA20_1610_GPIO_41,
310         W19_1610_GPIO48,
311         M7_1610_GPIO62,
312         V14_16XX_GPIO37,
313         R9_16XX_GPIO18,
314         L14_16XX_GPIO49,
315 
316         /* OMAP-1610 uWire */
317         V19_1610_UWIRE_SCLK,
318         U18_1610_UWIRE_SDI,
319         W21_1610_UWIRE_SDO,
320         N14_1610_UWIRE_CS0,
321         P15_1610_UWIRE_CS3,
322         N15_1610_UWIRE_CS1,
323 
324         /* OMAP-1610 SPI */
325         U19_1610_SPIF_SCK,
326         U18_1610_SPIF_DIN,
327         P20_1610_SPIF_DIN,
328         W21_1610_SPIF_DOUT,
329         R18_1610_SPIF_DOUT,
330         N14_1610_SPIF_CS0,
331         N15_1610_SPIF_CS1,
332         T19_1610_SPIF_CS2,
333         P15_1610_SPIF_CS3,
334 
335         /* OMAP-1610 Flash */
336         L3_1610_FLASH_CS2B_OE,
337         M8_1610_FLASH_CS2B_WE,
338 
339         /* First MMC */
340         MMC_CMD,
341         MMC_DAT1,
342         MMC_DAT2,
343         MMC_DAT0,
344         MMC_CLK,
345         MMC_DAT3,
346 
347         /* OMAP-1710 MMC CMDDIR and DATDIR0 */
348         M15_1710_MMC_CLKI,
349         P19_1710_MMC_CMDDIR,
350         P20_1710_MMC_DATDIR0,
351 
352         /* OMAP-1610 USB0 alternate pin configuration */
353         W9_USB0_TXEN,
354         AA9_USB0_VP,
355         Y5_USB0_RCV,
356         R9_USB0_VM,
357         V6_USB0_TXD,
358         W5_USB0_SE0,
359         V9_USB0_SPEED,
360         V9_USB0_SUSP,
361 
362         /* USB2 */
363         W9_USB2_TXEN,
364         AA9_USB2_VP,
365         Y5_USB2_RCV,
366         R9_USB2_VM,
367         V6_USB2_TXD,
368         W5_USB2_SE0,
369 
370         /* 16XX UART */
371         R13_1610_UART1_TX,
372         V14_16XX_UART1_RX,
373         R14_1610_UART1_CTS,
374         AA15_1610_UART1_RTS,
375         R9_16XX_UART2_RX,
376         L14_16XX_UART3_RX,
377 
378         /* I2C OMAP-1610 */
379         I2C_SCL,
380         I2C_SDA,
381 
382         /* Keypad */
383         F18_1610_KBC0,
384         D20_1610_KBC1,
385         D19_1610_KBC2,
386         E18_1610_KBC3,
387         C21_1610_KBC4,
388         G18_1610_KBR0,
389         F19_1610_KBR1,
390         H14_1610_KBR2,
391         E20_1610_KBR3,
392         E19_1610_KBR4,
393         N19_1610_KBR5,
394 
395         /* Power management */
396         T20_1610_LOW_PWR,
397 
398         /* MCLK Settings */
399         V5_1710_MCLK_ON,
400         V5_1710_MCLK_OFF,
401         R10_1610_MCLK_ON,
402         R10_1610_MCLK_OFF,
403 
404         /* CompactFlash controller */
405         P11_1610_CF_CD2,
406         R11_1610_CF_IOIS16,
407         V10_1610_CF_IREQ,
408         W10_1610_CF_RESET,
409         W11_1610_CF_CD1,
410 
411         /* parallel camera */
412         J15_1610_CAM_LCLK,
413         J18_1610_CAM_D7,
414         J19_1610_CAM_D6,
415         J14_1610_CAM_D5,
416         K18_1610_CAM_D4,
417         K19_1610_CAM_D3,
418         K15_1610_CAM_D2,
419         K14_1610_CAM_D1,
420         L19_1610_CAM_D0,
421         L18_1610_CAM_VS,
422         L15_1610_CAM_HS,
423         M19_1610_CAM_RSTZ,
424         Y15_1610_CAM_OUTCLK,
425 
426         /* serial camera */
427         H19_1610_CAM_EXCLK,
428         Y12_1610_CCP_CLKP,
429         W13_1610_CCP_CLKM,
430         W14_1610_CCP_DATAP,
431         Y14_1610_CCP_DATAM,
432 
433 };
434 
435 struct omap_mux_cfg {
436         struct pin_config       *pins;
437         unsigned long           size;
438         int                     (*cfg_reg)(const struct pin_config *cfg);
439 };
440 
441 #ifdef  CONFIG_OMAP_MUX
442 /* setup pin muxing in Linux */
443 extern int omap1_mux_init(void);
444 extern int omap_mux_register(struct omap_mux_cfg *);
445 extern int omap_cfg_reg(unsigned long reg_cfg);
446 #else
447 /* boot loader does it all (no warnings from CONFIG_OMAP_MUX_WARNINGS) */
448 static inline int omap1_mux_init(void) { return 0; }
449 static inline int omap_cfg_reg(unsigned long reg_cfg) { return 0; }
450 #endif
451 
452 extern int omap2_mux_init(void);
453 
454 #endif
455 

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