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Linux/arch/arm/mach-omap2/powerdomain.h

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  1 /*
  2  * OMAP2/3/4 powerdomain control
  3  *
  4  * Copyright (C) 2007-2008, 2010 Texas Instruments, Inc.
  5  * Copyright (C) 2007-2011 Nokia Corporation
  6  *
  7  * Paul Walmsley
  8  *
  9  * This program is free software; you can redistribute it and/or modify
 10  * it under the terms of the GNU General Public License version 2 as
 11  * published by the Free Software Foundation.
 12  *
 13  * XXX This should be moved to the mach-omap2/ directory at the earliest
 14  * opportunity.
 15  */
 16 
 17 #ifndef __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
 18 #define __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
 19 
 20 #include <linux/types.h>
 21 #include <linux/list.h>
 22 #include <linux/spinlock.h>
 23 
 24 /* Powerdomain basic power states */
 25 #define PWRDM_POWER_OFF         0x0
 26 #define PWRDM_POWER_RET         0x1
 27 #define PWRDM_POWER_INACTIVE    0x2
 28 #define PWRDM_POWER_ON          0x3
 29 
 30 #define PWRDM_MAX_PWRSTS        4
 31 
 32 /* Powerdomain allowable state bitfields */
 33 #define PWRSTS_ON               (1 << PWRDM_POWER_ON)
 34 #define PWRSTS_INACTIVE         (1 << PWRDM_POWER_INACTIVE)
 35 #define PWRSTS_RET              (1 << PWRDM_POWER_RET)
 36 #define PWRSTS_OFF              (1 << PWRDM_POWER_OFF)
 37 
 38 #define PWRSTS_OFF_ON           (PWRSTS_OFF | PWRSTS_ON)
 39 #define PWRSTS_OFF_RET          (PWRSTS_OFF | PWRSTS_RET)
 40 #define PWRSTS_RET_ON           (PWRSTS_RET | PWRSTS_ON)
 41 #define PWRSTS_OFF_RET_ON       (PWRSTS_OFF_RET | PWRSTS_ON)
 42 #define PWRSTS_INA_ON           (PWRSTS_INACTIVE | PWRSTS_ON)
 43 
 44 
 45 /*
 46  * Powerdomain flags (struct powerdomain.flags)
 47  *
 48  * PWRDM_HAS_HDWR_SAR - powerdomain has hardware save-and-restore support
 49  *
 50  * PWRDM_HAS_MPU_QUIRK - MPU pwr domain has MEM bank 0 bits in MEM
 51  * bank 1 position. This is true for OMAP3430
 52  *
 53  * PWRDM_HAS_LOWPOWERSTATECHANGE - can transition from a sleep state
 54  * to a lower sleep state without waking up the powerdomain
 55  */
 56 #define PWRDM_HAS_HDWR_SAR              BIT(0)
 57 #define PWRDM_HAS_MPU_QUIRK             BIT(1)
 58 #define PWRDM_HAS_LOWPOWERSTATECHANGE   BIT(2)
 59 
 60 /*
 61  * Number of memory banks that are power-controllable.  On OMAP4430, the
 62  * maximum is 5.
 63  */
 64 #define PWRDM_MAX_MEM_BANKS     5
 65 
 66 /*
 67  * Maximum number of clockdomains that can be associated with a powerdomain.
 68  * PER powerdomain on AM33XX is the worst case
 69  */
 70 #define PWRDM_MAX_CLKDMS        11
 71 
 72 /* XXX A completely arbitrary number. What is reasonable here? */
 73 #define PWRDM_TRANSITION_BAILOUT 100000
 74 
 75 struct clockdomain;
 76 struct powerdomain;
 77 struct voltagedomain;
 78 
 79 /**
 80  * struct powerdomain - OMAP powerdomain
 81  * @name: Powerdomain name
 82  * @voltdm: voltagedomain containing this powerdomain
 83  * @prcm_offs: the address offset from CM_BASE/PRM_BASE
 84  * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs
 85  * @pwrsts: Possible powerdomain power states
 86  * @pwrsts_logic_ret: Possible logic power states when pwrdm in RETENTION
 87  * @flags: Powerdomain flags
 88  * @banks: Number of software-controllable memory banks in this powerdomain
 89  * @pwrsts_mem_ret: Possible memory bank pwrstates when pwrdm in RETENTION
 90  * @pwrsts_mem_on: Possible memory bank pwrstates when pwrdm in ON
 91  * @pwrdm_clkdms: Clockdomains in this powerdomain
 92  * @node: list_head linking all powerdomains
 93  * @voltdm_node: list_head linking all powerdomains in a voltagedomain
 94  * @pwrstctrl_offs: (AM33XX only) XXX_PWRSTCTRL reg offset from prcm_offs
 95  * @pwrstst_offs: (AM33XX only) XXX_PWRSTST reg offset from prcm_offs
 96  * @logicretstate_mask: (AM33XX only) mask for logic retention bitfield
 97  *      in @pwrstctrl_offs
 98  * @mem_on_mask: (AM33XX only) mask for mem on bitfield in @pwrstctrl_offs
 99  * @mem_ret_mask: (AM33XX only) mask for mem ret bitfield in @pwrstctrl_offs
100  * @mem_pwrst_mask: (AM33XX only) mask for mem state bitfield in @pwrstst_offs
101  * @mem_retst_mask: (AM33XX only) mask for mem retention state bitfield
102  *      in @pwrstctrl_offs
103  * @state:
104  * @state_counter:
105  * @timer:
106  * @state_timer:
107  * @_lock: spinlock used to serialize powerdomain and some clockdomain ops
108  * @_lock_flags: stored flags when @_lock is taken
109  *
110  * @prcm_partition possible values are defined in mach-omap2/prcm44xx.h.
111  */
112 struct powerdomain {
113         const char *name;
114         union {
115                 const char *name;
116                 struct voltagedomain *ptr;
117         } voltdm;
118         const s16 prcm_offs;
119         const u8 pwrsts;
120         const u8 pwrsts_logic_ret;
121         const u8 flags;
122         const u8 banks;
123         const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS];
124         const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS];
125         const u8 prcm_partition;
126         struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS];
127         struct list_head node;
128         struct list_head voltdm_node;
129         int state;
130         unsigned state_counter[PWRDM_MAX_PWRSTS];
131         unsigned ret_logic_off_counter;
132         unsigned ret_mem_off_counter[PWRDM_MAX_MEM_BANKS];
133         spinlock_t _lock;
134         unsigned long _lock_flags;
135         const u8 pwrstctrl_offs;
136         const u8 pwrstst_offs;
137         const u32 logicretstate_mask;
138         const u32 mem_on_mask[PWRDM_MAX_MEM_BANKS];
139         const u32 mem_ret_mask[PWRDM_MAX_MEM_BANKS];
140         const u32 mem_pwrst_mask[PWRDM_MAX_MEM_BANKS];
141         const u32 mem_retst_mask[PWRDM_MAX_MEM_BANKS];
142 
143 #ifdef CONFIG_PM_DEBUG
144         s64 timer;
145         s64 state_timer[PWRDM_MAX_PWRSTS];
146 #endif
147 };
148 
149 /**
150  * struct pwrdm_ops - Arch specific function implementations
151  * @pwrdm_set_next_pwrst: Set the target power state for a pd
152  * @pwrdm_read_next_pwrst: Read the target power state set for a pd
153  * @pwrdm_read_pwrst: Read the current power state of a pd
154  * @pwrdm_read_prev_pwrst: Read the prev power state entered by the pd
155  * @pwrdm_set_logic_retst: Set the logic state in RET for a pd
156  * @pwrdm_set_mem_onst: Set the Memory state in ON for a pd
157  * @pwrdm_set_mem_retst: Set the Memory state in RET for a pd
158  * @pwrdm_read_logic_pwrst: Read the current logic state of a pd
159  * @pwrdm_read_prev_logic_pwrst: Read the previous logic state entered by a pd
160  * @pwrdm_read_logic_retst: Read the logic state in RET for a pd
161  * @pwrdm_read_mem_pwrst: Read the current memory state of a pd
162  * @pwrdm_read_prev_mem_pwrst: Read the previous memory state entered by a pd
163  * @pwrdm_read_mem_retst: Read the memory state in RET for a pd
164  * @pwrdm_clear_all_prev_pwrst: Clear all previous power states logged for a pd
165  * @pwrdm_enable_hdwr_sar: Enable Hardware Save-Restore feature for the pd
166  * @pwrdm_disable_hdwr_sar: Disable Hardware Save-Restore feature for a pd
167  * @pwrdm_set_lowpwrstchange: Enable pd transitions from a shallow to deep sleep
168  * @pwrdm_wait_transition: Wait for a pd state transition to complete
169  * @pwrdm_has_voltdm: Check if a voltdm association is needed
170  *
171  * Regarding @pwrdm_set_lowpwrstchange: On the OMAP2 and 3-family
172  * chips, a powerdomain's power state is not allowed to directly
173  * transition from one low-power state (e.g., CSWR) to another
174  * low-power state (e.g., OFF) without first waking up the
175  * powerdomain.  This wastes energy.  So OMAP4 chips support the
176  * ability to transition a powerdomain power state directly from one
177  * low-power state to another.  The function pointed to by
178  * @pwrdm_set_lowpwrstchange is intended to configure the OMAP4
179  * hardware powerdomain state machine to enable this feature.
180  */
181 struct pwrdm_ops {
182         int     (*pwrdm_set_next_pwrst)(struct powerdomain *pwrdm, u8 pwrst);
183         int     (*pwrdm_read_next_pwrst)(struct powerdomain *pwrdm);
184         int     (*pwrdm_read_pwrst)(struct powerdomain *pwrdm);
185         int     (*pwrdm_read_prev_pwrst)(struct powerdomain *pwrdm);
186         int     (*pwrdm_set_logic_retst)(struct powerdomain *pwrdm, u8 pwrst);
187         int     (*pwrdm_set_mem_onst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
188         int     (*pwrdm_set_mem_retst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
189         int     (*pwrdm_read_logic_pwrst)(struct powerdomain *pwrdm);
190         int     (*pwrdm_read_prev_logic_pwrst)(struct powerdomain *pwrdm);
191         int     (*pwrdm_read_logic_retst)(struct powerdomain *pwrdm);
192         int     (*pwrdm_read_mem_pwrst)(struct powerdomain *pwrdm, u8 bank);
193         int     (*pwrdm_read_prev_mem_pwrst)(struct powerdomain *pwrdm, u8 bank);
194         int     (*pwrdm_read_mem_retst)(struct powerdomain *pwrdm, u8 bank);
195         int     (*pwrdm_clear_all_prev_pwrst)(struct powerdomain *pwrdm);
196         int     (*pwrdm_enable_hdwr_sar)(struct powerdomain *pwrdm);
197         int     (*pwrdm_disable_hdwr_sar)(struct powerdomain *pwrdm);
198         int     (*pwrdm_set_lowpwrstchange)(struct powerdomain *pwrdm);
199         int     (*pwrdm_wait_transition)(struct powerdomain *pwrdm);
200         int     (*pwrdm_has_voltdm)(void);
201 };
202 
203 int pwrdm_register_platform_funcs(struct pwrdm_ops *custom_funcs);
204 int pwrdm_register_pwrdms(struct powerdomain **pwrdm_list);
205 int pwrdm_complete_init(void);
206 
207 struct powerdomain *pwrdm_lookup(const char *name);
208 
209 int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
210                         void *user);
211 int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user),
212                         void *user);
213 
214 int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
215 
216 int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm);
217 
218 u8 pwrdm_get_valid_lp_state(struct powerdomain *pwrdm,
219                             bool is_logic_state, u8 req_state);
220 
221 int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
222 int pwrdm_read_next_pwrst(struct powerdomain *pwrdm);
223 int pwrdm_read_pwrst(struct powerdomain *pwrdm);
224 int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm);
225 int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm);
226 
227 int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst);
228 int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
229 int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
230 
231 int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm);
232 int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm);
233 int pwrdm_read_logic_retst(struct powerdomain *pwrdm);
234 int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
235 int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
236 int pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank);
237 
238 int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm);
239 int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm);
240 bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
241 
242 int pwrdm_state_switch_nolock(struct powerdomain *pwrdm);
243 int pwrdm_state_switch(struct powerdomain *pwrdm);
244 int pwrdm_pre_transition(struct powerdomain *pwrdm);
245 int pwrdm_post_transition(struct powerdomain *pwrdm);
246 int pwrdm_get_context_loss_count(struct powerdomain *pwrdm);
247 bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm);
248 
249 extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 state);
250 
251 extern void omap242x_powerdomains_init(void);
252 extern void omap243x_powerdomains_init(void);
253 extern void omap3xxx_powerdomains_init(void);
254 extern void am33xx_powerdomains_init(void);
255 extern void omap44xx_powerdomains_init(void);
256 extern void omap54xx_powerdomains_init(void);
257 extern void dra7xx_powerdomains_init(void);
258 void am43xx_powerdomains_init(void);
259 
260 extern struct pwrdm_ops omap2_pwrdm_operations;
261 extern struct pwrdm_ops omap3_pwrdm_operations;
262 extern struct pwrdm_ops am33xx_pwrdm_operations;
263 extern struct pwrdm_ops omap4_pwrdm_operations;
264 
265 /* Common Internal functions used across OMAP rev's */
266 extern u32 omap2_pwrdm_get_mem_bank_onstate_mask(u8 bank);
267 extern u32 omap2_pwrdm_get_mem_bank_retst_mask(u8 bank);
268 extern u32 omap2_pwrdm_get_mem_bank_stst_mask(u8 bank);
269 
270 extern struct powerdomain wkup_omap2_pwrdm;
271 extern struct powerdomain gfx_omap2_pwrdm;
272 
273 extern void pwrdm_lock(struct powerdomain *pwrdm);
274 extern void pwrdm_unlock(struct powerdomain *pwrdm);
275 
276 #endif
277 

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