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Linux/arch/arm/mach-s3c24xx/mach-at2440evb.c

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  1 // SPDX-License-Identifier: GPL-2.0
  2 //
  3 // Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com>
  4 //      Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk>
  5 //      and modifications by SBZ <sbz@spgui.org> and
  6 //      Weibing <http://weibing.blogbus.com>
  7 //
  8 // For product information, visit http://www.arm.com/
  9 
 10 #include <linux/kernel.h>
 11 #include <linux/types.h>
 12 #include <linux/gpio/machine.h>
 13 #include <linux/interrupt.h>
 14 #include <linux/list.h>
 15 #include <linux/timer.h>
 16 #include <linux/init.h>
 17 #include <linux/io.h>
 18 #include <linux/serial_core.h>
 19 #include <linux/serial_s3c.h>
 20 #include <linux/dm9000.h>
 21 #include <linux/platform_device.h>
 22 
 23 #include <asm/mach/arch.h>
 24 #include <asm/mach/map.h>
 25 #include <asm/mach/irq.h>
 26 
 27 #include <mach/hardware.h>
 28 #include <mach/fb.h>
 29 #include <asm/irq.h>
 30 #include <asm/mach-types.h>
 31 
 32 #include <mach/regs-gpio.h>
 33 #include <mach/regs-lcd.h>
 34 #include <mach/gpio-samsung.h>
 35 #include <linux/platform_data/mtd-nand-s3c2410.h>
 36 #include <linux/platform_data/i2c-s3c2410.h>
 37 
 38 #include <linux/mtd/mtd.h>
 39 #include <linux/mtd/rawnand.h>
 40 #include <linux/mtd/nand_ecc.h>
 41 #include <linux/mtd/partitions.h>
 42 
 43 #include <plat/devs.h>
 44 #include <plat/cpu.h>
 45 #include <linux/platform_data/mmc-s3cmci.h>
 46 #include <plat/samsung-time.h>
 47 
 48 #include "common.h"
 49 
 50 static struct map_desc at2440evb_iodesc[] __initdata = {
 51         /* Nothing here */
 52 };
 53 
 54 #define UCON S3C2410_UCON_DEFAULT
 55 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
 56 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
 57 
 58 static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
 59         [0] = {
 60                 .hwport      = 0,
 61                 .flags       = 0,
 62                 .ucon        = UCON,
 63                 .ulcon       = ULCON,
 64                 .ufcon       = UFCON,
 65                 .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
 66         },
 67         [1] = {
 68                 .hwport      = 1,
 69                 .flags       = 0,
 70                 .ucon        = UCON,
 71                 .ulcon       = ULCON,
 72                 .ufcon       = UFCON,
 73                 .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
 74         },
 75 };
 76 
 77 /* NAND Flash on AT2440EVB board */
 78 
 79 static struct mtd_partition __initdata at2440evb_default_nand_part[] = {
 80         [0] = {
 81                 .name   = "Boot Agent",
 82                 .size   = SZ_256K,
 83                 .offset = 0,
 84         },
 85         [1] = {
 86                 .name   = "Kernel",
 87                 .size   = SZ_2M,
 88                 .offset = SZ_256K,
 89         },
 90         [2] = {
 91                 .name   = "Root",
 92                 .offset = SZ_256K + SZ_2M,
 93                 .size   = MTDPART_SIZ_FULL,
 94         },
 95 };
 96 
 97 static struct s3c2410_nand_set __initdata at2440evb_nand_sets[] = {
 98         [0] = {
 99                 .name           = "nand",
100                 .nr_chips       = 1,
101                 .nr_partitions  = ARRAY_SIZE(at2440evb_default_nand_part),
102                 .partitions     = at2440evb_default_nand_part,
103         },
104 };
105 
106 static struct s3c2410_platform_nand __initdata at2440evb_nand_info = {
107         .tacls          = 25,
108         .twrph0         = 55,
109         .twrph1         = 40,
110         .nr_sets        = ARRAY_SIZE(at2440evb_nand_sets),
111         .sets           = at2440evb_nand_sets,
112         .ecc_mode       = NAND_ECC_SOFT,
113 };
114 
115 /* DM9000AEP 10/100 ethernet controller */
116 
117 static struct resource at2440evb_dm9k_resource[] = {
118         [0] = DEFINE_RES_MEM(S3C2410_CS3, 4),
119         [1] = DEFINE_RES_MEM(S3C2410_CS3 + 4, 4),
120         [2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ \
121                                         | IORESOURCE_IRQ_HIGHEDGE),
122 };
123 
124 static struct dm9000_plat_data at2440evb_dm9k_pdata = {
125         .flags          = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
126 };
127 
128 static struct platform_device at2440evb_device_eth = {
129         .name           = "dm9000",
130         .id             = -1,
131         .num_resources  = ARRAY_SIZE(at2440evb_dm9k_resource),
132         .resource       = at2440evb_dm9k_resource,
133         .dev            = {
134                 .platform_data  = &at2440evb_dm9k_pdata,
135         },
136 };
137 
138 static struct s3c24xx_mci_pdata at2440evb_mci_pdata __initdata = {
139         /* Intentionally left blank */
140 };
141 
142 static struct gpiod_lookup_table at2440evb_mci_gpio_table = {
143         .dev_id = "s3c2410-sdi",
144         .table = {
145                 /* Card detect S3C2410_GPG(10) */
146                 GPIO_LOOKUP("GPG", 10, "cd", GPIO_ACTIVE_LOW),
147                 { },
148         },
149 };
150 
151 /* 7" LCD panel */
152 
153 static struct s3c2410fb_display at2440evb_lcd_cfg __initdata = {
154 
155         .lcdcon5        = S3C2410_LCDCON5_FRM565 |
156                           S3C2410_LCDCON5_INVVLINE |
157                           S3C2410_LCDCON5_INVVFRAME |
158                           S3C2410_LCDCON5_PWREN |
159                           S3C2410_LCDCON5_HWSWP,
160 
161         .type           = S3C2410_LCDCON1_TFT,
162 
163         .width          = 800,
164         .height         = 480,
165 
166         .pixclock       = 33333, /* HCLK 60 MHz, divisor 2 */
167         .xres           = 800,
168         .yres           = 480,
169         .bpp            = 16,
170         .left_margin    = 88,
171         .right_margin   = 40,
172         .hsync_len      = 128,
173         .upper_margin   = 32,
174         .lower_margin   = 11,
175         .vsync_len      = 2,
176 };
177 
178 static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = {
179         .displays       = &at2440evb_lcd_cfg,
180         .num_displays   = 1,
181         .default_display = 0,
182 };
183 
184 static struct platform_device *at2440evb_devices[] __initdata = {
185         &s3c_device_ohci,
186         &s3c_device_wdt,
187         &s3c_device_adc,
188         &s3c_device_i2c0,
189         &s3c_device_rtc,
190         &s3c_device_nand,
191         &s3c_device_sdi,
192         &s3c_device_lcd,
193         &at2440evb_device_eth,
194 };
195 
196 static void __init at2440evb_map_io(void)
197 {
198         s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc));
199         s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs));
200         samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
201 }
202 
203 static void __init at2440evb_init_time(void)
204 {
205         s3c2440_init_clocks(16934400);
206         samsung_timer_init();
207 }
208 
209 static void __init at2440evb_init(void)
210 {
211         s3c24xx_fb_set_platdata(&at2440evb_fb_info);
212         gpiod_add_lookup_table(&at2440evb_mci_gpio_table);
213         s3c24xx_mci_set_platdata(&at2440evb_mci_pdata);
214         s3c_nand_set_platdata(&at2440evb_nand_info);
215         s3c_i2c0_set_platdata(NULL);
216 
217         platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices));
218 }
219 
220 
221 MACHINE_START(AT2440EVB, "AT2440EVB")
222         .atag_offset    = 0x100,
223         .map_io         = at2440evb_map_io,
224         .init_machine   = at2440evb_init,
225         .init_irq       = s3c2440_init_irq,
226         .init_time      = at2440evb_init_time,
227 MACHINE_END
228 

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