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TOMOYO Linux Cross Reference
Linux/arch/arm/mach-sa1100/generic.c

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  1 /*
  2  * linux/arch/arm/mach-sa1100/generic.c
  3  *
  4  * Author: Nicolas Pitre
  5  *
  6  * Code common to all SA11x0 machines.
  7  *
  8  * This program is free software; you can redistribute it and/or modify
  9  * it under the terms of the GNU General Public License version 2 as
 10  * published by the Free Software Foundation.
 11  */
 12 #include <linux/gpio.h>
 13 #include <linux/module.h>
 14 #include <linux/kernel.h>
 15 #include <linux/init.h>
 16 #include <linux/delay.h>
 17 #include <linux/dma-mapping.h>
 18 #include <linux/pm.h>
 19 #include <linux/cpufreq.h>
 20 #include <linux/ioport.h>
 21 #include <linux/platform_device.h>
 22 #include <linux/reboot.h>
 23 
 24 #include <video/sa1100fb.h>
 25 
 26 #include <asm/div64.h>
 27 #include <asm/mach/map.h>
 28 #include <asm/mach/flash.h>
 29 #include <asm/irq.h>
 30 #include <asm/system_misc.h>
 31 
 32 #include <mach/hardware.h>
 33 #include <mach/irqs.h>
 34 #include <mach/reset.h>
 35 
 36 #include "generic.h"
 37 
 38 unsigned int reset_status;
 39 EXPORT_SYMBOL(reset_status);
 40 
 41 #define NR_FREQS        16
 42 
 43 /*
 44  * This table is setup for a 3.6864MHz Crystal.
 45  */
 46 static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
 47          590,   /*  59.0 MHz */
 48          737,   /*  73.7 MHz */
 49          885,   /*  88.5 MHz */
 50         1032,   /* 103.2 MHz */
 51         1180,   /* 118.0 MHz */
 52         1327,   /* 132.7 MHz */
 53         1475,   /* 147.5 MHz */
 54         1622,   /* 162.2 MHz */
 55         1769,   /* 176.9 MHz */
 56         1917,   /* 191.7 MHz */
 57         2064,   /* 206.4 MHz */
 58         2212,   /* 221.2 MHz */
 59         2359,   /* 235.9 MHz */
 60         2507,   /* 250.7 MHz */
 61         2654,   /* 265.4 MHz */
 62         2802    /* 280.2 MHz */
 63 };
 64 
 65 /* rounds up(!)  */
 66 unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
 67 {
 68         int i;
 69 
 70         khz /= 100;
 71 
 72         for (i = 0; i < NR_FREQS; i++)
 73                 if (cclk_frequency_100khz[i] >= khz)
 74                         break;
 75 
 76         return i;
 77 }
 78 
 79 unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
 80 {
 81         unsigned int freq = 0;
 82         if (idx < NR_FREQS)
 83                 freq = cclk_frequency_100khz[idx] * 100;
 84         return freq;
 85 }
 86 
 87 
 88 /* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
 89  * this platform, anyway.
 90  */
 91 int sa11x0_verify_speed(struct cpufreq_policy *policy)
 92 {
 93         unsigned int tmp;
 94         if (policy->cpu)
 95                 return -EINVAL;
 96 
 97         cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
 98 
 99         /* make sure that at least one frequency is within the policy */
100         tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100;
101         if (tmp > policy->max)
102                 policy->max = tmp;
103 
104         cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
105 
106         return 0;
107 }
108 
109 unsigned int sa11x0_getspeed(unsigned int cpu)
110 {
111         if (cpu)
112                 return 0;
113         return cclk_frequency_100khz[PPCR & 0xf] * 100;
114 }
115 
116 /*
117  * Default power-off for SA1100
118  */
119 static void sa1100_power_off(void)
120 {
121         mdelay(100);
122         local_irq_disable();
123         /* disable internal oscillator, float CS lines */
124         PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
125         /* enable wake-up on GPIO0 (Assabet...) */
126         PWER = GFER = GRER = 1;
127         /*
128          * set scratchpad to zero, just in case it is used as a
129          * restart address by the bootloader.
130          */
131         PSPR = 0;
132         /* enter sleep mode */
133         PMCR = PMCR_SF;
134 }
135 
136 void sa11x0_restart(enum reboot_mode mode, const char *cmd)
137 {
138         clear_reset_status(RESET_STATUS_ALL);
139 
140         if (mode == REBOOT_SOFT) {
141                 /* Jump into ROM at address 0 */
142                 soft_restart(0);
143         } else {
144                 /* Use on-chip reset capability */
145                 RSRR = RSRR_SWR;
146         }
147 }
148 
149 static void sa11x0_register_device(struct platform_device *dev, void *data)
150 {
151         int err;
152         dev->dev.platform_data = data;
153         err = platform_device_register(dev);
154         if (err)
155                 printk(KERN_ERR "Unable to register device %s: %d\n",
156                         dev->name, err);
157 }
158 
159 
160 static struct resource sa11x0udc_resources[] = {
161         [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K),
162         [1] = DEFINE_RES_IRQ(IRQ_Ser0UDC),
163 };
164 
165 static u64 sa11x0udc_dma_mask = 0xffffffffUL;
166 
167 static struct platform_device sa11x0udc_device = {
168         .name           = "sa11x0-udc",
169         .id             = -1,
170         .dev            = {
171                 .dma_mask = &sa11x0udc_dma_mask,
172                 .coherent_dma_mask = 0xffffffff,
173         },
174         .num_resources  = ARRAY_SIZE(sa11x0udc_resources),
175         .resource       = sa11x0udc_resources,
176 };
177 
178 static struct resource sa11x0uart1_resources[] = {
179         [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
180         [1] = DEFINE_RES_IRQ(IRQ_Ser1UART),
181 };
182 
183 static struct platform_device sa11x0uart1_device = {
184         .name           = "sa11x0-uart",
185         .id             = 1,
186         .num_resources  = ARRAY_SIZE(sa11x0uart1_resources),
187         .resource       = sa11x0uart1_resources,
188 };
189 
190 static struct resource sa11x0uart3_resources[] = {
191         [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K),
192         [1] = DEFINE_RES_IRQ(IRQ_Ser3UART),
193 };
194 
195 static struct platform_device sa11x0uart3_device = {
196         .name           = "sa11x0-uart",
197         .id             = 3,
198         .num_resources  = ARRAY_SIZE(sa11x0uart3_resources),
199         .resource       = sa11x0uart3_resources,
200 };
201 
202 static struct resource sa11x0mcp_resources[] = {
203         [0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K),
204         [1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4),
205         [2] = DEFINE_RES_IRQ(IRQ_Ser4MCP),
206 };
207 
208 static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
209 
210 static struct platform_device sa11x0mcp_device = {
211         .name           = "sa11x0-mcp",
212         .id             = -1,
213         .dev = {
214                 .dma_mask = &sa11x0mcp_dma_mask,
215                 .coherent_dma_mask = 0xffffffff,
216         },
217         .num_resources  = ARRAY_SIZE(sa11x0mcp_resources),
218         .resource       = sa11x0mcp_resources,
219 };
220 
221 void __init sa11x0_ppc_configure_mcp(void)
222 {
223         /* Setup the PPC unit for the MCP */
224         PPDR &= ~PPC_RXD4;
225         PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
226         PSDR |= PPC_RXD4;
227         PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
228         PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
229 }
230 
231 void sa11x0_register_mcp(struct mcp_plat_data *data)
232 {
233         sa11x0_register_device(&sa11x0mcp_device, data);
234 }
235 
236 static struct resource sa11x0ssp_resources[] = {
237         [0] = DEFINE_RES_MEM(0x80070000, SZ_64K),
238         [1] = DEFINE_RES_IRQ(IRQ_Ser4SSP),
239 };
240 
241 static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
242 
243 static struct platform_device sa11x0ssp_device = {
244         .name           = "sa11x0-ssp",
245         .id             = -1,
246         .dev = {
247                 .dma_mask = &sa11x0ssp_dma_mask,
248                 .coherent_dma_mask = 0xffffffff,
249         },
250         .num_resources  = ARRAY_SIZE(sa11x0ssp_resources),
251         .resource       = sa11x0ssp_resources,
252 };
253 
254 static struct resource sa11x0fb_resources[] = {
255         [0] = DEFINE_RES_MEM(0xb0100000, SZ_64K),
256         [1] = DEFINE_RES_IRQ(IRQ_LCD),
257 };
258 
259 static struct platform_device sa11x0fb_device = {
260         .name           = "sa11x0-fb",
261         .id             = -1,
262         .dev = {
263                 .coherent_dma_mask = 0xffffffff,
264         },
265         .num_resources  = ARRAY_SIZE(sa11x0fb_resources),
266         .resource       = sa11x0fb_resources,
267 };
268 
269 void sa11x0_register_lcd(struct sa1100fb_mach_info *inf)
270 {
271         sa11x0_register_device(&sa11x0fb_device, inf);
272 }
273 
274 static struct platform_device sa11x0pcmcia_device = {
275         .name           = "sa11x0-pcmcia",
276         .id             = -1,
277 };
278 
279 static struct platform_device sa11x0mtd_device = {
280         .name           = "sa1100-mtd",
281         .id             = -1,
282 };
283 
284 void sa11x0_register_mtd(struct flash_platform_data *flash,
285                          struct resource *res, int nr)
286 {
287         flash->name = "sa1100";
288         sa11x0mtd_device.resource = res;
289         sa11x0mtd_device.num_resources = nr;
290         sa11x0_register_device(&sa11x0mtd_device, flash);
291 }
292 
293 static struct resource sa11x0ir_resources[] = {
294         DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24),
295         DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c),
296         DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04),
297         DEFINE_RES_IRQ(IRQ_Ser2ICP),
298 };
299 
300 static struct platform_device sa11x0ir_device = {
301         .name           = "sa11x0-ir",
302         .id             = -1,
303         .num_resources  = ARRAY_SIZE(sa11x0ir_resources),
304         .resource       = sa11x0ir_resources,
305 };
306 
307 void sa11x0_register_irda(struct irda_platform_data *irda)
308 {
309         sa11x0_register_device(&sa11x0ir_device, irda);
310 }
311 
312 static struct resource sa1100_rtc_resources[] = {
313         DEFINE_RES_MEM(0x90010000, 0x40),
314         DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"),
315         DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"),
316 };
317 
318 static struct platform_device sa11x0rtc_device = {
319         .name           = "sa1100-rtc",
320         .id             = -1,
321         .num_resources  = ARRAY_SIZE(sa1100_rtc_resources),
322         .resource       = sa1100_rtc_resources,
323 };
324 
325 static struct resource sa11x0dma_resources[] = {
326         DEFINE_RES_MEM(DMA_PHYS, DMA_SIZE),
327         DEFINE_RES_IRQ(IRQ_DMA0),
328         DEFINE_RES_IRQ(IRQ_DMA1),
329         DEFINE_RES_IRQ(IRQ_DMA2),
330         DEFINE_RES_IRQ(IRQ_DMA3),
331         DEFINE_RES_IRQ(IRQ_DMA4),
332         DEFINE_RES_IRQ(IRQ_DMA5),
333 };
334 
335 static u64 sa11x0dma_dma_mask = DMA_BIT_MASK(32);
336 
337 static struct platform_device sa11x0dma_device = {
338         .name           = "sa11x0-dma",
339         .id             = -1,
340         .dev = {
341                 .dma_mask = &sa11x0dma_dma_mask,
342                 .coherent_dma_mask = 0xffffffff,
343         },
344         .num_resources  = ARRAY_SIZE(sa11x0dma_resources),
345         .resource       = sa11x0dma_resources,
346 };
347 
348 static struct platform_device *sa11x0_devices[] __initdata = {
349         &sa11x0udc_device,
350         &sa11x0uart1_device,
351         &sa11x0uart3_device,
352         &sa11x0ssp_device,
353         &sa11x0pcmcia_device,
354         &sa11x0rtc_device,
355         &sa11x0dma_device,
356 };
357 
358 static int __init sa1100_init(void)
359 {
360         pm_power_off = sa1100_power_off;
361         return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
362 }
363 
364 arch_initcall(sa1100_init);
365 
366 void __init sa11x0_init_late(void)
367 {
368         sa11x0_pm_init();
369 }
370 
371 /*
372  * Common I/O mapping:
373  *
374  * Typically, static virtual address mappings are as follow:
375  *
376  * 0xf0000000-0xf3ffffff:       miscellaneous stuff (CPLDs, etc.)
377  * 0xf4000000-0xf4ffffff:       SA-1111
378  * 0xf5000000-0xf5ffffff:       reserved (used by cache flushing area)
379  * 0xf6000000-0xfffeffff:       reserved (internal SA1100 IO defined above)
380  * 0xffff0000-0xffff0fff:       SA1100 exception vectors
381  * 0xffff2000-0xffff2fff:       Minicache copy_user_page area
382  *
383  * Below 0xe8000000 is reserved for vm allocation.
384  *
385  * The machine specific code must provide the extra mapping beside the
386  * default mapping provided here.
387  */
388 
389 static struct map_desc standard_io_desc[] __initdata = {
390         {       /* PCM */
391                 .virtual        =  0xf8000000,
392                 .pfn            = __phys_to_pfn(0x80000000),
393                 .length         = 0x00100000,
394                 .type           = MT_DEVICE
395         }, {    /* SCM */
396                 .virtual        =  0xfa000000,
397                 .pfn            = __phys_to_pfn(0x90000000),
398                 .length         = 0x00100000,
399                 .type           = MT_DEVICE
400         }, {    /* MER */
401                 .virtual        =  0xfc000000,
402                 .pfn            = __phys_to_pfn(0xa0000000),
403                 .length         = 0x00100000,
404                 .type           = MT_DEVICE
405         }, {    /* LCD + DMA */
406                 .virtual        =  0xfe000000,
407                 .pfn            = __phys_to_pfn(0xb0000000),
408                 .length         = 0x00200000,
409                 .type           = MT_DEVICE
410         },
411 };
412 
413 void __init sa1100_map_io(void)
414 {
415         iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
416 }
417 
418 /*
419  * Disable the memory bus request/grant signals on the SA1110 to
420  * ensure that we don't receive spurious memory requests.  We set
421  * the MBGNT signal false to ensure the SA1111 doesn't own the
422  * SDRAM bus.
423  */
424 void sa1110_mb_disable(void)
425 {
426         unsigned long flags;
427 
428         local_irq_save(flags);
429         
430         PGSR &= ~GPIO_MBGNT;
431         GPCR = GPIO_MBGNT;
432         GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
433 
434         GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
435 
436         local_irq_restore(flags);
437 }
438 
439 /*
440  * If the system is going to use the SA-1111 DMA engines, set up
441  * the memory bus request/grant pins.
442  */
443 void sa1110_mb_enable(void)
444 {
445         unsigned long flags;
446 
447         local_irq_save(flags);
448 
449         PGSR &= ~GPIO_MBGNT;
450         GPCR = GPIO_MBGNT;
451         GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
452 
453         GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
454         TUCR |= TUCR_MR;
455 
456         local_irq_restore(flags);
457 }
458 
459 

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