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TOMOYO Linux Cross Reference
Linux/arch/arm/mach-sa1100/generic.c

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  1 /*
  2  * linux/arch/arm/mach-sa1100/generic.c
  3  *
  4  * Author: Nicolas Pitre
  5  *
  6  * Code common to all SA11x0 machines.
  7  *
  8  * This program is free software; you can redistribute it and/or modify
  9  * it under the terms of the GNU General Public License version 2 as
 10  * published by the Free Software Foundation.
 11  */
 12 #include <linux/gpio.h>
 13 #include <linux/gpio/machine.h>
 14 #include <linux/module.h>
 15 #include <linux/kernel.h>
 16 #include <linux/init.h>
 17 #include <linux/delay.h>
 18 #include <linux/dma-mapping.h>
 19 #include <linux/pm.h>
 20 #include <linux/cpufreq.h>
 21 #include <linux/ioport.h>
 22 #include <linux/platform_device.h>
 23 #include <linux/reboot.h>
 24 #include <linux/regulator/fixed.h>
 25 #include <linux/regulator/machine.h>
 26 #include <linux/irqchip/irq-sa11x0.h>
 27 
 28 #include <video/sa1100fb.h>
 29 
 30 #include <soc/sa1100/pwer.h>
 31 
 32 #include <asm/div64.h>
 33 #include <asm/mach/map.h>
 34 #include <asm/mach/flash.h>
 35 #include <asm/irq.h>
 36 #include <asm/system_misc.h>
 37 
 38 #include <mach/hardware.h>
 39 #include <mach/irqs.h>
 40 #include <mach/reset.h>
 41 
 42 #include "generic.h"
 43 #include <clocksource/pxa.h>
 44 
 45 unsigned int reset_status;
 46 EXPORT_SYMBOL(reset_status);
 47 
 48 #define NR_FREQS        16
 49 
 50 /*
 51  * This table is setup for a 3.6864MHz Crystal.
 52  */
 53 struct cpufreq_frequency_table sa11x0_freq_table[NR_FREQS+1] = {
 54         { .frequency = 59000,   /*  59.0 MHz */},
 55         { .frequency = 73700,   /*  73.7 MHz */},
 56         { .frequency = 88500,   /*  88.5 MHz */},
 57         { .frequency = 103200,  /* 103.2 MHz */},
 58         { .frequency = 118000,  /* 118.0 MHz */},
 59         { .frequency = 132700,  /* 132.7 MHz */},
 60         { .frequency = 147500,  /* 147.5 MHz */},
 61         { .frequency = 162200,  /* 162.2 MHz */},
 62         { .frequency = 176900,  /* 176.9 MHz */},
 63         { .frequency = 191700,  /* 191.7 MHz */},
 64         { .frequency = 206400,  /* 206.4 MHz */},
 65         { .frequency = 221200,  /* 221.2 MHz */},
 66         { .frequency = 235900,  /* 235.9 MHz */},
 67         { .frequency = 250700,  /* 250.7 MHz */},
 68         { .frequency = 265400,  /* 265.4 MHz */},
 69         { .frequency = 280200,  /* 280.2 MHz */},
 70         { .frequency = CPUFREQ_TABLE_END, },
 71 };
 72 
 73 unsigned int sa11x0_getspeed(unsigned int cpu)
 74 {
 75         if (cpu)
 76                 return 0;
 77         return sa11x0_freq_table[PPCR & 0xf].frequency;
 78 }
 79 
 80 /*
 81  * Default power-off for SA1100
 82  */
 83 static void sa1100_power_off(void)
 84 {
 85         mdelay(100);
 86         local_irq_disable();
 87         /* disable internal oscillator, float CS lines */
 88         PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
 89         /* enable wake-up on GPIO0 (Assabet...) */
 90         PWER = GFER = GRER = 1;
 91         /*
 92          * set scratchpad to zero, just in case it is used as a
 93          * restart address by the bootloader.
 94          */
 95         PSPR = 0;
 96         /* enter sleep mode */
 97         PMCR = PMCR_SF;
 98 }
 99 
100 void sa11x0_restart(enum reboot_mode mode, const char *cmd)
101 {
102         clear_reset_status(RESET_STATUS_ALL);
103 
104         if (mode == REBOOT_SOFT) {
105                 /* Jump into ROM at address 0 */
106                 soft_restart(0);
107         } else {
108                 /* Use on-chip reset capability */
109                 RSRR = RSRR_SWR;
110         }
111 }
112 
113 static void sa11x0_register_device(struct platform_device *dev, void *data)
114 {
115         int err;
116         dev->dev.platform_data = data;
117         err = platform_device_register(dev);
118         if (err)
119                 printk(KERN_ERR "Unable to register device %s: %d\n",
120                         dev->name, err);
121 }
122 
123 
124 static struct resource sa11x0udc_resources[] = {
125         [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K),
126         [1] = DEFINE_RES_IRQ(IRQ_Ser0UDC),
127 };
128 
129 static u64 sa11x0udc_dma_mask = 0xffffffffUL;
130 
131 static struct platform_device sa11x0udc_device = {
132         .name           = "sa11x0-udc",
133         .id             = -1,
134         .dev            = {
135                 .dma_mask = &sa11x0udc_dma_mask,
136                 .coherent_dma_mask = 0xffffffff,
137         },
138         .num_resources  = ARRAY_SIZE(sa11x0udc_resources),
139         .resource       = sa11x0udc_resources,
140 };
141 
142 static struct resource sa11x0uart1_resources[] = {
143         [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
144         [1] = DEFINE_RES_IRQ(IRQ_Ser1UART),
145 };
146 
147 static struct platform_device sa11x0uart1_device = {
148         .name           = "sa11x0-uart",
149         .id             = 1,
150         .num_resources  = ARRAY_SIZE(sa11x0uart1_resources),
151         .resource       = sa11x0uart1_resources,
152 };
153 
154 static struct resource sa11x0uart3_resources[] = {
155         [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K),
156         [1] = DEFINE_RES_IRQ(IRQ_Ser3UART),
157 };
158 
159 static struct platform_device sa11x0uart3_device = {
160         .name           = "sa11x0-uart",
161         .id             = 3,
162         .num_resources  = ARRAY_SIZE(sa11x0uart3_resources),
163         .resource       = sa11x0uart3_resources,
164 };
165 
166 static struct resource sa11x0mcp_resources[] = {
167         [0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K),
168         [1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4),
169         [2] = DEFINE_RES_IRQ(IRQ_Ser4MCP),
170 };
171 
172 static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
173 
174 static struct platform_device sa11x0mcp_device = {
175         .name           = "sa11x0-mcp",
176         .id             = -1,
177         .dev = {
178                 .dma_mask = &sa11x0mcp_dma_mask,
179                 .coherent_dma_mask = 0xffffffff,
180         },
181         .num_resources  = ARRAY_SIZE(sa11x0mcp_resources),
182         .resource       = sa11x0mcp_resources,
183 };
184 
185 void __init sa11x0_ppc_configure_mcp(void)
186 {
187         /* Setup the PPC unit for the MCP */
188         PPDR &= ~PPC_RXD4;
189         PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
190         PSDR |= PPC_RXD4;
191         PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
192         PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
193 }
194 
195 void sa11x0_register_mcp(struct mcp_plat_data *data)
196 {
197         sa11x0_register_device(&sa11x0mcp_device, data);
198 }
199 
200 static struct resource sa11x0ssp_resources[] = {
201         [0] = DEFINE_RES_MEM(0x80070000, SZ_64K),
202         [1] = DEFINE_RES_IRQ(IRQ_Ser4SSP),
203 };
204 
205 static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
206 
207 static struct platform_device sa11x0ssp_device = {
208         .name           = "sa11x0-ssp",
209         .id             = -1,
210         .dev = {
211                 .dma_mask = &sa11x0ssp_dma_mask,
212                 .coherent_dma_mask = 0xffffffff,
213         },
214         .num_resources  = ARRAY_SIZE(sa11x0ssp_resources),
215         .resource       = sa11x0ssp_resources,
216 };
217 
218 static struct resource sa11x0fb_resources[] = {
219         [0] = DEFINE_RES_MEM(0xb0100000, SZ_64K),
220         [1] = DEFINE_RES_IRQ(IRQ_LCD),
221 };
222 
223 static struct platform_device sa11x0fb_device = {
224         .name           = "sa11x0-fb",
225         .id             = -1,
226         .dev = {
227                 .coherent_dma_mask = 0xffffffff,
228         },
229         .num_resources  = ARRAY_SIZE(sa11x0fb_resources),
230         .resource       = sa11x0fb_resources,
231 };
232 
233 void sa11x0_register_lcd(struct sa1100fb_mach_info *inf)
234 {
235         sa11x0_register_device(&sa11x0fb_device, inf);
236 }
237 
238 void sa11x0_register_pcmcia(int socket, struct gpiod_lookup_table *table)
239 {
240         if (table)
241                 gpiod_add_lookup_table(table);
242         platform_device_register_simple("sa11x0-pcmcia", socket, NULL, 0);
243 }
244 
245 static struct platform_device sa11x0mtd_device = {
246         .name           = "sa1100-mtd",
247         .id             = -1,
248 };
249 
250 void sa11x0_register_mtd(struct flash_platform_data *flash,
251                          struct resource *res, int nr)
252 {
253         flash->name = "sa1100";
254         sa11x0mtd_device.resource = res;
255         sa11x0mtd_device.num_resources = nr;
256         sa11x0_register_device(&sa11x0mtd_device, flash);
257 }
258 
259 static struct resource sa11x0ir_resources[] = {
260         DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24),
261         DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c),
262         DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04),
263         DEFINE_RES_IRQ(IRQ_Ser2ICP),
264 };
265 
266 static struct platform_device sa11x0ir_device = {
267         .name           = "sa11x0-ir",
268         .id             = -1,
269         .num_resources  = ARRAY_SIZE(sa11x0ir_resources),
270         .resource       = sa11x0ir_resources,
271 };
272 
273 void sa11x0_register_irda(struct irda_platform_data *irda)
274 {
275         sa11x0_register_device(&sa11x0ir_device, irda);
276 }
277 
278 static struct resource sa1100_rtc_resources[] = {
279         DEFINE_RES_MEM(0x90010000, 0x40),
280         DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"),
281         DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"),
282 };
283 
284 static struct platform_device sa11x0rtc_device = {
285         .name           = "sa1100-rtc",
286         .id             = -1,
287         .num_resources  = ARRAY_SIZE(sa1100_rtc_resources),
288         .resource       = sa1100_rtc_resources,
289 };
290 
291 static struct resource sa11x0dma_resources[] = {
292         DEFINE_RES_MEM(DMA_PHYS, DMA_SIZE),
293         DEFINE_RES_IRQ(IRQ_DMA0),
294         DEFINE_RES_IRQ(IRQ_DMA1),
295         DEFINE_RES_IRQ(IRQ_DMA2),
296         DEFINE_RES_IRQ(IRQ_DMA3),
297         DEFINE_RES_IRQ(IRQ_DMA4),
298         DEFINE_RES_IRQ(IRQ_DMA5),
299 };
300 
301 static u64 sa11x0dma_dma_mask = DMA_BIT_MASK(32);
302 
303 static struct platform_device sa11x0dma_device = {
304         .name           = "sa11x0-dma",
305         .id             = -1,
306         .dev = {
307                 .dma_mask = &sa11x0dma_dma_mask,
308                 .coherent_dma_mask = 0xffffffff,
309         },
310         .num_resources  = ARRAY_SIZE(sa11x0dma_resources),
311         .resource       = sa11x0dma_resources,
312 };
313 
314 static struct platform_device *sa11x0_devices[] __initdata = {
315         &sa11x0udc_device,
316         &sa11x0uart1_device,
317         &sa11x0uart3_device,
318         &sa11x0ssp_device,
319         &sa11x0rtc_device,
320         &sa11x0dma_device,
321 };
322 
323 static int __init sa1100_init(void)
324 {
325         pm_power_off = sa1100_power_off;
326 
327         regulator_has_full_constraints();
328 
329         return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
330 }
331 
332 arch_initcall(sa1100_init);
333 
334 void __init sa11x0_init_late(void)
335 {
336         sa11x0_pm_init();
337 }
338 
339 int __init sa11x0_register_fixed_regulator(int n,
340         struct fixed_voltage_config *cfg,
341         struct regulator_consumer_supply *supplies, unsigned num_supplies,
342         bool uses_gpio)
343 {
344         struct regulator_init_data *id;
345 
346         cfg->init_data = id = kzalloc(sizeof(*cfg->init_data), GFP_KERNEL);
347         if (!cfg->init_data)
348                 return -ENOMEM;
349 
350         if (!uses_gpio)
351                 id->constraints.always_on = 1;
352         id->constraints.name = cfg->supply_name;
353         id->constraints.min_uV = cfg->microvolts;
354         id->constraints.max_uV = cfg->microvolts;
355         id->constraints.valid_modes_mask = REGULATOR_MODE_NORMAL;
356         id->constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS;
357         id->consumer_supplies = supplies;
358         id->num_consumer_supplies = num_supplies;
359 
360         platform_device_register_resndata(NULL, "reg-fixed-voltage", n,
361                                           NULL, 0, cfg, sizeof(*cfg));
362         return 0;
363 }
364 
365 /*
366  * Common I/O mapping:
367  *
368  * Typically, static virtual address mappings are as follow:
369  *
370  * 0xf0000000-0xf3ffffff:       miscellaneous stuff (CPLDs, etc.)
371  * 0xf4000000-0xf4ffffff:       SA-1111
372  * 0xf5000000-0xf5ffffff:       reserved (used by cache flushing area)
373  * 0xf6000000-0xfffeffff:       reserved (internal SA1100 IO defined above)
374  * 0xffff0000-0xffff0fff:       SA1100 exception vectors
375  * 0xffff2000-0xffff2fff:       Minicache copy_user_page area
376  *
377  * Below 0xe8000000 is reserved for vm allocation.
378  *
379  * The machine specific code must provide the extra mapping beside the
380  * default mapping provided here.
381  */
382 
383 static struct map_desc standard_io_desc[] __initdata = {
384         {       /* PCM */
385                 .virtual        =  0xf8000000,
386                 .pfn            = __phys_to_pfn(0x80000000),
387                 .length         = 0x00100000,
388                 .type           = MT_DEVICE
389         }, {    /* SCM */
390                 .virtual        =  0xfa000000,
391                 .pfn            = __phys_to_pfn(0x90000000),
392                 .length         = 0x00100000,
393                 .type           = MT_DEVICE
394         }, {    /* MER */
395                 .virtual        =  0xfc000000,
396                 .pfn            = __phys_to_pfn(0xa0000000),
397                 .length         = 0x00100000,
398                 .type           = MT_DEVICE
399         }, {    /* LCD + DMA */
400                 .virtual        =  0xfe000000,
401                 .pfn            = __phys_to_pfn(0xb0000000),
402                 .length         = 0x00200000,
403                 .type           = MT_DEVICE
404         },
405 };
406 
407 void __init sa1100_map_io(void)
408 {
409         iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
410 }
411 
412 void __init sa1100_timer_init(void)
413 {
414         pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x90000000));
415 }
416 
417 static struct resource irq_resource =
418         DEFINE_RES_MEM_NAMED(0x90050000, SZ_64K, "irqs");
419 
420 void __init sa1100_init_irq(void)
421 {
422         request_resource(&iomem_resource, &irq_resource);
423 
424         sa11x0_init_irq_nodt(IRQ_GPIO0_SC, irq_resource.start);
425 
426         sa1100_init_gpio();
427         sa11xx_clk_init();
428 }
429 
430 /*
431  * Disable the memory bus request/grant signals on the SA1110 to
432  * ensure that we don't receive spurious memory requests.  We set
433  * the MBGNT signal false to ensure the SA1111 doesn't own the
434  * SDRAM bus.
435  */
436 void sa1110_mb_disable(void)
437 {
438         unsigned long flags;
439 
440         local_irq_save(flags);
441         
442         PGSR &= ~GPIO_MBGNT;
443         GPCR = GPIO_MBGNT;
444         GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
445 
446         GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
447 
448         local_irq_restore(flags);
449 }
450 
451 /*
452  * If the system is going to use the SA-1111 DMA engines, set up
453  * the memory bus request/grant pins.
454  */
455 void sa1110_mb_enable(void)
456 {
457         unsigned long flags;
458 
459         local_irq_save(flags);
460 
461         PGSR &= ~GPIO_MBGNT;
462         GPCR = GPIO_MBGNT;
463         GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
464 
465         GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
466         TUCR |= TUCR_MR;
467 
468         local_irq_restore(flags);
469 }
470 
471 int sa11x0_gpio_set_wake(unsigned int gpio, unsigned int on)
472 {
473         if (on)
474                 PWER |= BIT(gpio);
475         else
476                 PWER &= ~BIT(gpio);
477 
478         return 0;
479 }
480 
481 int sa11x0_sc_set_wake(unsigned int irq, unsigned int on)
482 {
483         if (BIT(irq) != IC_RTCAlrm)
484                 return -EINVAL;
485 
486         if (on)
487                 PWER |= PWER_RTC;
488         else
489                 PWER &= ~PWER_RTC;
490 
491         return 0;
492 }
493 

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