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Linux/arch/arm/mach-shmobile/setup-r8a7779.c

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  1 /*
  2  * r8a7779 processor support
  3  *
  4  * Copyright (C) 2011  Renesas Solutions Corp.
  5  * Copyright (C) 2011  Magnus Damm
  6  *
  7  * This program is free software; you can redistribute it and/or modify
  8  * it under the terms of the GNU General Public License as published by
  9  * the Free Software Foundation; version 2 of the License.
 10  *
 11  * This program is distributed in the hope that it will be useful,
 12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 14  * GNU General Public License for more details.
 15  *
 16  * You should have received a copy of the GNU General Public License
 17  * along with this program; if not, write to the Free Software
 18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 19  */
 20 #include <linux/kernel.h>
 21 #include <linux/init.h>
 22 #include <linux/interrupt.h>
 23 #include <linux/irq.h>
 24 #include <linux/platform_device.h>
 25 #include <linux/delay.h>
 26 #include <linux/input.h>
 27 #include <linux/io.h>
 28 #include <linux/serial_sci.h>
 29 #include <linux/sh_intc.h>
 30 #include <linux/sh_timer.h>
 31 #include <mach/hardware.h>
 32 #include <mach/irqs.h>
 33 #include <mach/r8a7779.h>
 34 #include <mach/common.h>
 35 #include <asm/mach-types.h>
 36 #include <asm/mach/arch.h>
 37 #include <asm/mach/time.h>
 38 #include <asm/mach/map.h>
 39 #include <asm/hardware/cache-l2x0.h>
 40 
 41 static struct map_desc r8a7779_io_desc[] __initdata = {
 42         /* 2M entity map for 0xf0000000 (MPCORE) */
 43         {
 44                 .virtual        = 0xf0000000,
 45                 .pfn            = __phys_to_pfn(0xf0000000),
 46                 .length         = SZ_2M,
 47                 .type           = MT_DEVICE_NONSHARED
 48         },
 49         /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
 50         {
 51                 .virtual        = 0xfe000000,
 52                 .pfn            = __phys_to_pfn(0xfe000000),
 53                 .length         = SZ_16M,
 54                 .type           = MT_DEVICE_NONSHARED
 55         },
 56 };
 57 
 58 void __init r8a7779_map_io(void)
 59 {
 60         iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
 61 }
 62 
 63 static struct plat_sci_port scif0_platform_data = {
 64         .mapbase        = 0xffe40000,
 65         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 66         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
 67         .scbrr_algo_id  = SCBRR_ALGO_2,
 68         .type           = PORT_SCIF,
 69         .irqs           = { gic_spi(88), gic_spi(88),
 70                             gic_spi(88), gic_spi(88) },
 71 };
 72 
 73 static struct platform_device scif0_device = {
 74         .name           = "sh-sci",
 75         .id             = 0,
 76         .dev            = {
 77                 .platform_data  = &scif0_platform_data,
 78         },
 79 };
 80 
 81 static struct plat_sci_port scif1_platform_data = {
 82         .mapbase        = 0xffe41000,
 83         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 84         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
 85         .scbrr_algo_id  = SCBRR_ALGO_2,
 86         .type           = PORT_SCIF,
 87         .irqs           = { gic_spi(89), gic_spi(89),
 88                             gic_spi(89), gic_spi(89) },
 89 };
 90 
 91 static struct platform_device scif1_device = {
 92         .name           = "sh-sci",
 93         .id             = 1,
 94         .dev            = {
 95                 .platform_data  = &scif1_platform_data,
 96         },
 97 };
 98 
 99 static struct plat_sci_port scif2_platform_data = {
100         .mapbase        = 0xffe42000,
101         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
102         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
103         .scbrr_algo_id  = SCBRR_ALGO_2,
104         .type           = PORT_SCIF,
105         .irqs           = { gic_spi(90), gic_spi(90),
106                             gic_spi(90), gic_spi(90) },
107 };
108 
109 static struct platform_device scif2_device = {
110         .name           = "sh-sci",
111         .id             = 2,
112         .dev            = {
113                 .platform_data  = &scif2_platform_data,
114         },
115 };
116 
117 static struct plat_sci_port scif3_platform_data = {
118         .mapbase        = 0xffe43000,
119         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
120         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
121         .scbrr_algo_id  = SCBRR_ALGO_2,
122         .type           = PORT_SCIF,
123         .irqs           = { gic_spi(91), gic_spi(91),
124                             gic_spi(91), gic_spi(91) },
125 };
126 
127 static struct platform_device scif3_device = {
128         .name           = "sh-sci",
129         .id             = 3,
130         .dev            = {
131                 .platform_data  = &scif3_platform_data,
132         },
133 };
134 
135 static struct plat_sci_port scif4_platform_data = {
136         .mapbase        = 0xffe44000,
137         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
138         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
139         .scbrr_algo_id  = SCBRR_ALGO_2,
140         .type           = PORT_SCIF,
141         .irqs           = { gic_spi(92), gic_spi(92),
142                             gic_spi(92), gic_spi(92) },
143 };
144 
145 static struct platform_device scif4_device = {
146         .name           = "sh-sci",
147         .id             = 4,
148         .dev            = {
149                 .platform_data  = &scif4_platform_data,
150         },
151 };
152 
153 static struct plat_sci_port scif5_platform_data = {
154         .mapbase        = 0xffe45000,
155         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
156         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
157         .scbrr_algo_id  = SCBRR_ALGO_2,
158         .type           = PORT_SCIF,
159         .irqs           = { gic_spi(93), gic_spi(93),
160                             gic_spi(93), gic_spi(93) },
161 };
162 
163 static struct platform_device scif5_device = {
164         .name           = "sh-sci",
165         .id             = 5,
166         .dev            = {
167                 .platform_data  = &scif5_platform_data,
168         },
169 };
170 
171 /* TMU */
172 static struct sh_timer_config tmu00_platform_data = {
173         .name = "TMU00",
174         .channel_offset = 0x4,
175         .timer_bit = 0,
176         .clockevent_rating = 200,
177 };
178 
179 static struct resource tmu00_resources[] = {
180         [0] = {
181                 .name   = "TMU00",
182                 .start  = 0xffd80008,
183                 .end    = 0xffd80013,
184                 .flags  = IORESOURCE_MEM,
185         },
186         [1] = {
187                 .start  = gic_spi(32),
188                 .flags  = IORESOURCE_IRQ,
189         },
190 };
191 
192 static struct platform_device tmu00_device = {
193         .name           = "sh_tmu",
194         .id             = 0,
195         .dev = {
196                 .platform_data  = &tmu00_platform_data,
197         },
198         .resource       = tmu00_resources,
199         .num_resources  = ARRAY_SIZE(tmu00_resources),
200 };
201 
202 static struct sh_timer_config tmu01_platform_data = {
203         .name = "TMU01",
204         .channel_offset = 0x10,
205         .timer_bit = 1,
206         .clocksource_rating = 200,
207 };
208 
209 static struct resource tmu01_resources[] = {
210         [0] = {
211                 .name   = "TMU01",
212                 .start  = 0xffd80014,
213                 .end    = 0xffd8001f,
214                 .flags  = IORESOURCE_MEM,
215         },
216         [1] = {
217                 .start  = gic_spi(33),
218                 .flags  = IORESOURCE_IRQ,
219         },
220 };
221 
222 static struct platform_device tmu01_device = {
223         .name           = "sh_tmu",
224         .id             = 1,
225         .dev = {
226                 .platform_data  = &tmu01_platform_data,
227         },
228         .resource       = tmu01_resources,
229         .num_resources  = ARRAY_SIZE(tmu01_resources),
230 };
231 
232 static struct platform_device *r8a7779_early_devices[] __initdata = {
233         &scif0_device,
234         &scif1_device,
235         &scif2_device,
236         &scif3_device,
237         &scif4_device,
238         &scif5_device,
239         &tmu00_device,
240         &tmu01_device,
241 };
242 
243 static struct platform_device *r8a7779_late_devices[] __initdata = {
244 };
245 
246 void __init r8a7779_add_standard_devices(void)
247 {
248 #ifdef CONFIG_CACHE_L2X0
249         /* Early BRESP enable, Shared attribute override enable, 64K*16way */
250         l2x0_init((void __iomem __force *)(0xf0100000), 0x40470000, 0x82000fff);
251 #endif
252         r8a7779_pm_init();
253 
254         r8a7779_init_pm_domain(&r8a7779_sh4a);
255         r8a7779_init_pm_domain(&r8a7779_sgx);
256         r8a7779_init_pm_domain(&r8a7779_vdp1);
257         r8a7779_init_pm_domain(&r8a7779_impx3);
258 
259         platform_add_devices(r8a7779_early_devices,
260                             ARRAY_SIZE(r8a7779_early_devices));
261         platform_add_devices(r8a7779_late_devices,
262                             ARRAY_SIZE(r8a7779_late_devices));
263 }
264 
265 /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
266 void __init __weak r8a7779_register_twd(void) { }
267 
268 static void __init r8a7779_earlytimer_init(void)
269 {
270         r8a7779_clock_init();
271         shmobile_earlytimer_init();
272         r8a7779_register_twd();
273 }
274 
275 void __init r8a7779_add_early_devices(void)
276 {
277         early_platform_add_devices(r8a7779_early_devices,
278                                    ARRAY_SIZE(r8a7779_early_devices));
279 
280         /* Early serial console setup is not included here due to
281          * memory map collisions. The SCIF serial ports in r8a7779
282          * are difficult to entity map 1:1 due to collision with the
283          * virtual memory range used by the coherent DMA code on ARM.
284          *
285          * Anyone wanting to debug early can remove UPF_IOREMAP from
286          * the sh-sci serial console platform data, adjust mapbase
287          * to a static M:N virt:phys mapping that needs to be added to
288          * the mappings passed with iotable_init() above.
289          *
290          * Then add a call to shmobile_setup_console() from this function.
291          *
292          * As a final step pass earlyprint=sh-sci.2,115200 on the kernel
293          * command line in case of the marzen board.
294          */
295 
296         /* override timer setup with soc-specific code */
297         shmobile_timer.init = r8a7779_earlytimer_init;
298 }
299 

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