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Linux/arch/arm/mach-tegra/tegra.c

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  1 /*
  2  * NVIDIA Tegra SoC device tree board support
  3  *
  4  * Copyright (C) 2011, 2013, NVIDIA Corporation
  5  * Copyright (C) 2010 Secret Lab Technologies, Ltd.
  6  * Copyright (C) 2010 Google, Inc.
  7  *
  8  * This software is licensed under the terms of the GNU General Public
  9  * License version 2, as published by the Free Software Foundation, and
 10  * may be copied, distributed, and modified under those terms.
 11  *
 12  * This program is distributed in the hope that it will be useful,
 13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 15  * GNU General Public License for more details.
 16  *
 17  */
 18 
 19 #include <linux/kernel.h>
 20 #include <linux/init.h>
 21 #include <linux/platform_device.h>
 22 #include <linux/serial_8250.h>
 23 #include <linux/clk.h>
 24 #include <linux/dma-mapping.h>
 25 #include <linux/irqdomain.h>
 26 #include <linux/of.h>
 27 #include <linux/of_address.h>
 28 #include <linux/of_fdt.h>
 29 #include <linux/of_platform.h>
 30 #include <linux/pda_power.h>
 31 #include <linux/io.h>
 32 #include <linux/slab.h>
 33 #include <linux/sys_soc.h>
 34 #include <linux/usb/tegra_usb_phy.h>
 35 #include <linux/clk/tegra.h>
 36 #include <linux/irqchip.h>
 37 
 38 #include <asm/hardware/cache-l2x0.h>
 39 #include <asm/mach-types.h>
 40 #include <asm/mach/arch.h>
 41 #include <asm/mach/time.h>
 42 #include <asm/setup.h>
 43 #include <asm/trusted_foundations.h>
 44 
 45 #include "apbio.h"
 46 #include "board.h"
 47 #include "common.h"
 48 #include "cpuidle.h"
 49 #include "fuse.h"
 50 #include "iomap.h"
 51 #include "irq.h"
 52 #include "pmc.h"
 53 #include "pm.h"
 54 #include "reset.h"
 55 #include "sleep.h"
 56 
 57 /*
 58  * Storage for debug-macro.S's state.
 59  *
 60  * This must be in .data not .bss so that it gets initialized each time the
 61  * kernel is loaded. The data is declared here rather than debug-macro.S so
 62  * that multiple inclusions of debug-macro.S point at the same data.
 63  */
 64 u32 tegra_uart_config[3] = {
 65         /* Debug UART initialization required */
 66         1,
 67         /* Debug UART physical address */
 68         0,
 69         /* Debug UART virtual address */
 70         0,
 71 };
 72 
 73 static void __init tegra_init_cache(void)
 74 {
 75 #ifdef CONFIG_CACHE_L2X0
 76         static const struct of_device_id pl310_ids[] __initconst = {
 77                 { .compatible = "arm,pl310-cache",  },
 78                 {}
 79         };
 80 
 81         struct device_node *np;
 82         int ret;
 83         void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
 84         u32 aux_ctrl, cache_type;
 85 
 86         np = of_find_matching_node(NULL, pl310_ids);
 87         if (!np)
 88                 return;
 89 
 90         cache_type = readl(p + L2X0_CACHE_TYPE);
 91         aux_ctrl = (cache_type & 0x700) << (17-8);
 92         aux_ctrl |= 0x7C400001;
 93 
 94         ret = l2x0_of_init(aux_ctrl, 0x8200c3fe);
 95         if (!ret)
 96                 l2x0_saved_regs_addr = virt_to_phys(&l2x0_saved_regs);
 97 #endif
 98 }
 99 
100 static void __init tegra_init_early(void)
101 {
102         of_register_trusted_foundations();
103         tegra_apb_io_init();
104         tegra_init_fuse();
105         tegra_cpu_reset_handler_init();
106         tegra_init_cache();
107         tegra_powergate_init();
108         tegra_hotplug_init();
109 }
110 
111 static void __init tegra_dt_init_irq(void)
112 {
113         tegra_pmc_init_irq();
114         tegra_init_irq();
115         irqchip_init();
116         tegra_legacy_irq_syscore_init();
117 }
118 
119 static void __init tegra_dt_init(void)
120 {
121         struct soc_device_attribute *soc_dev_attr;
122         struct soc_device *soc_dev;
123         struct device *parent = NULL;
124 
125         tegra_pmc_init();
126 
127         tegra_clocks_apply_init_table();
128 
129         soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
130         if (!soc_dev_attr)
131                 goto out;
132 
133         soc_dev_attr->family = kasprintf(GFP_KERNEL, "Tegra");
134         soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d", tegra_revision);
135         soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%d", tegra_chip_id);
136 
137         soc_dev = soc_device_register(soc_dev_attr);
138         if (IS_ERR(soc_dev)) {
139                 kfree(soc_dev_attr->family);
140                 kfree(soc_dev_attr->revision);
141                 kfree(soc_dev_attr->soc_id);
142                 kfree(soc_dev_attr);
143                 goto out;
144         }
145 
146         parent = soc_device_to_device(soc_dev);
147 
148         /*
149          * Finished with the static registrations now; fill in the missing
150          * devices
151          */
152 out:
153         of_platform_populate(NULL, of_default_bus_match_table, NULL, parent);
154 }
155 
156 static void __init paz00_init(void)
157 {
158         if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
159                 tegra_paz00_wifikill_init();
160 }
161 
162 static struct {
163         char *machine;
164         void (*init)(void);
165 } board_init_funcs[] = {
166         { "compal,paz00", paz00_init },
167 };
168 
169 static void __init tegra_dt_init_late(void)
170 {
171         int i;
172 
173         tegra_init_suspend();
174         tegra_cpuidle_init();
175         tegra_powergate_debugfs_init();
176 
177         for (i = 0; i < ARRAY_SIZE(board_init_funcs); i++) {
178                 if (of_machine_is_compatible(board_init_funcs[i].machine)) {
179                         board_init_funcs[i].init();
180                         break;
181                 }
182         }
183 }
184 
185 static const char * const tegra_dt_board_compat[] = {
186         "nvidia,tegra124",
187         "nvidia,tegra114",
188         "nvidia,tegra30",
189         "nvidia,tegra20",
190         NULL
191 };
192 
193 DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegra SoC (Flattened Device Tree)")
194         .map_io         = tegra_map_common_io,
195         .smp            = smp_ops(tegra_smp_ops),
196         .init_early     = tegra_init_early,
197         .init_irq       = tegra_dt_init_irq,
198         .init_machine   = tegra_dt_init,
199         .init_late      = tegra_dt_init_late,
200         .restart        = tegra_pmc_restart,
201         .dt_compat      = tegra_dt_board_compat,
202 MACHINE_END
203 

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