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Linux/arch/arm/mm/dma-mapping.c

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  1 /*
  2  *  linux/arch/arm/mm/dma-mapping.c
  3  *
  4  *  Copyright (C) 2000-2004 Russell King
  5  *
  6  * This program is free software; you can redistribute it and/or modify
  7  * it under the terms of the GNU General Public License version 2 as
  8  * published by the Free Software Foundation.
  9  *
 10  *  DMA uncached mapping support.
 11  */
 12 #include <linux/module.h>
 13 #include <linux/mm.h>
 14 #include <linux/gfp.h>
 15 #include <linux/errno.h>
 16 #include <linux/list.h>
 17 #include <linux/init.h>
 18 #include <linux/device.h>
 19 #include <linux/dma-mapping.h>
 20 #include <linux/dma-contiguous.h>
 21 #include <linux/highmem.h>
 22 #include <linux/memblock.h>
 23 #include <linux/slab.h>
 24 #include <linux/iommu.h>
 25 #include <linux/io.h>
 26 #include <linux/vmalloc.h>
 27 #include <linux/sizes.h>
 28 
 29 #include <asm/memory.h>
 30 #include <asm/highmem.h>
 31 #include <asm/cacheflush.h>
 32 #include <asm/tlbflush.h>
 33 #include <asm/mach/arch.h>
 34 #include <asm/dma-iommu.h>
 35 #include <asm/mach/map.h>
 36 #include <asm/system_info.h>
 37 #include <asm/dma-contiguous.h>
 38 
 39 #include "mm.h"
 40 
 41 /*
 42  * The DMA API is built upon the notion of "buffer ownership".  A buffer
 43  * is either exclusively owned by the CPU (and therefore may be accessed
 44  * by it) or exclusively owned by the DMA device.  These helper functions
 45  * represent the transitions between these two ownership states.
 46  *
 47  * Note, however, that on later ARMs, this notion does not work due to
 48  * speculative prefetches.  We model our approach on the assumption that
 49  * the CPU does do speculative prefetches, which means we clean caches
 50  * before transfers and delay cache invalidation until transfer completion.
 51  *
 52  */
 53 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
 54                 size_t, enum dma_data_direction);
 55 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
 56                 size_t, enum dma_data_direction);
 57 
 58 /**
 59  * arm_dma_map_page - map a portion of a page for streaming DMA
 60  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 61  * @page: page that buffer resides in
 62  * @offset: offset into page for start of buffer
 63  * @size: size of buffer to map
 64  * @dir: DMA transfer direction
 65  *
 66  * Ensure that any data held in the cache is appropriately discarded
 67  * or written back.
 68  *
 69  * The device owns this memory once this call has completed.  The CPU
 70  * can regain ownership by calling dma_unmap_page().
 71  */
 72 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
 73              unsigned long offset, size_t size, enum dma_data_direction dir,
 74              struct dma_attrs *attrs)
 75 {
 76         if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
 77                 __dma_page_cpu_to_dev(page, offset, size, dir);
 78         return pfn_to_dma(dev, page_to_pfn(page)) + offset;
 79 }
 80 
 81 static dma_addr_t arm_coherent_dma_map_page(struct device *dev, struct page *page,
 82              unsigned long offset, size_t size, enum dma_data_direction dir,
 83              struct dma_attrs *attrs)
 84 {
 85         return pfn_to_dma(dev, page_to_pfn(page)) + offset;
 86 }
 87 
 88 /**
 89  * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
 90  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 91  * @handle: DMA address of buffer
 92  * @size: size of buffer (same as passed to dma_map_page)
 93  * @dir: DMA transfer direction (same as passed to dma_map_page)
 94  *
 95  * Unmap a page streaming mode DMA translation.  The handle and size
 96  * must match what was provided in the previous dma_map_page() call.
 97  * All other usages are undefined.
 98  *
 99  * After this call, reads by the CPU to the buffer are guaranteed to see
100  * whatever the device wrote there.
101  */
102 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
103                 size_t size, enum dma_data_direction dir,
104                 struct dma_attrs *attrs)
105 {
106         if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
107                 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
108                                       handle & ~PAGE_MASK, size, dir);
109 }
110 
111 static void arm_dma_sync_single_for_cpu(struct device *dev,
112                 dma_addr_t handle, size_t size, enum dma_data_direction dir)
113 {
114         unsigned int offset = handle & (PAGE_SIZE - 1);
115         struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
116         __dma_page_dev_to_cpu(page, offset, size, dir);
117 }
118 
119 static void arm_dma_sync_single_for_device(struct device *dev,
120                 dma_addr_t handle, size_t size, enum dma_data_direction dir)
121 {
122         unsigned int offset = handle & (PAGE_SIZE - 1);
123         struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
124         __dma_page_cpu_to_dev(page, offset, size, dir);
125 }
126 
127 struct dma_map_ops arm_dma_ops = {
128         .alloc                  = arm_dma_alloc,
129         .free                   = arm_dma_free,
130         .mmap                   = arm_dma_mmap,
131         .get_sgtable            = arm_dma_get_sgtable,
132         .map_page               = arm_dma_map_page,
133         .unmap_page             = arm_dma_unmap_page,
134         .map_sg                 = arm_dma_map_sg,
135         .unmap_sg               = arm_dma_unmap_sg,
136         .sync_single_for_cpu    = arm_dma_sync_single_for_cpu,
137         .sync_single_for_device = arm_dma_sync_single_for_device,
138         .sync_sg_for_cpu        = arm_dma_sync_sg_for_cpu,
139         .sync_sg_for_device     = arm_dma_sync_sg_for_device,
140         .set_dma_mask           = arm_dma_set_mask,
141 };
142 EXPORT_SYMBOL(arm_dma_ops);
143 
144 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
145         dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs);
146 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
147                                   dma_addr_t handle, struct dma_attrs *attrs);
148 
149 struct dma_map_ops arm_coherent_dma_ops = {
150         .alloc                  = arm_coherent_dma_alloc,
151         .free                   = arm_coherent_dma_free,
152         .mmap                   = arm_dma_mmap,
153         .get_sgtable            = arm_dma_get_sgtable,
154         .map_page               = arm_coherent_dma_map_page,
155         .map_sg                 = arm_dma_map_sg,
156         .set_dma_mask           = arm_dma_set_mask,
157 };
158 EXPORT_SYMBOL(arm_coherent_dma_ops);
159 
160 static u64 get_coherent_dma_mask(struct device *dev)
161 {
162         u64 mask = (u64)arm_dma_limit;
163 
164         if (dev) {
165                 mask = dev->coherent_dma_mask;
166 
167                 /*
168                  * Sanity check the DMA mask - it must be non-zero, and
169                  * must be able to be satisfied by a DMA allocation.
170                  */
171                 if (mask == 0) {
172                         dev_warn(dev, "coherent DMA mask is unset\n");
173                         return 0;
174                 }
175 
176                 if ((~mask) & (u64)arm_dma_limit) {
177                         dev_warn(dev, "coherent DMA mask %#llx is smaller "
178                                  "than system GFP_DMA mask %#llx\n",
179                                  mask, (u64)arm_dma_limit);
180                         return 0;
181                 }
182         }
183 
184         return mask;
185 }
186 
187 static void __dma_clear_buffer(struct page *page, size_t size)
188 {
189         /*
190          * Ensure that the allocated pages are zeroed, and that any data
191          * lurking in the kernel direct-mapped region is invalidated.
192          */
193         if (PageHighMem(page)) {
194                 phys_addr_t base = __pfn_to_phys(page_to_pfn(page));
195                 phys_addr_t end = base + size;
196                 while (size > 0) {
197                         void *ptr = kmap_atomic(page);
198                         memset(ptr, 0, PAGE_SIZE);
199                         dmac_flush_range(ptr, ptr + PAGE_SIZE);
200                         kunmap_atomic(ptr);
201                         page++;
202                         size -= PAGE_SIZE;
203                 }
204                 outer_flush_range(base, end);
205         } else {
206                 void *ptr = page_address(page);
207                 memset(ptr, 0, size);
208                 dmac_flush_range(ptr, ptr + size);
209                 outer_flush_range(__pa(ptr), __pa(ptr) + size);
210         }
211 }
212 
213 /*
214  * Allocate a DMA buffer for 'dev' of size 'size' using the
215  * specified gfp mask.  Note that 'size' must be page aligned.
216  */
217 static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
218 {
219         unsigned long order = get_order(size);
220         struct page *page, *p, *e;
221 
222         page = alloc_pages(gfp, order);
223         if (!page)
224                 return NULL;
225 
226         /*
227          * Now split the huge page and free the excess pages
228          */
229         split_page(page, order);
230         for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
231                 __free_page(p);
232 
233         __dma_clear_buffer(page, size);
234 
235         return page;
236 }
237 
238 /*
239  * Free a DMA buffer.  'size' must be page aligned.
240  */
241 static void __dma_free_buffer(struct page *page, size_t size)
242 {
243         struct page *e = page + (size >> PAGE_SHIFT);
244 
245         while (page < e) {
246                 __free_page(page);
247                 page++;
248         }
249 }
250 
251 #ifdef CONFIG_MMU
252 #ifdef CONFIG_HUGETLB_PAGE
253 #error ARM Coherent DMA allocator does not (yet) support huge TLB
254 #endif
255 
256 static void *__alloc_from_contiguous(struct device *dev, size_t size,
257                                      pgprot_t prot, struct page **ret_page,
258                                      const void *caller);
259 
260 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
261                                  pgprot_t prot, struct page **ret_page,
262                                  const void *caller);
263 
264 static void *
265 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
266         const void *caller)
267 {
268         struct vm_struct *area;
269         unsigned long addr;
270 
271         /*
272          * DMA allocation can be mapped to user space, so lets
273          * set VM_USERMAP flags too.
274          */
275         area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP,
276                                   caller);
277         if (!area)
278                 return NULL;
279         addr = (unsigned long)area->addr;
280         area->phys_addr = __pfn_to_phys(page_to_pfn(page));
281 
282         if (ioremap_page_range(addr, addr + size, area->phys_addr, prot)) {
283                 vunmap((void *)addr);
284                 return NULL;
285         }
286         return (void *)addr;
287 }
288 
289 static void __dma_free_remap(void *cpu_addr, size_t size)
290 {
291         unsigned int flags = VM_ARM_DMA_CONSISTENT | VM_USERMAP;
292         struct vm_struct *area = find_vm_area(cpu_addr);
293         if (!area || (area->flags & flags) != flags) {
294                 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
295                 return;
296         }
297         unmap_kernel_range((unsigned long)cpu_addr, size);
298         vunmap(cpu_addr);
299 }
300 
301 #define DEFAULT_DMA_COHERENT_POOL_SIZE  SZ_256K
302 
303 struct dma_pool {
304         size_t size;
305         spinlock_t lock;
306         unsigned long *bitmap;
307         unsigned long nr_pages;
308         void *vaddr;
309         struct page **pages;
310 };
311 
312 static struct dma_pool atomic_pool = {
313         .size = DEFAULT_DMA_COHERENT_POOL_SIZE,
314 };
315 
316 static int __init early_coherent_pool(char *p)
317 {
318         atomic_pool.size = memparse(p, &p);
319         return 0;
320 }
321 early_param("coherent_pool", early_coherent_pool);
322 
323 void __init init_dma_coherent_pool_size(unsigned long size)
324 {
325         /*
326          * Catch any attempt to set the pool size too late.
327          */
328         BUG_ON(atomic_pool.vaddr);
329 
330         /*
331          * Set architecture specific coherent pool size only if
332          * it has not been changed by kernel command line parameter.
333          */
334         if (atomic_pool.size == DEFAULT_DMA_COHERENT_POOL_SIZE)
335                 atomic_pool.size = size;
336 }
337 
338 /*
339  * Initialise the coherent pool for atomic allocations.
340  */
341 static int __init atomic_pool_init(void)
342 {
343         struct dma_pool *pool = &atomic_pool;
344         pgprot_t prot = pgprot_dmacoherent(pgprot_kernel);
345         gfp_t gfp = GFP_KERNEL | GFP_DMA;
346         unsigned long nr_pages = pool->size >> PAGE_SHIFT;
347         unsigned long *bitmap;
348         struct page *page;
349         struct page **pages;
350         void *ptr;
351         int bitmap_size = BITS_TO_LONGS(nr_pages) * sizeof(long);
352 
353         bitmap = kzalloc(bitmap_size, GFP_KERNEL);
354         if (!bitmap)
355                 goto no_bitmap;
356 
357         pages = kzalloc(nr_pages * sizeof(struct page *), GFP_KERNEL);
358         if (!pages)
359                 goto no_pages;
360 
361         if (IS_ENABLED(CONFIG_CMA))
362                 ptr = __alloc_from_contiguous(NULL, pool->size, prot, &page,
363                                               atomic_pool_init);
364         else
365                 ptr = __alloc_remap_buffer(NULL, pool->size, gfp, prot, &page,
366                                            atomic_pool_init);
367         if (ptr) {
368                 int i;
369 
370                 for (i = 0; i < nr_pages; i++)
371                         pages[i] = page + i;
372 
373                 spin_lock_init(&pool->lock);
374                 pool->vaddr = ptr;
375                 pool->pages = pages;
376                 pool->bitmap = bitmap;
377                 pool->nr_pages = nr_pages;
378                 pr_info("DMA: preallocated %u KiB pool for atomic coherent allocations\n",
379                        (unsigned)pool->size / 1024);
380                 return 0;
381         }
382 
383         kfree(pages);
384 no_pages:
385         kfree(bitmap);
386 no_bitmap:
387         pr_err("DMA: failed to allocate %u KiB pool for atomic coherent allocation\n",
388                (unsigned)pool->size / 1024);
389         return -ENOMEM;
390 }
391 /*
392  * CMA is activated by core_initcall, so we must be called after it.
393  */
394 postcore_initcall(atomic_pool_init);
395 
396 struct dma_contig_early_reserve {
397         phys_addr_t base;
398         unsigned long size;
399 };
400 
401 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
402 
403 static int dma_mmu_remap_num __initdata;
404 
405 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
406 {
407         dma_mmu_remap[dma_mmu_remap_num].base = base;
408         dma_mmu_remap[dma_mmu_remap_num].size = size;
409         dma_mmu_remap_num++;
410 }
411 
412 void __init dma_contiguous_remap(void)
413 {
414         int i;
415         for (i = 0; i < dma_mmu_remap_num; i++) {
416                 phys_addr_t start = dma_mmu_remap[i].base;
417                 phys_addr_t end = start + dma_mmu_remap[i].size;
418                 struct map_desc map;
419                 unsigned long addr;
420 
421                 if (end > arm_lowmem_limit)
422                         end = arm_lowmem_limit;
423                 if (start >= end)
424                         continue;
425 
426                 map.pfn = __phys_to_pfn(start);
427                 map.virtual = __phys_to_virt(start);
428                 map.length = end - start;
429                 map.type = MT_MEMORY_DMA_READY;
430 
431                 /*
432                  * Clear previous low-memory mapping to ensure that the
433                  * TLB does not see any conflicting entries, then flush
434                  * the TLB of the old entries before creating new mappings.
435                  *
436                  * This ensures that any speculatively loaded TLB entries
437                  * (even though they may be rare) can not cause any problems,
438                  * and ensures that this code is architecturally compliant.
439                  */
440                 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
441                      addr += PMD_SIZE)
442                         pmd_clear(pmd_off_k(addr));
443 
444                 flush_tlb_kernel_range(__phys_to_virt(start),
445                                        __phys_to_virt(end));
446 
447                 iotable_init(&map, 1);
448         }
449 }
450 
451 static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr,
452                             void *data)
453 {
454         struct page *page = virt_to_page(addr);
455         pgprot_t prot = *(pgprot_t *)data;
456 
457         set_pte_ext(pte, mk_pte(page, prot), 0);
458         return 0;
459 }
460 
461 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
462 {
463         unsigned long start = (unsigned long) page_address(page);
464         unsigned end = start + size;
465 
466         apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
467         dsb();
468         flush_tlb_kernel_range(start, end);
469 }
470 
471 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
472                                  pgprot_t prot, struct page **ret_page,
473                                  const void *caller)
474 {
475         struct page *page;
476         void *ptr;
477         page = __dma_alloc_buffer(dev, size, gfp);
478         if (!page)
479                 return NULL;
480 
481         ptr = __dma_alloc_remap(page, size, gfp, prot, caller);
482         if (!ptr) {
483                 __dma_free_buffer(page, size);
484                 return NULL;
485         }
486 
487         *ret_page = page;
488         return ptr;
489 }
490 
491 static void *__alloc_from_pool(size_t size, struct page **ret_page)
492 {
493         struct dma_pool *pool = &atomic_pool;
494         unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
495         unsigned int pageno;
496         unsigned long flags;
497         void *ptr = NULL;
498         unsigned long align_mask;
499 
500         if (!pool->vaddr) {
501                 WARN(1, "coherent pool not initialised!\n");
502                 return NULL;
503         }
504 
505         /*
506          * Align the region allocation - allocations from pool are rather
507          * small, so align them to their order in pages, minimum is a page
508          * size. This helps reduce fragmentation of the DMA space.
509          */
510         align_mask = (1 << get_order(size)) - 1;
511 
512         spin_lock_irqsave(&pool->lock, flags);
513         pageno = bitmap_find_next_zero_area(pool->bitmap, pool->nr_pages,
514                                             0, count, align_mask);
515         if (pageno < pool->nr_pages) {
516                 bitmap_set(pool->bitmap, pageno, count);
517                 ptr = pool->vaddr + PAGE_SIZE * pageno;
518                 *ret_page = pool->pages[pageno];
519         } else {
520                 pr_err_once("ERROR: %u KiB atomic DMA coherent pool is too small!\n"
521                             "Please increase it with coherent_pool= kernel parameter!\n",
522                             (unsigned)pool->size / 1024);
523         }
524         spin_unlock_irqrestore(&pool->lock, flags);
525 
526         return ptr;
527 }
528 
529 static bool __in_atomic_pool(void *start, size_t size)
530 {
531         struct dma_pool *pool = &atomic_pool;
532         void *end = start + size;
533         void *pool_start = pool->vaddr;
534         void *pool_end = pool->vaddr + pool->size;
535 
536         if (start < pool_start || start >= pool_end)
537                 return false;
538 
539         if (end <= pool_end)
540                 return true;
541 
542         WARN(1, "Wrong coherent size(%p-%p) from atomic pool(%p-%p)\n",
543              start, end - 1, pool_start, pool_end - 1);
544 
545         return false;
546 }
547 
548 static int __free_from_pool(void *start, size_t size)
549 {
550         struct dma_pool *pool = &atomic_pool;
551         unsigned long pageno, count;
552         unsigned long flags;
553 
554         if (!__in_atomic_pool(start, size))
555                 return 0;
556 
557         pageno = (start - pool->vaddr) >> PAGE_SHIFT;
558         count = size >> PAGE_SHIFT;
559 
560         spin_lock_irqsave(&pool->lock, flags);
561         bitmap_clear(pool->bitmap, pageno, count);
562         spin_unlock_irqrestore(&pool->lock, flags);
563 
564         return 1;
565 }
566 
567 static void *__alloc_from_contiguous(struct device *dev, size_t size,
568                                      pgprot_t prot, struct page **ret_page,
569                                      const void *caller)
570 {
571         unsigned long order = get_order(size);
572         size_t count = size >> PAGE_SHIFT;
573         struct page *page;
574         void *ptr;
575 
576         page = dma_alloc_from_contiguous(dev, count, order);
577         if (!page)
578                 return NULL;
579 
580         __dma_clear_buffer(page, size);
581 
582         if (PageHighMem(page)) {
583                 ptr = __dma_alloc_remap(page, size, GFP_KERNEL, prot, caller);
584                 if (!ptr) {
585                         dma_release_from_contiguous(dev, page, count);
586                         return NULL;
587                 }
588         } else {
589                 __dma_remap(page, size, prot);
590                 ptr = page_address(page);
591         }
592         *ret_page = page;
593         return ptr;
594 }
595 
596 static void __free_from_contiguous(struct device *dev, struct page *page,
597                                    void *cpu_addr, size_t size)
598 {
599         if (PageHighMem(page))
600                 __dma_free_remap(cpu_addr, size);
601         else
602                 __dma_remap(page, size, pgprot_kernel);
603         dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
604 }
605 
606 static inline pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot)
607 {
608         prot = dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs) ?
609                             pgprot_writecombine(prot) :
610                             pgprot_dmacoherent(prot);
611         return prot;
612 }
613 
614 #define nommu() 0
615 
616 #else   /* !CONFIG_MMU */
617 
618 #define nommu() 1
619 
620 #define __get_dma_pgprot(attrs, prot)   __pgprot(0)
621 #define __alloc_remap_buffer(dev, size, gfp, prot, ret, c)      NULL
622 #define __alloc_from_pool(size, ret_page)                       NULL
623 #define __alloc_from_contiguous(dev, size, prot, ret, c)        NULL
624 #define __free_from_pool(cpu_addr, size)                        0
625 #define __free_from_contiguous(dev, page, cpu_addr, size)       do { } while (0)
626 #define __dma_free_remap(cpu_addr, size)                        do { } while (0)
627 
628 #endif  /* CONFIG_MMU */
629 
630 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
631                                    struct page **ret_page)
632 {
633         struct page *page;
634         page = __dma_alloc_buffer(dev, size, gfp);
635         if (!page)
636                 return NULL;
637 
638         *ret_page = page;
639         return page_address(page);
640 }
641 
642 
643 
644 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
645                          gfp_t gfp, pgprot_t prot, bool is_coherent, const void *caller)
646 {
647         u64 mask = get_coherent_dma_mask(dev);
648         struct page *page = NULL;
649         void *addr;
650 
651 #ifdef CONFIG_DMA_API_DEBUG
652         u64 limit = (mask + 1) & ~mask;
653         if (limit && size >= limit) {
654                 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
655                         size, mask);
656                 return NULL;
657         }
658 #endif
659 
660         if (!mask)
661                 return NULL;
662 
663         if (mask < 0xffffffffULL)
664                 gfp |= GFP_DMA;
665 
666         /*
667          * Following is a work-around (a.k.a. hack) to prevent pages
668          * with __GFP_COMP being passed to split_page() which cannot
669          * handle them.  The real problem is that this flag probably
670          * should be 0 on ARM as it is not supported on this
671          * platform; see CONFIG_HUGETLBFS.
672          */
673         gfp &= ~(__GFP_COMP);
674 
675         *handle = DMA_ERROR_CODE;
676         size = PAGE_ALIGN(size);
677 
678         if (is_coherent || nommu())
679                 addr = __alloc_simple_buffer(dev, size, gfp, &page);
680         else if (!(gfp & __GFP_WAIT))
681                 addr = __alloc_from_pool(size, &page);
682         else if (!IS_ENABLED(CONFIG_CMA))
683                 addr = __alloc_remap_buffer(dev, size, gfp, prot, &page, caller);
684         else
685                 addr = __alloc_from_contiguous(dev, size, prot, &page, caller);
686 
687         if (addr)
688                 *handle = pfn_to_dma(dev, page_to_pfn(page));
689 
690         return addr;
691 }
692 
693 /*
694  * Allocate DMA-coherent memory space and return both the kernel remapped
695  * virtual and bus address for that space.
696  */
697 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
698                     gfp_t gfp, struct dma_attrs *attrs)
699 {
700         pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
701         void *memory;
702 
703         if (dma_alloc_from_coherent(dev, size, handle, &memory))
704                 return memory;
705 
706         return __dma_alloc(dev, size, handle, gfp, prot, false,
707                            __builtin_return_address(0));
708 }
709 
710 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
711         dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
712 {
713         pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
714         void *memory;
715 
716         if (dma_alloc_from_coherent(dev, size, handle, &memory))
717                 return memory;
718 
719         return __dma_alloc(dev, size, handle, gfp, prot, true,
720                            __builtin_return_address(0));
721 }
722 
723 /*
724  * Create userspace mapping for the DMA-coherent memory.
725  */
726 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
727                  void *cpu_addr, dma_addr_t dma_addr, size_t size,
728                  struct dma_attrs *attrs)
729 {
730         int ret = -ENXIO;
731 #ifdef CONFIG_MMU
732         unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
733         unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
734         unsigned long pfn = dma_to_pfn(dev, dma_addr);
735         unsigned long off = vma->vm_pgoff;
736 
737         vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
738 
739         if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
740                 return ret;
741 
742         if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
743                 ret = remap_pfn_range(vma, vma->vm_start,
744                                       pfn + off,
745                                       vma->vm_end - vma->vm_start,
746                                       vma->vm_page_prot);
747         }
748 #endif  /* CONFIG_MMU */
749 
750         return ret;
751 }
752 
753 /*
754  * Free a buffer as defined by the above mapping.
755  */
756 static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
757                            dma_addr_t handle, struct dma_attrs *attrs,
758                            bool is_coherent)
759 {
760         struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
761 
762         if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
763                 return;
764 
765         size = PAGE_ALIGN(size);
766 
767         if (is_coherent || nommu()) {
768                 __dma_free_buffer(page, size);
769         } else if (__free_from_pool(cpu_addr, size)) {
770                 return;
771         } else if (!IS_ENABLED(CONFIG_CMA)) {
772                 __dma_free_remap(cpu_addr, size);
773                 __dma_free_buffer(page, size);
774         } else {
775                 /*
776                  * Non-atomic allocations cannot be freed with IRQs disabled
777                  */
778                 WARN_ON(irqs_disabled());
779                 __free_from_contiguous(dev, page, cpu_addr, size);
780         }
781 }
782 
783 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
784                   dma_addr_t handle, struct dma_attrs *attrs)
785 {
786         __arm_dma_free(dev, size, cpu_addr, handle, attrs, false);
787 }
788 
789 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
790                                   dma_addr_t handle, struct dma_attrs *attrs)
791 {
792         __arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
793 }
794 
795 int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
796                  void *cpu_addr, dma_addr_t handle, size_t size,
797                  struct dma_attrs *attrs)
798 {
799         struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
800         int ret;
801 
802         ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
803         if (unlikely(ret))
804                 return ret;
805 
806         sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
807         return 0;
808 }
809 
810 static void dma_cache_maint_page(struct page *page, unsigned long offset,
811         size_t size, enum dma_data_direction dir,
812         void (*op)(const void *, size_t, int))
813 {
814         unsigned long pfn;
815         size_t left = size;
816 
817         pfn = page_to_pfn(page) + offset / PAGE_SIZE;
818         offset %= PAGE_SIZE;
819 
820         /*
821          * A single sg entry may refer to multiple physically contiguous
822          * pages.  But we still need to process highmem pages individually.
823          * If highmem is not configured then the bulk of this loop gets
824          * optimized out.
825          */
826         do {
827                 size_t len = left;
828                 void *vaddr;
829 
830                 page = pfn_to_page(pfn);
831 
832                 if (PageHighMem(page)) {
833                         if (len + offset > PAGE_SIZE)
834                                 len = PAGE_SIZE - offset;
835 
836                         if (cache_is_vipt_nonaliasing()) {
837                                 vaddr = kmap_atomic(page);
838                                 op(vaddr + offset, len, dir);
839                                 kunmap_atomic(vaddr);
840                         } else {
841                                 vaddr = kmap_high_get(page);
842                                 if (vaddr) {
843                                         op(vaddr + offset, len, dir);
844                                         kunmap_high(page);
845                                 }
846                         }
847                 } else {
848                         vaddr = page_address(page) + offset;
849                         op(vaddr, len, dir);
850                 }
851                 offset = 0;
852                 pfn++;
853                 left -= len;
854         } while (left);
855 }
856 
857 /*
858  * Make an area consistent for devices.
859  * Note: Drivers should NOT use this function directly, as it will break
860  * platforms with CONFIG_DMABOUNCE.
861  * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
862  */
863 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
864         size_t size, enum dma_data_direction dir)
865 {
866         unsigned long paddr;
867 
868         dma_cache_maint_page(page, off, size, dir, dmac_map_area);
869 
870         paddr = page_to_phys(page) + off;
871         if (dir == DMA_FROM_DEVICE) {
872                 outer_inv_range(paddr, paddr + size);
873         } else {
874                 outer_clean_range(paddr, paddr + size);
875         }
876         /* FIXME: non-speculating: flush on bidirectional mappings? */
877 }
878 
879 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
880         size_t size, enum dma_data_direction dir)
881 {
882         unsigned long paddr = page_to_phys(page) + off;
883 
884         /* FIXME: non-speculating: not required */
885         /* don't bother invalidating if DMA to device */
886         if (dir != DMA_TO_DEVICE)
887                 outer_inv_range(paddr, paddr + size);
888 
889         dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
890 
891         /*
892          * Mark the D-cache clean for this page to avoid extra flushing.
893          */
894         if (dir != DMA_TO_DEVICE && off == 0 && size >= PAGE_SIZE)
895                 set_bit(PG_dcache_clean, &page->flags);
896 }
897 
898 /**
899  * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
900  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
901  * @sg: list of buffers
902  * @nents: number of buffers to map
903  * @dir: DMA transfer direction
904  *
905  * Map a set of buffers described by scatterlist in streaming mode for DMA.
906  * This is the scatter-gather version of the dma_map_single interface.
907  * Here the scatter gather list elements are each tagged with the
908  * appropriate dma address and length.  They are obtained via
909  * sg_dma_{address,length}.
910  *
911  * Device ownership issues as mentioned for dma_map_single are the same
912  * here.
913  */
914 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
915                 enum dma_data_direction dir, struct dma_attrs *attrs)
916 {
917         struct dma_map_ops *ops = get_dma_ops(dev);
918         struct scatterlist *s;
919         int i, j;
920 
921         for_each_sg(sg, s, nents, i) {
922 #ifdef CONFIG_NEED_SG_DMA_LENGTH
923                 s->dma_length = s->length;
924 #endif
925                 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
926                                                 s->length, dir, attrs);
927                 if (dma_mapping_error(dev, s->dma_address))
928                         goto bad_mapping;
929         }
930         return nents;
931 
932  bad_mapping:
933         for_each_sg(sg, s, i, j)
934                 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
935         return 0;
936 }
937 
938 /**
939  * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
940  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
941  * @sg: list of buffers
942  * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
943  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
944  *
945  * Unmap a set of streaming mode DMA translations.  Again, CPU access
946  * rules concerning calls here are the same as for dma_unmap_single().
947  */
948 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
949                 enum dma_data_direction dir, struct dma_attrs *attrs)
950 {
951         struct dma_map_ops *ops = get_dma_ops(dev);
952         struct scatterlist *s;
953 
954         int i;
955 
956         for_each_sg(sg, s, nents, i)
957                 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
958 }
959 
960 /**
961  * arm_dma_sync_sg_for_cpu
962  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
963  * @sg: list of buffers
964  * @nents: number of buffers to map (returned from dma_map_sg)
965  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
966  */
967 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
968                         int nents, enum dma_data_direction dir)
969 {
970         struct dma_map_ops *ops = get_dma_ops(dev);
971         struct scatterlist *s;
972         int i;
973 
974         for_each_sg(sg, s, nents, i)
975                 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
976                                          dir);
977 }
978 
979 /**
980  * arm_dma_sync_sg_for_device
981  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
982  * @sg: list of buffers
983  * @nents: number of buffers to map (returned from dma_map_sg)
984  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
985  */
986 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
987                         int nents, enum dma_data_direction dir)
988 {
989         struct dma_map_ops *ops = get_dma_ops(dev);
990         struct scatterlist *s;
991         int i;
992 
993         for_each_sg(sg, s, nents, i)
994                 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
995                                             dir);
996 }
997 
998 /*
999  * Return whether the given device DMA address mask can be supported
1000  * properly.  For example, if your device can only drive the low 24-bits
1001  * during bus mastering, then you would pass 0x00ffffff as the mask
1002  * to this function.
1003  */
1004 int dma_supported(struct device *dev, u64 mask)
1005 {
1006         if (mask < (u64)arm_dma_limit)
1007                 return 0;
1008         return 1;
1009 }
1010 EXPORT_SYMBOL(dma_supported);
1011 
1012 int arm_dma_set_mask(struct device *dev, u64 dma_mask)
1013 {
1014         if (!dev->dma_mask || !dma_supported(dev, dma_mask))
1015                 return -EIO;
1016 
1017         *dev->dma_mask = dma_mask;
1018 
1019         return 0;
1020 }
1021 
1022 #define PREALLOC_DMA_DEBUG_ENTRIES      4096
1023 
1024 static int __init dma_debug_do_init(void)
1025 {
1026         dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
1027         return 0;
1028 }
1029 fs_initcall(dma_debug_do_init);
1030 
1031 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1032 
1033 /* IOMMU */
1034 
1035 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
1036                                       size_t size)
1037 {
1038         unsigned int order = get_order(size);
1039         unsigned int align = 0;
1040         unsigned int count, start;
1041         unsigned long flags;
1042 
1043         if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
1044                 order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;
1045 
1046         count = ((PAGE_ALIGN(size) >> PAGE_SHIFT) +
1047                  (1 << mapping->order) - 1) >> mapping->order;
1048 
1049         if (order > mapping->order)
1050                 align = (1 << (order - mapping->order)) - 1;
1051 
1052         spin_lock_irqsave(&mapping->lock, flags);
1053         start = bitmap_find_next_zero_area(mapping->bitmap, mapping->bits, 0,
1054                                            count, align);
1055         if (start > mapping->bits) {
1056                 spin_unlock_irqrestore(&mapping->lock, flags);
1057                 return DMA_ERROR_CODE;
1058         }
1059 
1060         bitmap_set(mapping->bitmap, start, count);
1061         spin_unlock_irqrestore(&mapping->lock, flags);
1062 
1063         return mapping->base + (start << (mapping->order + PAGE_SHIFT));
1064 }
1065 
1066 static inline void __free_iova(struct dma_iommu_mapping *mapping,
1067                                dma_addr_t addr, size_t size)
1068 {
1069         unsigned int start = (addr - mapping->base) >>
1070                              (mapping->order + PAGE_SHIFT);
1071         unsigned int count = ((size >> PAGE_SHIFT) +
1072                               (1 << mapping->order) - 1) >> mapping->order;
1073         unsigned long flags;
1074 
1075         spin_lock_irqsave(&mapping->lock, flags);
1076         bitmap_clear(mapping->bitmap, start, count);
1077         spin_unlock_irqrestore(&mapping->lock, flags);
1078 }
1079 
1080 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
1081                                           gfp_t gfp, struct dma_attrs *attrs)
1082 {
1083         struct page **pages;
1084         int count = size >> PAGE_SHIFT;
1085         int array_size = count * sizeof(struct page *);
1086         int i = 0;
1087 
1088         if (array_size <= PAGE_SIZE)
1089                 pages = kzalloc(array_size, gfp);
1090         else
1091                 pages = vzalloc(array_size);
1092         if (!pages)
1093                 return NULL;
1094 
1095         if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS, attrs))
1096         {
1097                 unsigned long order = get_order(size);
1098                 struct page *page;
1099 
1100                 page = dma_alloc_from_contiguous(dev, count, order);
1101                 if (!page)
1102                         goto error;
1103 
1104                 __dma_clear_buffer(page, size);
1105 
1106                 for (i = 0; i < count; i++)
1107                         pages[i] = page + i;
1108 
1109                 return pages;
1110         }
1111 
1112         /*
1113          * IOMMU can map any pages, so himem can also be used here
1114          */
1115         gfp |= __GFP_NOWARN | __GFP_HIGHMEM;
1116 
1117         while (count) {
1118                 int j, order = __fls(count);
1119 
1120                 pages[i] = alloc_pages(gfp, order);
1121                 while (!pages[i] && order)
1122                         pages[i] = alloc_pages(gfp, --order);
1123                 if (!pages[i])
1124                         goto error;
1125 
1126                 if (order) {
1127                         split_page(pages[i], order);
1128                         j = 1 << order;
1129                         while (--j)
1130                                 pages[i + j] = pages[i] + j;
1131                 }
1132 
1133                 __dma_clear_buffer(pages[i], PAGE_SIZE << order);
1134                 i += 1 << order;
1135                 count -= 1 << order;
1136         }
1137 
1138         return pages;
1139 error:
1140         while (i--)
1141                 if (pages[i])
1142                         __free_pages(pages[i], 0);
1143         if (array_size <= PAGE_SIZE)
1144                 kfree(pages);
1145         else
1146                 vfree(pages);
1147         return NULL;
1148 }
1149 
1150 static int __iommu_free_buffer(struct device *dev, struct page **pages,
1151                                size_t size, struct dma_attrs *attrs)
1152 {
1153         int count = size >> PAGE_SHIFT;
1154         int array_size = count * sizeof(struct page *);
1155         int i;
1156 
1157         if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS, attrs)) {
1158                 dma_release_from_contiguous(dev, pages[0], count);
1159         } else {
1160                 for (i = 0; i < count; i++)
1161                         if (pages[i])
1162                                 __free_pages(pages[i], 0);
1163         }
1164 
1165         if (array_size <= PAGE_SIZE)
1166                 kfree(pages);
1167         else
1168                 vfree(pages);
1169         return 0;
1170 }
1171 
1172 /*
1173  * Create a CPU mapping for a specified pages
1174  */
1175 static void *
1176 __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
1177                     const void *caller)
1178 {
1179         unsigned int i, nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1180         struct vm_struct *area;
1181         unsigned long p;
1182 
1183         area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP,
1184                                   caller);
1185         if (!area)
1186                 return NULL;
1187 
1188         area->pages = pages;
1189         area->nr_pages = nr_pages;
1190         p = (unsigned long)area->addr;
1191 
1192         for (i = 0; i < nr_pages; i++) {
1193                 phys_addr_t phys = __pfn_to_phys(page_to_pfn(pages[i]));
1194                 if (ioremap_page_range(p, p + PAGE_SIZE, phys, prot))
1195                         goto err;
1196                 p += PAGE_SIZE;
1197         }
1198         return area->addr;
1199 err:
1200         unmap_kernel_range((unsigned long)area->addr, size);
1201         vunmap(area->addr);
1202         return NULL;
1203 }
1204 
1205 /*
1206  * Create a mapping in device IO address space for specified pages
1207  */
1208 static dma_addr_t
1209 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
1210 {
1211         struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1212         unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1213         dma_addr_t dma_addr, iova;
1214         int i, ret = DMA_ERROR_CODE;
1215 
1216         dma_addr = __alloc_iova(mapping, size);
1217         if (dma_addr == DMA_ERROR_CODE)
1218                 return dma_addr;
1219 
1220         iova = dma_addr;
1221         for (i = 0; i < count; ) {
1222                 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1223                 phys_addr_t phys = page_to_phys(pages[i]);
1224                 unsigned int len, j;
1225 
1226                 for (j = i + 1; j < count; j++, next_pfn++)
1227                         if (page_to_pfn(pages[j]) != next_pfn)
1228                                 break;
1229 
1230                 len = (j - i) << PAGE_SHIFT;
1231                 ret = iommu_map(mapping->domain, iova, phys, len, 0);
1232                 if (ret < 0)
1233                         goto fail;
1234                 iova += len;
1235                 i = j;
1236         }
1237         return dma_addr;
1238 fail:
1239         iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1240         __free_iova(mapping, dma_addr, size);
1241         return DMA_ERROR_CODE;
1242 }
1243 
1244 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1245 {
1246         struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1247 
1248         /*
1249          * add optional in-page offset from iova to size and align
1250          * result to page size
1251          */
1252         size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1253         iova &= PAGE_MASK;
1254 
1255         iommu_unmap(mapping->domain, iova, size);
1256         __free_iova(mapping, iova, size);
1257         return 0;
1258 }
1259 
1260 static struct page **__atomic_get_pages(void *addr)
1261 {
1262         struct dma_pool *pool = &atomic_pool;
1263         struct page **pages = pool->pages;
1264         int offs = (addr - pool->vaddr) >> PAGE_SHIFT;
1265 
1266         return pages + offs;
1267 }
1268 
1269 static struct page **__iommu_get_pages(void *cpu_addr, struct dma_attrs *attrs)
1270 {
1271         struct vm_struct *area;
1272 
1273         if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
1274                 return __atomic_get_pages(cpu_addr);
1275 
1276         if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
1277                 return cpu_addr;
1278 
1279         area = find_vm_area(cpu_addr);
1280         if (area && (area->flags & VM_ARM_DMA_CONSISTENT))
1281                 return area->pages;
1282         return NULL;
1283 }
1284 
1285 static void *__iommu_alloc_atomic(struct device *dev, size_t size,
1286                                   dma_addr_t *handle)
1287 {
1288         struct page *page;
1289         void *addr;
1290 
1291         addr = __alloc_from_pool(size, &page);
1292         if (!addr)
1293                 return NULL;
1294 
1295         *handle = __iommu_create_mapping(dev, &page, size);
1296         if (*handle == DMA_ERROR_CODE)
1297                 goto err_mapping;
1298 
1299         return addr;
1300 
1301 err_mapping:
1302         __free_from_pool(addr, size);
1303         return NULL;
1304 }
1305 
1306 static void __iommu_free_atomic(struct device *dev, void *cpu_addr,
1307                                 dma_addr_t handle, size_t size)
1308 {
1309         __iommu_remove_mapping(dev, handle, size);
1310         __free_from_pool(cpu_addr, size);
1311 }
1312 
1313 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1314             dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
1315 {
1316         pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
1317         struct page **pages;
1318         void *addr = NULL;
1319 
1320         *handle = DMA_ERROR_CODE;
1321         size = PAGE_ALIGN(size);
1322 
1323         if (!(gfp & __GFP_WAIT))
1324                 return __iommu_alloc_atomic(dev, size, handle);
1325 
1326         pages = __iommu_alloc_buffer(dev, size, gfp, attrs);
1327         if (!pages)
1328                 return NULL;
1329 
1330         *handle = __iommu_create_mapping(dev, pages, size);
1331         if (*handle == DMA_ERROR_CODE)
1332                 goto err_buffer;
1333 
1334         if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
1335                 return pages;
1336 
1337         addr = __iommu_alloc_remap(pages, size, gfp, prot,
1338                                    __builtin_return_address(0));
1339         if (!addr)
1340                 goto err_mapping;
1341 
1342         return addr;
1343 
1344 err_mapping:
1345         __iommu_remove_mapping(dev, *handle, size);
1346 err_buffer:
1347         __iommu_free_buffer(dev, pages, size, attrs);
1348         return NULL;
1349 }
1350 
1351 static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1352                     void *cpu_addr, dma_addr_t dma_addr, size_t size,
1353                     struct dma_attrs *attrs)
1354 {
1355         unsigned long uaddr = vma->vm_start;
1356         unsigned long usize = vma->vm_end - vma->vm_start;
1357         struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1358         unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1359         unsigned long off = vma->vm_pgoff;
1360 
1361         vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1362 
1363         if (!pages)
1364                 return -ENXIO;
1365 
1366         if (off >= nr_pages || (usize >> PAGE_SHIFT) > nr_pages - off)
1367                 return -ENXIO;
1368 
1369         pages += off;
1370 
1371         do {
1372                 int ret = vm_insert_page(vma, uaddr, *pages++);
1373                 if (ret) {
1374                         pr_err("Remapping memory failed: %d\n", ret);
1375                         return ret;
1376                 }
1377                 uaddr += PAGE_SIZE;
1378                 usize -= PAGE_SIZE;
1379         } while (usize > 0);
1380 
1381         return 0;
1382 }
1383 
1384 /*
1385  * free a page as defined by the above mapping.
1386  * Must not be called with IRQs disabled.
1387  */
1388 void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1389                           dma_addr_t handle, struct dma_attrs *attrs)
1390 {
1391         struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1392         size = PAGE_ALIGN(size);
1393 
1394         if (!pages) {
1395                 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1396                 return;
1397         }
1398 
1399         if (__in_atomic_pool(cpu_addr, size)) {
1400                 __iommu_free_atomic(dev, cpu_addr, handle, size);
1401                 return;
1402         }
1403 
1404         if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) {
1405                 unmap_kernel_range((unsigned long)cpu_addr, size);
1406                 vunmap(cpu_addr);
1407         }
1408 
1409         __iommu_remove_mapping(dev, handle, size);
1410         __iommu_free_buffer(dev, pages, size, attrs);
1411 }
1412 
1413 static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
1414                                  void *cpu_addr, dma_addr_t dma_addr,
1415                                  size_t size, struct dma_attrs *attrs)
1416 {
1417         unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1418         struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1419 
1420         if (!pages)
1421                 return -ENXIO;
1422 
1423         return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
1424                                          GFP_KERNEL);
1425 }
1426 
1427 /*
1428  * Map a part of the scatter-gather list into contiguous io address space
1429  */
1430 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1431                           size_t size, dma_addr_t *handle,
1432                           enum dma_data_direction dir, struct dma_attrs *attrs,
1433                           bool is_coherent)
1434 {
1435         struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1436         dma_addr_t iova, iova_base;
1437         int ret = 0;
1438         unsigned int count;
1439         struct scatterlist *s;
1440 
1441         size = PAGE_ALIGN(size);
1442         *handle = DMA_ERROR_CODE;
1443 
1444         iova_base = iova = __alloc_iova(mapping, size);
1445         if (iova == DMA_ERROR_CODE)
1446                 return -ENOMEM;
1447 
1448         for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1449                 phys_addr_t phys = page_to_phys(sg_page(s));
1450                 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1451 
1452                 if (!is_coherent &&
1453                         !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1454                         __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1455 
1456                 ret = iommu_map(mapping->domain, iova, phys, len, 0);
1457                 if (ret < 0)
1458                         goto fail;
1459                 count += len >> PAGE_SHIFT;
1460                 iova += len;
1461         }
1462         *handle = iova_base;
1463 
1464         return 0;
1465 fail:
1466         iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1467         __free_iova(mapping, iova_base, size);
1468         return ret;
1469 }
1470 
1471 static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1472                      enum dma_data_direction dir, struct dma_attrs *attrs,
1473                      bool is_coherent)
1474 {
1475         struct scatterlist *s = sg, *dma = sg, *start = sg;
1476         int i, count = 0;
1477         unsigned int offset = s->offset;
1478         unsigned int size = s->offset + s->length;
1479         unsigned int max = dma_get_max_seg_size(dev);
1480 
1481         for (i = 1; i < nents; i++) {
1482                 s = sg_next(s);
1483 
1484                 s->dma_address = DMA_ERROR_CODE;
1485                 s->dma_length = 0;
1486 
1487                 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1488                         if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1489                             dir, attrs, is_coherent) < 0)
1490                                 goto bad_mapping;
1491 
1492                         dma->dma_address += offset;
1493                         dma->dma_length = size - offset;
1494 
1495                         size = offset = s->offset;
1496                         start = s;
1497                         dma = sg_next(dma);
1498                         count += 1;
1499                 }
1500                 size += s->length;
1501         }
1502         if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
1503                 is_coherent) < 0)
1504                 goto bad_mapping;
1505 
1506         dma->dma_address += offset;
1507         dma->dma_length = size - offset;
1508 
1509         return count+1;
1510 
1511 bad_mapping:
1512         for_each_sg(sg, s, count, i)
1513                 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1514         return 0;
1515 }
1516 
1517 /**
1518  * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1519  * @dev: valid struct device pointer
1520  * @sg: list of buffers
1521  * @nents: number of buffers to map
1522  * @dir: DMA transfer direction
1523  *
1524  * Map a set of i/o coherent buffers described by scatterlist in streaming
1525  * mode for DMA. The scatter gather list elements are merged together (if
1526  * possible) and tagged with the appropriate dma address and length. They are
1527  * obtained via sg_dma_{address,length}.
1528  */
1529 int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1530                 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1531 {
1532         return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
1533 }
1534 
1535 /**
1536  * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1537  * @dev: valid struct device pointer
1538  * @sg: list of buffers
1539  * @nents: number of buffers to map
1540  * @dir: DMA transfer direction
1541  *
1542  * Map a set of buffers described by scatterlist in streaming mode for DMA.
1543  * The scatter gather list elements are merged together (if possible) and
1544  * tagged with the appropriate dma address and length. They are obtained via
1545  * sg_dma_{address,length}.
1546  */
1547 int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1548                 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1549 {
1550         return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
1551 }
1552 
1553 static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1554                 int nents, enum dma_data_direction dir, struct dma_attrs *attrs,
1555                 bool is_coherent)
1556 {
1557         struct scatterlist *s;
1558         int i;
1559 
1560         for_each_sg(sg, s, nents, i) {
1561                 if (sg_dma_len(s))
1562                         __iommu_remove_mapping(dev, sg_dma_address(s),
1563                                                sg_dma_len(s));
1564                 if (!is_coherent &&
1565                     !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1566                         __dma_page_dev_to_cpu(sg_page(s), s->offset,
1567                                               s->length, dir);
1568         }
1569 }
1570 
1571 /**
1572  * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1573  * @dev: valid struct device pointer
1574  * @sg: list of buffers
1575  * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1576  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1577  *
1578  * Unmap a set of streaming mode DMA translations.  Again, CPU access
1579  * rules concerning calls here are the same as for dma_unmap_single().
1580  */
1581 void arm_coherent_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1582                 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1583 {
1584         __iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
1585 }
1586 
1587 /**
1588  * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1589  * @dev: valid struct device pointer
1590  * @sg: list of buffers
1591  * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1592  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1593  *
1594  * Unmap a set of streaming mode DMA translations.  Again, CPU access
1595  * rules concerning calls here are the same as for dma_unmap_single().
1596  */
1597 void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1598                         enum dma_data_direction dir, struct dma_attrs *attrs)
1599 {
1600         __iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
1601 }
1602 
1603 /**
1604  * arm_iommu_sync_sg_for_cpu
1605  * @dev: valid struct device pointer
1606  * @sg: list of buffers
1607  * @nents: number of buffers to map (returned from dma_map_sg)
1608  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1609  */
1610 void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1611                         int nents, enum dma_data_direction dir)
1612 {
1613         struct scatterlist *s;
1614         int i;
1615 
1616         for_each_sg(sg, s, nents, i)
1617                 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1618 
1619 }
1620 
1621 /**
1622  * arm_iommu_sync_sg_for_device
1623  * @dev: valid struct device pointer
1624  * @sg: list of buffers
1625  * @nents: number of buffers to map (returned from dma_map_sg)
1626  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1627  */
1628 void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1629                         int nents, enum dma_data_direction dir)
1630 {
1631         struct scatterlist *s;
1632         int i;
1633 
1634         for_each_sg(sg, s, nents, i)
1635                 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1636 }
1637 
1638 
1639 /**
1640  * arm_coherent_iommu_map_page
1641  * @dev: valid struct device pointer
1642  * @page: page that buffer resides in
1643  * @offset: offset into page for start of buffer
1644  * @size: size of buffer to map
1645  * @dir: DMA transfer direction
1646  *
1647  * Coherent IOMMU aware version of arm_dma_map_page()
1648  */
1649 static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
1650              unsigned long offset, size_t size, enum dma_data_direction dir,
1651              struct dma_attrs *attrs)
1652 {
1653         struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1654         dma_addr_t dma_addr;
1655         int ret, len = PAGE_ALIGN(size + offset);
1656 
1657         dma_addr = __alloc_iova(mapping, len);
1658         if (dma_addr == DMA_ERROR_CODE)
1659                 return dma_addr;
1660 
1661         ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, 0);
1662         if (ret < 0)
1663                 goto fail;
1664 
1665         return dma_addr + offset;
1666 fail:
1667         __free_iova(mapping, dma_addr, len);
1668         return DMA_ERROR_CODE;
1669 }
1670 
1671 /**
1672  * arm_iommu_map_page
1673  * @dev: valid struct device pointer
1674  * @page: page that buffer resides in
1675  * @offset: offset into page for start of buffer
1676  * @size: size of buffer to map
1677  * @dir: DMA transfer direction
1678  *
1679  * IOMMU aware version of arm_dma_map_page()
1680  */
1681 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1682              unsigned long offset, size_t size, enum dma_data_direction dir,
1683              struct dma_attrs *attrs)
1684 {
1685         if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1686                 __dma_page_cpu_to_dev(page, offset, size, dir);
1687 
1688         return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
1689 }
1690 
1691 /**
1692  * arm_coherent_iommu_unmap_page
1693  * @dev: valid struct device pointer
1694  * @handle: DMA address of buffer
1695  * @size: size of buffer (same as passed to dma_map_page)
1696  * @dir: DMA transfer direction (same as passed to dma_map_page)
1697  *
1698  * Coherent IOMMU aware version of arm_dma_unmap_page()
1699  */
1700 static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1701                 size_t size, enum dma_data_direction dir,
1702                 struct dma_attrs *attrs)
1703 {
1704         struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1705         dma_addr_t iova = handle & PAGE_MASK;
1706         int offset = handle & ~PAGE_MASK;
1707         int len = PAGE_ALIGN(size + offset);
1708 
1709         if (!iova)
1710                 return;
1711 
1712         iommu_unmap(mapping->domain, iova, len);
1713         __free_iova(mapping, iova, len);
1714 }
1715 
1716 /**
1717  * arm_iommu_unmap_page
1718  * @dev: valid struct device pointer
1719  * @handle: DMA address of buffer
1720  * @size: size of buffer (same as passed to dma_map_page)
1721  * @dir: DMA transfer direction (same as passed to dma_map_page)
1722  *
1723  * IOMMU aware version of arm_dma_unmap_page()
1724  */
1725 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1726                 size_t size, enum dma_data_direction dir,
1727                 struct dma_attrs *attrs)
1728 {
1729         struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1730         dma_addr_t iova = handle & PAGE_MASK;
1731         struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1732         int offset = handle & ~PAGE_MASK;
1733         int len = PAGE_ALIGN(size + offset);
1734 
1735         if (!iova)
1736                 return;
1737 
1738         if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1739                 __dma_page_dev_to_cpu(page, offset, size, dir);
1740 
1741         iommu_unmap(mapping->domain, iova, len);
1742         __free_iova(mapping, iova, len);
1743 }
1744 
1745 static void arm_iommu_sync_single_for_cpu(struct device *dev,
1746                 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1747 {
1748         struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1749         dma_addr_t iova = handle & PAGE_MASK;
1750         struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1751         unsigned int offset = handle & ~PAGE_MASK;
1752 
1753         if (!iova)
1754                 return;
1755 
1756         __dma_page_dev_to_cpu(page, offset, size, dir);
1757 }
1758 
1759 static void arm_iommu_sync_single_for_device(struct device *dev,
1760                 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1761 {
1762         struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1763         dma_addr_t iova = handle & PAGE_MASK;
1764         struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1765         unsigned int offset = handle & ~PAGE_MASK;
1766 
1767         if (!iova)
1768                 return;
1769 
1770         __dma_page_cpu_to_dev(page, offset, size, dir);
1771 }
1772 
1773 struct dma_map_ops iommu_ops = {
1774         .alloc          = arm_iommu_alloc_attrs,
1775         .free           = arm_iommu_free_attrs,
1776         .mmap           = arm_iommu_mmap_attrs,
1777         .get_sgtable    = arm_iommu_get_sgtable,
1778 
1779         .map_page               = arm_iommu_map_page,
1780         .unmap_page             = arm_iommu_unmap_page,
1781         .sync_single_for_cpu    = arm_iommu_sync_single_for_cpu,
1782         .sync_single_for_device = arm_iommu_sync_single_for_device,
1783 
1784         .map_sg                 = arm_iommu_map_sg,
1785         .unmap_sg               = arm_iommu_unmap_sg,
1786         .sync_sg_for_cpu        = arm_iommu_sync_sg_for_cpu,
1787         .sync_sg_for_device     = arm_iommu_sync_sg_for_device,
1788 
1789         .set_dma_mask           = arm_dma_set_mask,
1790 };
1791 
1792 struct dma_map_ops iommu_coherent_ops = {
1793         .alloc          = arm_iommu_alloc_attrs,
1794         .free           = arm_iommu_free_attrs,
1795         .mmap           = arm_iommu_mmap_attrs,
1796         .get_sgtable    = arm_iommu_get_sgtable,
1797 
1798         .map_page       = arm_coherent_iommu_map_page,
1799         .unmap_page     = arm_coherent_iommu_unmap_page,
1800 
1801         .map_sg         = arm_coherent_iommu_map_sg,
1802         .unmap_sg       = arm_coherent_iommu_unmap_sg,
1803 
1804         .set_dma_mask   = arm_dma_set_mask,
1805 };
1806 
1807 /**
1808  * arm_iommu_create_mapping
1809  * @bus: pointer to the bus holding the client device (for IOMMU calls)
1810  * @base: start address of the valid IO address space
1811  * @size: size of the valid IO address space
1812  * @order: accuracy of the IO addresses allocations
1813  *
1814  * Creates a mapping structure which holds information about used/unused
1815  * IO address ranges, which is required to perform memory allocation and
1816  * mapping with IOMMU aware functions.
1817  *
1818  * The client device need to be attached to the mapping with
1819  * arm_iommu_attach_device function.
1820  */
1821 struct dma_iommu_mapping *
1822 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size,
1823                          int order)
1824 {
1825         unsigned int count = size >> (PAGE_SHIFT + order);
1826         unsigned int bitmap_size = BITS_TO_LONGS(count) * sizeof(long);
1827         struct dma_iommu_mapping *mapping;
1828         int err = -ENOMEM;
1829 
1830         if (!count)
1831                 return ERR_PTR(-EINVAL);
1832 
1833         mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
1834         if (!mapping)
1835                 goto err;
1836 
1837         mapping->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
1838         if (!mapping->bitmap)
1839                 goto err2;
1840 
1841         mapping->base = base;
1842         mapping->bits = BITS_PER_BYTE * bitmap_size;
1843         mapping->order = order;
1844         spin_lock_init(&mapping->lock);
1845 
1846         mapping->domain = iommu_domain_alloc(bus);
1847         if (!mapping->domain)
1848                 goto err3;
1849 
1850         kref_init(&mapping->kref);
1851         return mapping;
1852 err3:
1853         kfree(mapping->bitmap);
1854 err2:
1855         kfree(mapping);
1856 err:
1857         return ERR_PTR(err);
1858 }
1859 EXPORT_SYMBOL_GPL(arm_iommu_create_mapping);
1860 
1861 static void release_iommu_mapping(struct kref *kref)
1862 {
1863         struct dma_iommu_mapping *mapping =
1864                 container_of(kref, struct dma_iommu_mapping, kref);
1865 
1866         iommu_domain_free(mapping->domain);
1867         kfree(mapping->bitmap);
1868         kfree(mapping);
1869 }
1870 
1871 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
1872 {
1873         if (mapping)
1874                 kref_put(&mapping->kref, release_iommu_mapping);
1875 }
1876 EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
1877 
1878 /**
1879  * arm_iommu_attach_device
1880  * @dev: valid struct device pointer
1881  * @mapping: io address space mapping structure (returned from
1882  *      arm_iommu_create_mapping)
1883  *
1884  * Attaches specified io address space mapping to the provided device,
1885  * this replaces the dma operations (dma_map_ops pointer) with the
1886  * IOMMU aware version. More than one client might be attached to
1887  * the same io address space mapping.
1888  */
1889 int arm_iommu_attach_device(struct device *dev,
1890                             struct dma_iommu_mapping *mapping)
1891 {
1892         int err;
1893 
1894         err = iommu_attach_device(mapping->domain, dev);
1895         if (err)
1896                 return err;
1897 
1898         kref_get(&mapping->kref);
1899         dev->archdata.mapping = mapping;
1900         set_dma_ops(dev, &iommu_ops);
1901 
1902         pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
1903         return 0;
1904 }
1905 EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
1906 
1907 /**
1908  * arm_iommu_detach_device
1909  * @dev: valid struct device pointer
1910  *
1911  * Detaches the provided device from a previously attached map.
1912  * This voids the dma operations (dma_map_ops pointer)
1913  */
1914 void arm_iommu_detach_device(struct device *dev)
1915 {
1916         struct dma_iommu_mapping *mapping;
1917 
1918         mapping = to_dma_iommu_mapping(dev);
1919         if (!mapping) {
1920                 dev_warn(dev, "Not attached\n");
1921                 return;
1922         }
1923 
1924         iommu_detach_device(mapping->domain, dev);
1925         kref_put(&mapping->kref, release_iommu_mapping);
1926         mapping = NULL;
1927         set_dma_ops(dev, NULL);
1928 
1929         pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
1930 }
1931 EXPORT_SYMBOL_GPL(arm_iommu_detach_device);
1932 
1933 #endif
1934 

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