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Linux/arch/arm/mm/dma-mapping.c

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  1 /*
  2  *  linux/arch/arm/mm/dma-mapping.c
  3  *
  4  *  Copyright (C) 2000-2004 Russell King
  5  *
  6  * This program is free software; you can redistribute it and/or modify
  7  * it under the terms of the GNU General Public License version 2 as
  8  * published by the Free Software Foundation.
  9  *
 10  *  DMA uncached mapping support.
 11  */
 12 #include <linux/module.h>
 13 #include <linux/mm.h>
 14 #include <linux/gfp.h>
 15 #include <linux/errno.h>
 16 #include <linux/list.h>
 17 #include <linux/init.h>
 18 #include <linux/device.h>
 19 #include <linux/dma-mapping.h>
 20 #include <linux/dma-contiguous.h>
 21 #include <linux/highmem.h>
 22 #include <linux/memblock.h>
 23 #include <linux/slab.h>
 24 #include <linux/iommu.h>
 25 #include <linux/io.h>
 26 #include <linux/vmalloc.h>
 27 #include <linux/sizes.h>
 28 
 29 #include <asm/memory.h>
 30 #include <asm/highmem.h>
 31 #include <asm/cacheflush.h>
 32 #include <asm/tlbflush.h>
 33 #include <asm/mach/arch.h>
 34 #include <asm/dma-iommu.h>
 35 #include <asm/mach/map.h>
 36 #include <asm/system_info.h>
 37 #include <asm/dma-contiguous.h>
 38 
 39 #include "mm.h"
 40 
 41 /*
 42  * The DMA API is built upon the notion of "buffer ownership".  A buffer
 43  * is either exclusively owned by the CPU (and therefore may be accessed
 44  * by it) or exclusively owned by the DMA device.  These helper functions
 45  * represent the transitions between these two ownership states.
 46  *
 47  * Note, however, that on later ARMs, this notion does not work due to
 48  * speculative prefetches.  We model our approach on the assumption that
 49  * the CPU does do speculative prefetches, which means we clean caches
 50  * before transfers and delay cache invalidation until transfer completion.
 51  *
 52  */
 53 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
 54                 size_t, enum dma_data_direction);
 55 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
 56                 size_t, enum dma_data_direction);
 57 
 58 /**
 59  * arm_dma_map_page - map a portion of a page for streaming DMA
 60  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 61  * @page: page that buffer resides in
 62  * @offset: offset into page for start of buffer
 63  * @size: size of buffer to map
 64  * @dir: DMA transfer direction
 65  *
 66  * Ensure that any data held in the cache is appropriately discarded
 67  * or written back.
 68  *
 69  * The device owns this memory once this call has completed.  The CPU
 70  * can regain ownership by calling dma_unmap_page().
 71  */
 72 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
 73              unsigned long offset, size_t size, enum dma_data_direction dir,
 74              struct dma_attrs *attrs)
 75 {
 76         if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
 77                 __dma_page_cpu_to_dev(page, offset, size, dir);
 78         return pfn_to_dma(dev, page_to_pfn(page)) + offset;
 79 }
 80 
 81 static dma_addr_t arm_coherent_dma_map_page(struct device *dev, struct page *page,
 82              unsigned long offset, size_t size, enum dma_data_direction dir,
 83              struct dma_attrs *attrs)
 84 {
 85         return pfn_to_dma(dev, page_to_pfn(page)) + offset;
 86 }
 87 
 88 /**
 89  * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
 90  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 91  * @handle: DMA address of buffer
 92  * @size: size of buffer (same as passed to dma_map_page)
 93  * @dir: DMA transfer direction (same as passed to dma_map_page)
 94  *
 95  * Unmap a page streaming mode DMA translation.  The handle and size
 96  * must match what was provided in the previous dma_map_page() call.
 97  * All other usages are undefined.
 98  *
 99  * After this call, reads by the CPU to the buffer are guaranteed to see
100  * whatever the device wrote there.
101  */
102 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
103                 size_t size, enum dma_data_direction dir,
104                 struct dma_attrs *attrs)
105 {
106         if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
107                 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
108                                       handle & ~PAGE_MASK, size, dir);
109 }
110 
111 static void arm_dma_sync_single_for_cpu(struct device *dev,
112                 dma_addr_t handle, size_t size, enum dma_data_direction dir)
113 {
114         unsigned int offset = handle & (PAGE_SIZE - 1);
115         struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
116         __dma_page_dev_to_cpu(page, offset, size, dir);
117 }
118 
119 static void arm_dma_sync_single_for_device(struct device *dev,
120                 dma_addr_t handle, size_t size, enum dma_data_direction dir)
121 {
122         unsigned int offset = handle & (PAGE_SIZE - 1);
123         struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
124         __dma_page_cpu_to_dev(page, offset, size, dir);
125 }
126 
127 struct dma_map_ops arm_dma_ops = {
128         .alloc                  = arm_dma_alloc,
129         .free                   = arm_dma_free,
130         .mmap                   = arm_dma_mmap,
131         .get_sgtable            = arm_dma_get_sgtable,
132         .map_page               = arm_dma_map_page,
133         .unmap_page             = arm_dma_unmap_page,
134         .map_sg                 = arm_dma_map_sg,
135         .unmap_sg               = arm_dma_unmap_sg,
136         .sync_single_for_cpu    = arm_dma_sync_single_for_cpu,
137         .sync_single_for_device = arm_dma_sync_single_for_device,
138         .sync_sg_for_cpu        = arm_dma_sync_sg_for_cpu,
139         .sync_sg_for_device     = arm_dma_sync_sg_for_device,
140         .set_dma_mask           = arm_dma_set_mask,
141 };
142 EXPORT_SYMBOL(arm_dma_ops);
143 
144 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
145         dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs);
146 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
147                                   dma_addr_t handle, struct dma_attrs *attrs);
148 
149 struct dma_map_ops arm_coherent_dma_ops = {
150         .alloc                  = arm_coherent_dma_alloc,
151         .free                   = arm_coherent_dma_free,
152         .mmap                   = arm_dma_mmap,
153         .get_sgtable            = arm_dma_get_sgtable,
154         .map_page               = arm_coherent_dma_map_page,
155         .map_sg                 = arm_dma_map_sg,
156         .set_dma_mask           = arm_dma_set_mask,
157 };
158 EXPORT_SYMBOL(arm_coherent_dma_ops);
159 
160 static u64 get_coherent_dma_mask(struct device *dev)
161 {
162         u64 mask = (u64)arm_dma_limit;
163 
164         if (dev) {
165                 mask = dev->coherent_dma_mask;
166 
167                 /*
168                  * Sanity check the DMA mask - it must be non-zero, and
169                  * must be able to be satisfied by a DMA allocation.
170                  */
171                 if (mask == 0) {
172                         dev_warn(dev, "coherent DMA mask is unset\n");
173                         return 0;
174                 }
175 
176                 if ((~mask) & (u64)arm_dma_limit) {
177                         dev_warn(dev, "coherent DMA mask %#llx is smaller "
178                                  "than system GFP_DMA mask %#llx\n",
179                                  mask, (u64)arm_dma_limit);
180                         return 0;
181                 }
182         }
183 
184         return mask;
185 }
186 
187 static void __dma_clear_buffer(struct page *page, size_t size)
188 {
189         /*
190          * Ensure that the allocated pages are zeroed, and that any data
191          * lurking in the kernel direct-mapped region is invalidated.
192          */
193         if (PageHighMem(page)) {
194                 phys_addr_t base = __pfn_to_phys(page_to_pfn(page));
195                 phys_addr_t end = base + size;
196                 while (size > 0) {
197                         void *ptr = kmap_atomic(page);
198                         memset(ptr, 0, PAGE_SIZE);
199                         dmac_flush_range(ptr, ptr + PAGE_SIZE);
200                         kunmap_atomic(ptr);
201                         page++;
202                         size -= PAGE_SIZE;
203                 }
204                 outer_flush_range(base, end);
205         } else {
206                 void *ptr = page_address(page);
207                 memset(ptr, 0, size);
208                 dmac_flush_range(ptr, ptr + size);
209                 outer_flush_range(__pa(ptr), __pa(ptr) + size);
210         }
211 }
212 
213 /*
214  * Allocate a DMA buffer for 'dev' of size 'size' using the
215  * specified gfp mask.  Note that 'size' must be page aligned.
216  */
217 static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
218 {
219         unsigned long order = get_order(size);
220         struct page *page, *p, *e;
221 
222         page = alloc_pages(gfp, order);
223         if (!page)
224                 return NULL;
225 
226         /*
227          * Now split the huge page and free the excess pages
228          */
229         split_page(page, order);
230         for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
231                 __free_page(p);
232 
233         __dma_clear_buffer(page, size);
234 
235         return page;
236 }
237 
238 /*
239  * Free a DMA buffer.  'size' must be page aligned.
240  */
241 static void __dma_free_buffer(struct page *page, size_t size)
242 {
243         struct page *e = page + (size >> PAGE_SHIFT);
244 
245         while (page < e) {
246                 __free_page(page);
247                 page++;
248         }
249 }
250 
251 #ifdef CONFIG_MMU
252 #ifdef CONFIG_HUGETLB_PAGE
253 #warning ARM Coherent DMA allocator does not (yet) support huge TLB
254 #endif
255 
256 static void *__alloc_from_contiguous(struct device *dev, size_t size,
257                                      pgprot_t prot, struct page **ret_page,
258                                      const void *caller);
259 
260 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
261                                  pgprot_t prot, struct page **ret_page,
262                                  const void *caller);
263 
264 static void *
265 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
266         const void *caller)
267 {
268         struct vm_struct *area;
269         unsigned long addr;
270 
271         /*
272          * DMA allocation can be mapped to user space, so lets
273          * set VM_USERMAP flags too.
274          */
275         area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP,
276                                   caller);
277         if (!area)
278                 return NULL;
279         addr = (unsigned long)area->addr;
280         area->phys_addr = __pfn_to_phys(page_to_pfn(page));
281 
282         if (ioremap_page_range(addr, addr + size, area->phys_addr, prot)) {
283                 vunmap((void *)addr);
284                 return NULL;
285         }
286         return (void *)addr;
287 }
288 
289 static void __dma_free_remap(void *cpu_addr, size_t size)
290 {
291         unsigned int flags = VM_ARM_DMA_CONSISTENT | VM_USERMAP;
292         struct vm_struct *area = find_vm_area(cpu_addr);
293         if (!area || (area->flags & flags) != flags) {
294                 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
295                 return;
296         }
297         unmap_kernel_range((unsigned long)cpu_addr, size);
298         vunmap(cpu_addr);
299 }
300 
301 #define DEFAULT_DMA_COHERENT_POOL_SIZE  SZ_256K
302 
303 struct dma_pool {
304         size_t size;
305         spinlock_t lock;
306         unsigned long *bitmap;
307         unsigned long nr_pages;
308         void *vaddr;
309         struct page **pages;
310 };
311 
312 static struct dma_pool atomic_pool = {
313         .size = DEFAULT_DMA_COHERENT_POOL_SIZE,
314 };
315 
316 static int __init early_coherent_pool(char *p)
317 {
318         atomic_pool.size = memparse(p, &p);
319         return 0;
320 }
321 early_param("coherent_pool", early_coherent_pool);
322 
323 void __init init_dma_coherent_pool_size(unsigned long size)
324 {
325         /*
326          * Catch any attempt to set the pool size too late.
327          */
328         BUG_ON(atomic_pool.vaddr);
329 
330         /*
331          * Set architecture specific coherent pool size only if
332          * it has not been changed by kernel command line parameter.
333          */
334         if (atomic_pool.size == DEFAULT_DMA_COHERENT_POOL_SIZE)
335                 atomic_pool.size = size;
336 }
337 
338 /*
339  * Initialise the coherent pool for atomic allocations.
340  */
341 static int __init atomic_pool_init(void)
342 {
343         struct dma_pool *pool = &atomic_pool;
344         pgprot_t prot = pgprot_dmacoherent(pgprot_kernel);
345         gfp_t gfp = GFP_KERNEL | GFP_DMA;
346         unsigned long nr_pages = pool->size >> PAGE_SHIFT;
347         unsigned long *bitmap;
348         struct page *page;
349         struct page **pages;
350         void *ptr;
351         int bitmap_size = BITS_TO_LONGS(nr_pages) * sizeof(long);
352 
353         bitmap = kzalloc(bitmap_size, GFP_KERNEL);
354         if (!bitmap)
355                 goto no_bitmap;
356 
357         pages = kzalloc(nr_pages * sizeof(struct page *), GFP_KERNEL);
358         if (!pages)
359                 goto no_pages;
360 
361         if (IS_ENABLED(CONFIG_DMA_CMA))
362                 ptr = __alloc_from_contiguous(NULL, pool->size, prot, &page,
363                                               atomic_pool_init);
364         else
365                 ptr = __alloc_remap_buffer(NULL, pool->size, gfp, prot, &page,
366                                            atomic_pool_init);
367         if (ptr) {
368                 int i;
369 
370                 for (i = 0; i < nr_pages; i++)
371                         pages[i] = page + i;
372 
373                 spin_lock_init(&pool->lock);
374                 pool->vaddr = ptr;
375                 pool->pages = pages;
376                 pool->bitmap = bitmap;
377                 pool->nr_pages = nr_pages;
378                 pr_info("DMA: preallocated %u KiB pool for atomic coherent allocations\n",
379                        (unsigned)pool->size / 1024);
380                 return 0;
381         }
382 
383         kfree(pages);
384 no_pages:
385         kfree(bitmap);
386 no_bitmap:
387         pr_err("DMA: failed to allocate %u KiB pool for atomic coherent allocation\n",
388                (unsigned)pool->size / 1024);
389         return -ENOMEM;
390 }
391 /*
392  * CMA is activated by core_initcall, so we must be called after it.
393  */
394 postcore_initcall(atomic_pool_init);
395 
396 struct dma_contig_early_reserve {
397         phys_addr_t base;
398         unsigned long size;
399 };
400 
401 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
402 
403 static int dma_mmu_remap_num __initdata;
404 
405 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
406 {
407         dma_mmu_remap[dma_mmu_remap_num].base = base;
408         dma_mmu_remap[dma_mmu_remap_num].size = size;
409         dma_mmu_remap_num++;
410 }
411 
412 void __init dma_contiguous_remap(void)
413 {
414         int i;
415         for (i = 0; i < dma_mmu_remap_num; i++) {
416                 phys_addr_t start = dma_mmu_remap[i].base;
417                 phys_addr_t end = start + dma_mmu_remap[i].size;
418                 struct map_desc map;
419                 unsigned long addr;
420 
421                 if (end > arm_lowmem_limit)
422                         end = arm_lowmem_limit;
423                 if (start >= end)
424                         continue;
425 
426                 map.pfn = __phys_to_pfn(start);
427                 map.virtual = __phys_to_virt(start);
428                 map.length = end - start;
429                 map.type = MT_MEMORY_DMA_READY;
430 
431                 /*
432                  * Clear previous low-memory mapping to ensure that the
433                  * TLB does not see any conflicting entries, then flush
434                  * the TLB of the old entries before creating new mappings.
435                  *
436                  * This ensures that any speculatively loaded TLB entries
437                  * (even though they may be rare) can not cause any problems,
438                  * and ensures that this code is architecturally compliant.
439                  */
440                 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
441                      addr += PMD_SIZE)
442                         pmd_clear(pmd_off_k(addr));
443 
444                 flush_tlb_kernel_range(__phys_to_virt(start),
445                                        __phys_to_virt(end));
446 
447                 iotable_init(&map, 1);
448         }
449 }
450 
451 static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr,
452                             void *data)
453 {
454         struct page *page = virt_to_page(addr);
455         pgprot_t prot = *(pgprot_t *)data;
456 
457         set_pte_ext(pte, mk_pte(page, prot), 0);
458         return 0;
459 }
460 
461 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
462 {
463         unsigned long start = (unsigned long) page_address(page);
464         unsigned end = start + size;
465 
466         apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
467         flush_tlb_kernel_range(start, end);
468 }
469 
470 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
471                                  pgprot_t prot, struct page **ret_page,
472                                  const void *caller)
473 {
474         struct page *page;
475         void *ptr;
476         page = __dma_alloc_buffer(dev, size, gfp);
477         if (!page)
478                 return NULL;
479 
480         ptr = __dma_alloc_remap(page, size, gfp, prot, caller);
481         if (!ptr) {
482                 __dma_free_buffer(page, size);
483                 return NULL;
484         }
485 
486         *ret_page = page;
487         return ptr;
488 }
489 
490 static void *__alloc_from_pool(size_t size, struct page **ret_page)
491 {
492         struct dma_pool *pool = &atomic_pool;
493         unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
494         unsigned int pageno;
495         unsigned long flags;
496         void *ptr = NULL;
497         unsigned long align_mask;
498 
499         if (!pool->vaddr) {
500                 WARN(1, "coherent pool not initialised!\n");
501                 return NULL;
502         }
503 
504         /*
505          * Align the region allocation - allocations from pool are rather
506          * small, so align them to their order in pages, minimum is a page
507          * size. This helps reduce fragmentation of the DMA space.
508          */
509         align_mask = (1 << get_order(size)) - 1;
510 
511         spin_lock_irqsave(&pool->lock, flags);
512         pageno = bitmap_find_next_zero_area(pool->bitmap, pool->nr_pages,
513                                             0, count, align_mask);
514         if (pageno < pool->nr_pages) {
515                 bitmap_set(pool->bitmap, pageno, count);
516                 ptr = pool->vaddr + PAGE_SIZE * pageno;
517                 *ret_page = pool->pages[pageno];
518         } else {
519                 pr_err_once("ERROR: %u KiB atomic DMA coherent pool is too small!\n"
520                             "Please increase it with coherent_pool= kernel parameter!\n",
521                             (unsigned)pool->size / 1024);
522         }
523         spin_unlock_irqrestore(&pool->lock, flags);
524 
525         return ptr;
526 }
527 
528 static bool __in_atomic_pool(void *start, size_t size)
529 {
530         struct dma_pool *pool = &atomic_pool;
531         void *end = start + size;
532         void *pool_start = pool->vaddr;
533         void *pool_end = pool->vaddr + pool->size;
534 
535         if (start < pool_start || start >= pool_end)
536                 return false;
537 
538         if (end <= pool_end)
539                 return true;
540 
541         WARN(1, "Wrong coherent size(%p-%p) from atomic pool(%p-%p)\n",
542              start, end - 1, pool_start, pool_end - 1);
543 
544         return false;
545 }
546 
547 static int __free_from_pool(void *start, size_t size)
548 {
549         struct dma_pool *pool = &atomic_pool;
550         unsigned long pageno, count;
551         unsigned long flags;
552 
553         if (!__in_atomic_pool(start, size))
554                 return 0;
555 
556         pageno = (start - pool->vaddr) >> PAGE_SHIFT;
557         count = size >> PAGE_SHIFT;
558 
559         spin_lock_irqsave(&pool->lock, flags);
560         bitmap_clear(pool->bitmap, pageno, count);
561         spin_unlock_irqrestore(&pool->lock, flags);
562 
563         return 1;
564 }
565 
566 static void *__alloc_from_contiguous(struct device *dev, size_t size,
567                                      pgprot_t prot, struct page **ret_page,
568                                      const void *caller)
569 {
570         unsigned long order = get_order(size);
571         size_t count = size >> PAGE_SHIFT;
572         struct page *page;
573         void *ptr;
574 
575         page = dma_alloc_from_contiguous(dev, count, order);
576         if (!page)
577                 return NULL;
578 
579         __dma_clear_buffer(page, size);
580 
581         if (PageHighMem(page)) {
582                 ptr = __dma_alloc_remap(page, size, GFP_KERNEL, prot, caller);
583                 if (!ptr) {
584                         dma_release_from_contiguous(dev, page, count);
585                         return NULL;
586                 }
587         } else {
588                 __dma_remap(page, size, prot);
589                 ptr = page_address(page);
590         }
591         *ret_page = page;
592         return ptr;
593 }
594 
595 static void __free_from_contiguous(struct device *dev, struct page *page,
596                                    void *cpu_addr, size_t size)
597 {
598         if (PageHighMem(page))
599                 __dma_free_remap(cpu_addr, size);
600         else
601                 __dma_remap(page, size, pgprot_kernel);
602         dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
603 }
604 
605 static inline pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot)
606 {
607         prot = dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs) ?
608                             pgprot_writecombine(prot) :
609                             pgprot_dmacoherent(prot);
610         return prot;
611 }
612 
613 #define nommu() 0
614 
615 #else   /* !CONFIG_MMU */
616 
617 #define nommu() 1
618 
619 #define __get_dma_pgprot(attrs, prot)   __pgprot(0)
620 #define __alloc_remap_buffer(dev, size, gfp, prot, ret, c)      NULL
621 #define __alloc_from_pool(size, ret_page)                       NULL
622 #define __alloc_from_contiguous(dev, size, prot, ret, c)        NULL
623 #define __free_from_pool(cpu_addr, size)                        0
624 #define __free_from_contiguous(dev, page, cpu_addr, size)       do { } while (0)
625 #define __dma_free_remap(cpu_addr, size)                        do { } while (0)
626 
627 #endif  /* CONFIG_MMU */
628 
629 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
630                                    struct page **ret_page)
631 {
632         struct page *page;
633         page = __dma_alloc_buffer(dev, size, gfp);
634         if (!page)
635                 return NULL;
636 
637         *ret_page = page;
638         return page_address(page);
639 }
640 
641 
642 
643 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
644                          gfp_t gfp, pgprot_t prot, bool is_coherent, const void *caller)
645 {
646         u64 mask = get_coherent_dma_mask(dev);
647         struct page *page = NULL;
648         void *addr;
649 
650 #ifdef CONFIG_DMA_API_DEBUG
651         u64 limit = (mask + 1) & ~mask;
652         if (limit && size >= limit) {
653                 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
654                         size, mask);
655                 return NULL;
656         }
657 #endif
658 
659         if (!mask)
660                 return NULL;
661 
662         if (mask < 0xffffffffULL)
663                 gfp |= GFP_DMA;
664 
665         /*
666          * Following is a work-around (a.k.a. hack) to prevent pages
667          * with __GFP_COMP being passed to split_page() which cannot
668          * handle them.  The real problem is that this flag probably
669          * should be 0 on ARM as it is not supported on this
670          * platform; see CONFIG_HUGETLBFS.
671          */
672         gfp &= ~(__GFP_COMP);
673 
674         *handle = DMA_ERROR_CODE;
675         size = PAGE_ALIGN(size);
676 
677         if (is_coherent || nommu())
678                 addr = __alloc_simple_buffer(dev, size, gfp, &page);
679         else if (!(gfp & __GFP_WAIT))
680                 addr = __alloc_from_pool(size, &page);
681         else if (!IS_ENABLED(CONFIG_DMA_CMA))
682                 addr = __alloc_remap_buffer(dev, size, gfp, prot, &page, caller);
683         else
684                 addr = __alloc_from_contiguous(dev, size, prot, &page, caller);
685 
686         if (addr)
687                 *handle = pfn_to_dma(dev, page_to_pfn(page));
688 
689         return addr;
690 }
691 
692 /*
693  * Allocate DMA-coherent memory space and return both the kernel remapped
694  * virtual and bus address for that space.
695  */
696 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
697                     gfp_t gfp, struct dma_attrs *attrs)
698 {
699         pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
700         void *memory;
701 
702         if (dma_alloc_from_coherent(dev, size, handle, &memory))
703                 return memory;
704 
705         return __dma_alloc(dev, size, handle, gfp, prot, false,
706                            __builtin_return_address(0));
707 }
708 
709 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
710         dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
711 {
712         pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
713         void *memory;
714 
715         if (dma_alloc_from_coherent(dev, size, handle, &memory))
716                 return memory;
717 
718         return __dma_alloc(dev, size, handle, gfp, prot, true,
719                            __builtin_return_address(0));
720 }
721 
722 /*
723  * Create userspace mapping for the DMA-coherent memory.
724  */
725 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
726                  void *cpu_addr, dma_addr_t dma_addr, size_t size,
727                  struct dma_attrs *attrs)
728 {
729         int ret = -ENXIO;
730 #ifdef CONFIG_MMU
731         unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
732         unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
733         unsigned long pfn = dma_to_pfn(dev, dma_addr);
734         unsigned long off = vma->vm_pgoff;
735 
736         vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
737 
738         if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
739                 return ret;
740 
741         if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
742                 ret = remap_pfn_range(vma, vma->vm_start,
743                                       pfn + off,
744                                       vma->vm_end - vma->vm_start,
745                                       vma->vm_page_prot);
746         }
747 #endif  /* CONFIG_MMU */
748 
749         return ret;
750 }
751 
752 /*
753  * Free a buffer as defined by the above mapping.
754  */
755 static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
756                            dma_addr_t handle, struct dma_attrs *attrs,
757                            bool is_coherent)
758 {
759         struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
760 
761         if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
762                 return;
763 
764         size = PAGE_ALIGN(size);
765 
766         if (is_coherent || nommu()) {
767                 __dma_free_buffer(page, size);
768         } else if (__free_from_pool(cpu_addr, size)) {
769                 return;
770         } else if (!IS_ENABLED(CONFIG_DMA_CMA)) {
771                 __dma_free_remap(cpu_addr, size);
772                 __dma_free_buffer(page, size);
773         } else {
774                 /*
775                  * Non-atomic allocations cannot be freed with IRQs disabled
776                  */
777                 WARN_ON(irqs_disabled());
778                 __free_from_contiguous(dev, page, cpu_addr, size);
779         }
780 }
781 
782 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
783                   dma_addr_t handle, struct dma_attrs *attrs)
784 {
785         __arm_dma_free(dev, size, cpu_addr, handle, attrs, false);
786 }
787 
788 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
789                                   dma_addr_t handle, struct dma_attrs *attrs)
790 {
791         __arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
792 }
793 
794 int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
795                  void *cpu_addr, dma_addr_t handle, size_t size,
796                  struct dma_attrs *attrs)
797 {
798         struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
799         int ret;
800 
801         ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
802         if (unlikely(ret))
803                 return ret;
804 
805         sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
806         return 0;
807 }
808 
809 static void dma_cache_maint_page(struct page *page, unsigned long offset,
810         size_t size, enum dma_data_direction dir,
811         void (*op)(const void *, size_t, int))
812 {
813         unsigned long pfn;
814         size_t left = size;
815 
816         pfn = page_to_pfn(page) + offset / PAGE_SIZE;
817         offset %= PAGE_SIZE;
818 
819         /*
820          * A single sg entry may refer to multiple physically contiguous
821          * pages.  But we still need to process highmem pages individually.
822          * If highmem is not configured then the bulk of this loop gets
823          * optimized out.
824          */
825         do {
826                 size_t len = left;
827                 void *vaddr;
828 
829                 page = pfn_to_page(pfn);
830 
831                 if (PageHighMem(page)) {
832                         if (len + offset > PAGE_SIZE)
833                                 len = PAGE_SIZE - offset;
834 
835                         if (cache_is_vipt_nonaliasing()) {
836                                 vaddr = kmap_atomic(page);
837                                 op(vaddr + offset, len, dir);
838                                 kunmap_atomic(vaddr);
839                         } else {
840                                 vaddr = kmap_high_get(page);
841                                 if (vaddr) {
842                                         op(vaddr + offset, len, dir);
843                                         kunmap_high(page);
844                                 }
845                         }
846                 } else {
847                         vaddr = page_address(page) + offset;
848                         op(vaddr, len, dir);
849                 }
850                 offset = 0;
851                 pfn++;
852                 left -= len;
853         } while (left);
854 }
855 
856 /*
857  * Make an area consistent for devices.
858  * Note: Drivers should NOT use this function directly, as it will break
859  * platforms with CONFIG_DMABOUNCE.
860  * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
861  */
862 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
863         size_t size, enum dma_data_direction dir)
864 {
865         unsigned long paddr;
866 
867         dma_cache_maint_page(page, off, size, dir, dmac_map_area);
868 
869         paddr = page_to_phys(page) + off;
870         if (dir == DMA_FROM_DEVICE) {
871                 outer_inv_range(paddr, paddr + size);
872         } else {
873                 outer_clean_range(paddr, paddr + size);
874         }
875         /* FIXME: non-speculating: flush on bidirectional mappings? */
876 }
877 
878 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
879         size_t size, enum dma_data_direction dir)
880 {
881         unsigned long paddr = page_to_phys(page) + off;
882 
883         /* FIXME: non-speculating: not required */
884         /* don't bother invalidating if DMA to device */
885         if (dir != DMA_TO_DEVICE)
886                 outer_inv_range(paddr, paddr + size);
887 
888         dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
889 
890         /*
891          * Mark the D-cache clean for these pages to avoid extra flushing.
892          */
893         if (dir != DMA_TO_DEVICE && size >= PAGE_SIZE) {
894                 unsigned long pfn;
895                 size_t left = size;
896 
897                 pfn = page_to_pfn(page) + off / PAGE_SIZE;
898                 off %= PAGE_SIZE;
899                 if (off) {
900                         pfn++;
901                         left -= PAGE_SIZE - off;
902                 }
903                 while (left >= PAGE_SIZE) {
904                         page = pfn_to_page(pfn++);
905                         set_bit(PG_dcache_clean, &page->flags);
906                         left -= PAGE_SIZE;
907                 }
908         }
909 }
910 
911 /**
912  * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
913  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
914  * @sg: list of buffers
915  * @nents: number of buffers to map
916  * @dir: DMA transfer direction
917  *
918  * Map a set of buffers described by scatterlist in streaming mode for DMA.
919  * This is the scatter-gather version of the dma_map_single interface.
920  * Here the scatter gather list elements are each tagged with the
921  * appropriate dma address and length.  They are obtained via
922  * sg_dma_{address,length}.
923  *
924  * Device ownership issues as mentioned for dma_map_single are the same
925  * here.
926  */
927 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
928                 enum dma_data_direction dir, struct dma_attrs *attrs)
929 {
930         struct dma_map_ops *ops = get_dma_ops(dev);
931         struct scatterlist *s;
932         int i, j;
933 
934         for_each_sg(sg, s, nents, i) {
935 #ifdef CONFIG_NEED_SG_DMA_LENGTH
936                 s->dma_length = s->length;
937 #endif
938                 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
939                                                 s->length, dir, attrs);
940                 if (dma_mapping_error(dev, s->dma_address))
941                         goto bad_mapping;
942         }
943         return nents;
944 
945  bad_mapping:
946         for_each_sg(sg, s, i, j)
947                 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
948         return 0;
949 }
950 
951 /**
952  * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
953  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
954  * @sg: list of buffers
955  * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
956  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
957  *
958  * Unmap a set of streaming mode DMA translations.  Again, CPU access
959  * rules concerning calls here are the same as for dma_unmap_single().
960  */
961 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
962                 enum dma_data_direction dir, struct dma_attrs *attrs)
963 {
964         struct dma_map_ops *ops = get_dma_ops(dev);
965         struct scatterlist *s;
966 
967         int i;
968 
969         for_each_sg(sg, s, nents, i)
970                 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
971 }
972 
973 /**
974  * arm_dma_sync_sg_for_cpu
975  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
976  * @sg: list of buffers
977  * @nents: number of buffers to map (returned from dma_map_sg)
978  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
979  */
980 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
981                         int nents, enum dma_data_direction dir)
982 {
983         struct dma_map_ops *ops = get_dma_ops(dev);
984         struct scatterlist *s;
985         int i;
986 
987         for_each_sg(sg, s, nents, i)
988                 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
989                                          dir);
990 }
991 
992 /**
993  * arm_dma_sync_sg_for_device
994  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
995  * @sg: list of buffers
996  * @nents: number of buffers to map (returned from dma_map_sg)
997  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
998  */
999 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1000                         int nents, enum dma_data_direction dir)
1001 {
1002         struct dma_map_ops *ops = get_dma_ops(dev);
1003         struct scatterlist *s;
1004         int i;
1005 
1006         for_each_sg(sg, s, nents, i)
1007                 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
1008                                             dir);
1009 }
1010 
1011 /*
1012  * Return whether the given device DMA address mask can be supported
1013  * properly.  For example, if your device can only drive the low 24-bits
1014  * during bus mastering, then you would pass 0x00ffffff as the mask
1015  * to this function.
1016  */
1017 int dma_supported(struct device *dev, u64 mask)
1018 {
1019         if (mask < (u64)arm_dma_limit)
1020                 return 0;
1021         return 1;
1022 }
1023 EXPORT_SYMBOL(dma_supported);
1024 
1025 int arm_dma_set_mask(struct device *dev, u64 dma_mask)
1026 {
1027         if (!dev->dma_mask || !dma_supported(dev, dma_mask))
1028                 return -EIO;
1029 
1030         *dev->dma_mask = dma_mask;
1031 
1032         return 0;
1033 }
1034 
1035 #define PREALLOC_DMA_DEBUG_ENTRIES      4096
1036 
1037 static int __init dma_debug_do_init(void)
1038 {
1039         dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
1040         return 0;
1041 }
1042 fs_initcall(dma_debug_do_init);
1043 
1044 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1045 
1046 /* IOMMU */
1047 
1048 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
1049                                       size_t size)
1050 {
1051         unsigned int order = get_order(size);
1052         unsigned int align = 0;
1053         unsigned int count, start;
1054         unsigned long flags;
1055 
1056         if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
1057                 order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;
1058 
1059         count = ((PAGE_ALIGN(size) >> PAGE_SHIFT) +
1060                  (1 << mapping->order) - 1) >> mapping->order;
1061 
1062         if (order > mapping->order)
1063                 align = (1 << (order - mapping->order)) - 1;
1064 
1065         spin_lock_irqsave(&mapping->lock, flags);
1066         start = bitmap_find_next_zero_area(mapping->bitmap, mapping->bits, 0,
1067                                            count, align);
1068         if (start > mapping->bits) {
1069                 spin_unlock_irqrestore(&mapping->lock, flags);
1070                 return DMA_ERROR_CODE;
1071         }
1072 
1073         bitmap_set(mapping->bitmap, start, count);
1074         spin_unlock_irqrestore(&mapping->lock, flags);
1075 
1076         return mapping->base + (start << (mapping->order + PAGE_SHIFT));
1077 }
1078 
1079 static inline void __free_iova(struct dma_iommu_mapping *mapping,
1080                                dma_addr_t addr, size_t size)
1081 {
1082         unsigned int start = (addr - mapping->base) >>
1083                              (mapping->order + PAGE_SHIFT);
1084         unsigned int count = ((size >> PAGE_SHIFT) +
1085                               (1 << mapping->order) - 1) >> mapping->order;
1086         unsigned long flags;
1087 
1088         spin_lock_irqsave(&mapping->lock, flags);
1089         bitmap_clear(mapping->bitmap, start, count);
1090         spin_unlock_irqrestore(&mapping->lock, flags);
1091 }
1092 
1093 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
1094                                           gfp_t gfp, struct dma_attrs *attrs)
1095 {
1096         struct page **pages;
1097         int count = size >> PAGE_SHIFT;
1098         int array_size = count * sizeof(struct page *);
1099         int i = 0;
1100 
1101         if (array_size <= PAGE_SIZE)
1102                 pages = kzalloc(array_size, gfp);
1103         else
1104                 pages = vzalloc(array_size);
1105         if (!pages)
1106                 return NULL;
1107 
1108         if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS, attrs))
1109         {
1110                 unsigned long order = get_order(size);
1111                 struct page *page;
1112 
1113                 page = dma_alloc_from_contiguous(dev, count, order);
1114                 if (!page)
1115                         goto error;
1116 
1117                 __dma_clear_buffer(page, size);
1118 
1119                 for (i = 0; i < count; i++)
1120                         pages[i] = page + i;
1121 
1122                 return pages;
1123         }
1124 
1125         /*
1126          * IOMMU can map any pages, so himem can also be used here
1127          */
1128         gfp |= __GFP_NOWARN | __GFP_HIGHMEM;
1129 
1130         while (count) {
1131                 int j, order = __fls(count);
1132 
1133                 pages[i] = alloc_pages(gfp, order);
1134                 while (!pages[i] && order)
1135                         pages[i] = alloc_pages(gfp, --order);
1136                 if (!pages[i])
1137                         goto error;
1138 
1139                 if (order) {
1140                         split_page(pages[i], order);
1141                         j = 1 << order;
1142                         while (--j)
1143                                 pages[i + j] = pages[i] + j;
1144                 }
1145 
1146                 __dma_clear_buffer(pages[i], PAGE_SIZE << order);
1147                 i += 1 << order;
1148                 count -= 1 << order;
1149         }
1150 
1151         return pages;
1152 error:
1153         while (i--)
1154                 if (pages[i])
1155                         __free_pages(pages[i], 0);
1156         if (array_size <= PAGE_SIZE)
1157                 kfree(pages);
1158         else
1159                 vfree(pages);
1160         return NULL;
1161 }
1162 
1163 static int __iommu_free_buffer(struct device *dev, struct page **pages,
1164                                size_t size, struct dma_attrs *attrs)
1165 {
1166         int count = size >> PAGE_SHIFT;
1167         int array_size = count * sizeof(struct page *);
1168         int i;
1169 
1170         if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS, attrs)) {
1171                 dma_release_from_contiguous(dev, pages[0], count);
1172         } else {
1173                 for (i = 0; i < count; i++)
1174                         if (pages[i])
1175                                 __free_pages(pages[i], 0);
1176         }
1177 
1178         if (array_size <= PAGE_SIZE)
1179                 kfree(pages);
1180         else
1181                 vfree(pages);
1182         return 0;
1183 }
1184 
1185 /*
1186  * Create a CPU mapping for a specified pages
1187  */
1188 static void *
1189 __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
1190                     const void *caller)
1191 {
1192         unsigned int i, nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1193         struct vm_struct *area;
1194         unsigned long p;
1195 
1196         area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP,
1197                                   caller);
1198         if (!area)
1199                 return NULL;
1200 
1201         area->pages = pages;
1202         area->nr_pages = nr_pages;
1203         p = (unsigned long)area->addr;
1204 
1205         for (i = 0; i < nr_pages; i++) {
1206                 phys_addr_t phys = __pfn_to_phys(page_to_pfn(pages[i]));
1207                 if (ioremap_page_range(p, p + PAGE_SIZE, phys, prot))
1208                         goto err;
1209                 p += PAGE_SIZE;
1210         }
1211         return area->addr;
1212 err:
1213         unmap_kernel_range((unsigned long)area->addr, size);
1214         vunmap(area->addr);
1215         return NULL;
1216 }
1217 
1218 /*
1219  * Create a mapping in device IO address space for specified pages
1220  */
1221 static dma_addr_t
1222 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
1223 {
1224         struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1225         unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1226         dma_addr_t dma_addr, iova;
1227         int i, ret = DMA_ERROR_CODE;
1228 
1229         dma_addr = __alloc_iova(mapping, size);
1230         if (dma_addr == DMA_ERROR_CODE)
1231                 return dma_addr;
1232 
1233         iova = dma_addr;
1234         for (i = 0; i < count; ) {
1235                 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1236                 phys_addr_t phys = page_to_phys(pages[i]);
1237                 unsigned int len, j;
1238 
1239                 for (j = i + 1; j < count; j++, next_pfn++)
1240                         if (page_to_pfn(pages[j]) != next_pfn)
1241                                 break;
1242 
1243                 len = (j - i) << PAGE_SHIFT;
1244                 ret = iommu_map(mapping->domain, iova, phys, len,
1245                                 IOMMU_READ|IOMMU_WRITE);
1246                 if (ret < 0)
1247                         goto fail;
1248                 iova += len;
1249                 i = j;
1250         }
1251         return dma_addr;
1252 fail:
1253         iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1254         __free_iova(mapping, dma_addr, size);
1255         return DMA_ERROR_CODE;
1256 }
1257 
1258 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1259 {
1260         struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1261 
1262         /*
1263          * add optional in-page offset from iova to size and align
1264          * result to page size
1265          */
1266         size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1267         iova &= PAGE_MASK;
1268 
1269         iommu_unmap(mapping->domain, iova, size);
1270         __free_iova(mapping, iova, size);
1271         return 0;
1272 }
1273 
1274 static struct page **__atomic_get_pages(void *addr)
1275 {
1276         struct dma_pool *pool = &atomic_pool;
1277         struct page **pages = pool->pages;
1278         int offs = (addr - pool->vaddr) >> PAGE_SHIFT;
1279 
1280         return pages + offs;
1281 }
1282 
1283 static struct page **__iommu_get_pages(void *cpu_addr, struct dma_attrs *attrs)
1284 {
1285         struct vm_struct *area;
1286 
1287         if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
1288                 return __atomic_get_pages(cpu_addr);
1289 
1290         if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
1291                 return cpu_addr;
1292 
1293         area = find_vm_area(cpu_addr);
1294         if (area && (area->flags & VM_ARM_DMA_CONSISTENT))
1295                 return area->pages;
1296         return NULL;
1297 }
1298 
1299 static void *__iommu_alloc_atomic(struct device *dev, size_t size,
1300                                   dma_addr_t *handle)
1301 {
1302         struct page *page;
1303         void *addr;
1304 
1305         addr = __alloc_from_pool(size, &page);
1306         if (!addr)
1307                 return NULL;
1308 
1309         *handle = __iommu_create_mapping(dev, &page, size);
1310         if (*handle == DMA_ERROR_CODE)
1311                 goto err_mapping;
1312 
1313         return addr;
1314 
1315 err_mapping:
1316         __free_from_pool(addr, size);
1317         return NULL;
1318 }
1319 
1320 static void __iommu_free_atomic(struct device *dev, void *cpu_addr,
1321                                 dma_addr_t handle, size_t size)
1322 {
1323         __iommu_remove_mapping(dev, handle, size);
1324         __free_from_pool(cpu_addr, size);
1325 }
1326 
1327 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1328             dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
1329 {
1330         pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
1331         struct page **pages;
1332         void *addr = NULL;
1333 
1334         *handle = DMA_ERROR_CODE;
1335         size = PAGE_ALIGN(size);
1336 
1337         if (!(gfp & __GFP_WAIT))
1338                 return __iommu_alloc_atomic(dev, size, handle);
1339 
1340         /*
1341          * Following is a work-around (a.k.a. hack) to prevent pages
1342          * with __GFP_COMP being passed to split_page() which cannot
1343          * handle them.  The real problem is that this flag probably
1344          * should be 0 on ARM as it is not supported on this
1345          * platform; see CONFIG_HUGETLBFS.
1346          */
1347         gfp &= ~(__GFP_COMP);
1348 
1349         pages = __iommu_alloc_buffer(dev, size, gfp, attrs);
1350         if (!pages)
1351                 return NULL;
1352 
1353         *handle = __iommu_create_mapping(dev, pages, size);
1354         if (*handle == DMA_ERROR_CODE)
1355                 goto err_buffer;
1356 
1357         if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
1358                 return pages;
1359 
1360         addr = __iommu_alloc_remap(pages, size, gfp, prot,
1361                                    __builtin_return_address(0));
1362         if (!addr)
1363                 goto err_mapping;
1364 
1365         return addr;
1366 
1367 err_mapping:
1368         __iommu_remove_mapping(dev, *handle, size);
1369 err_buffer:
1370         __iommu_free_buffer(dev, pages, size, attrs);
1371         return NULL;
1372 }
1373 
1374 static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1375                     void *cpu_addr, dma_addr_t dma_addr, size_t size,
1376                     struct dma_attrs *attrs)
1377 {
1378         unsigned long uaddr = vma->vm_start;
1379         unsigned long usize = vma->vm_end - vma->vm_start;
1380         struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1381         unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1382         unsigned long off = vma->vm_pgoff;
1383 
1384         vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1385 
1386         if (!pages)
1387                 return -ENXIO;
1388 
1389         if (off >= nr_pages || (usize >> PAGE_SHIFT) > nr_pages - off)
1390                 return -ENXIO;
1391 
1392         pages += off;
1393 
1394         do {
1395                 int ret = vm_insert_page(vma, uaddr, *pages++);
1396                 if (ret) {
1397                         pr_err("Remapping memory failed: %d\n", ret);
1398                         return ret;
1399                 }
1400                 uaddr += PAGE_SIZE;
1401                 usize -= PAGE_SIZE;
1402         } while (usize > 0);
1403 
1404         return 0;
1405 }
1406 
1407 /*
1408  * free a page as defined by the above mapping.
1409  * Must not be called with IRQs disabled.
1410  */
1411 void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1412                           dma_addr_t handle, struct dma_attrs *attrs)
1413 {
1414         struct page **pages;
1415         size = PAGE_ALIGN(size);
1416 
1417         if (__in_atomic_pool(cpu_addr, size)) {
1418                 __iommu_free_atomic(dev, cpu_addr, handle, size);
1419                 return;
1420         }
1421 
1422         pages = __iommu_get_pages(cpu_addr, attrs);
1423         if (!pages) {
1424                 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1425                 return;
1426         }
1427 
1428         if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) {
1429                 unmap_kernel_range((unsigned long)cpu_addr, size);
1430                 vunmap(cpu_addr);
1431         }
1432 
1433         __iommu_remove_mapping(dev, handle, size);
1434         __iommu_free_buffer(dev, pages, size, attrs);
1435 }
1436 
1437 static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
1438                                  void *cpu_addr, dma_addr_t dma_addr,
1439                                  size_t size, struct dma_attrs *attrs)
1440 {
1441         unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1442         struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1443 
1444         if (!pages)
1445                 return -ENXIO;
1446 
1447         return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
1448                                          GFP_KERNEL);
1449 }
1450 
1451 static int __dma_direction_to_prot(enum dma_data_direction dir)
1452 {
1453         int prot;
1454 
1455         switch (dir) {
1456         case DMA_BIDIRECTIONAL:
1457                 prot = IOMMU_READ | IOMMU_WRITE;
1458                 break;
1459         case DMA_TO_DEVICE:
1460                 prot = IOMMU_READ;
1461                 break;
1462         case DMA_FROM_DEVICE:
1463                 prot = IOMMU_WRITE;
1464                 break;
1465         default:
1466                 prot = 0;
1467         }
1468 
1469         return prot;
1470 }
1471 
1472 /*
1473  * Map a part of the scatter-gather list into contiguous io address space
1474  */
1475 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1476                           size_t size, dma_addr_t *handle,
1477                           enum dma_data_direction dir, struct dma_attrs *attrs,
1478                           bool is_coherent)
1479 {
1480         struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1481         dma_addr_t iova, iova_base;
1482         int ret = 0;
1483         unsigned int count;
1484         struct scatterlist *s;
1485         int prot;
1486 
1487         size = PAGE_ALIGN(size);
1488         *handle = DMA_ERROR_CODE;
1489 
1490         iova_base = iova = __alloc_iova(mapping, size);
1491         if (iova == DMA_ERROR_CODE)
1492                 return -ENOMEM;
1493 
1494         for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1495                 phys_addr_t phys = page_to_phys(sg_page(s));
1496                 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1497 
1498                 if (!is_coherent &&
1499                         !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1500                         __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1501 
1502                 prot = __dma_direction_to_prot(dir);
1503 
1504                 ret = iommu_map(mapping->domain, iova, phys, len, prot);
1505                 if (ret < 0)
1506                         goto fail;
1507                 count += len >> PAGE_SHIFT;
1508                 iova += len;
1509         }
1510         *handle = iova_base;
1511 
1512         return 0;
1513 fail:
1514         iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1515         __free_iova(mapping, iova_base, size);
1516         return ret;
1517 }
1518 
1519 static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1520                      enum dma_data_direction dir, struct dma_attrs *attrs,
1521                      bool is_coherent)
1522 {
1523         struct scatterlist *s = sg, *dma = sg, *start = sg;
1524         int i, count = 0;
1525         unsigned int offset = s->offset;
1526         unsigned int size = s->offset + s->length;
1527         unsigned int max = dma_get_max_seg_size(dev);
1528 
1529         for (i = 1; i < nents; i++) {
1530                 s = sg_next(s);
1531 
1532                 s->dma_address = DMA_ERROR_CODE;
1533                 s->dma_length = 0;
1534 
1535                 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1536                         if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1537                             dir, attrs, is_coherent) < 0)
1538                                 goto bad_mapping;
1539 
1540                         dma->dma_address += offset;
1541                         dma->dma_length = size - offset;
1542 
1543                         size = offset = s->offset;
1544                         start = s;
1545                         dma = sg_next(dma);
1546                         count += 1;
1547                 }
1548                 size += s->length;
1549         }
1550         if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
1551                 is_coherent) < 0)
1552                 goto bad_mapping;
1553 
1554         dma->dma_address += offset;
1555         dma->dma_length = size - offset;
1556 
1557         return count+1;
1558 
1559 bad_mapping:
1560         for_each_sg(sg, s, count, i)
1561                 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1562         return 0;
1563 }
1564 
1565 /**
1566  * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1567  * @dev: valid struct device pointer
1568  * @sg: list of buffers
1569  * @nents: number of buffers to map
1570  * @dir: DMA transfer direction
1571  *
1572  * Map a set of i/o coherent buffers described by scatterlist in streaming
1573  * mode for DMA. The scatter gather list elements are merged together (if
1574  * possible) and tagged with the appropriate dma address and length. They are
1575  * obtained via sg_dma_{address,length}.
1576  */
1577 int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1578                 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1579 {
1580         return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
1581 }
1582 
1583 /**
1584  * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1585  * @dev: valid struct device pointer
1586  * @sg: list of buffers
1587  * @nents: number of buffers to map
1588  * @dir: DMA transfer direction
1589  *
1590  * Map a set of buffers described by scatterlist in streaming mode for DMA.
1591  * The scatter gather list elements are merged together (if possible) and
1592  * tagged with the appropriate dma address and length. They are obtained via
1593  * sg_dma_{address,length}.
1594  */
1595 int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1596                 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1597 {
1598         return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
1599 }
1600 
1601 static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1602                 int nents, enum dma_data_direction dir, struct dma_attrs *attrs,
1603                 bool is_coherent)
1604 {
1605         struct scatterlist *s;
1606         int i;
1607 
1608         for_each_sg(sg, s, nents, i) {
1609                 if (sg_dma_len(s))
1610                         __iommu_remove_mapping(dev, sg_dma_address(s),
1611                                                sg_dma_len(s));
1612                 if (!is_coherent &&
1613                     !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1614                         __dma_page_dev_to_cpu(sg_page(s), s->offset,
1615                                               s->length, dir);
1616         }
1617 }
1618 
1619 /**
1620  * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1621  * @dev: valid struct device pointer
1622  * @sg: list of buffers
1623  * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1624  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1625  *
1626  * Unmap a set of streaming mode DMA translations.  Again, CPU access
1627  * rules concerning calls here are the same as for dma_unmap_single().
1628  */
1629 void arm_coherent_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1630                 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1631 {
1632         __iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
1633 }
1634 
1635 /**
1636  * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1637  * @dev: valid struct device pointer
1638  * @sg: list of buffers
1639  * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1640  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1641  *
1642  * Unmap a set of streaming mode DMA translations.  Again, CPU access
1643  * rules concerning calls here are the same as for dma_unmap_single().
1644  */
1645 void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1646                         enum dma_data_direction dir, struct dma_attrs *attrs)
1647 {
1648         __iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
1649 }
1650 
1651 /**
1652  * arm_iommu_sync_sg_for_cpu
1653  * @dev: valid struct device pointer
1654  * @sg: list of buffers
1655  * @nents: number of buffers to map (returned from dma_map_sg)
1656  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1657  */
1658 void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1659                         int nents, enum dma_data_direction dir)
1660 {
1661         struct scatterlist *s;
1662         int i;
1663 
1664         for_each_sg(sg, s, nents, i)
1665                 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1666 
1667 }
1668 
1669 /**
1670  * arm_iommu_sync_sg_for_device
1671  * @dev: valid struct device pointer
1672  * @sg: list of buffers
1673  * @nents: number of buffers to map (returned from dma_map_sg)
1674  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1675  */
1676 void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1677                         int nents, enum dma_data_direction dir)
1678 {
1679         struct scatterlist *s;
1680         int i;
1681 
1682         for_each_sg(sg, s, nents, i)
1683                 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1684 }
1685 
1686 
1687 /**
1688  * arm_coherent_iommu_map_page
1689  * @dev: valid struct device pointer
1690  * @page: page that buffer resides in
1691  * @offset: offset into page for start of buffer
1692  * @size: size of buffer to map
1693  * @dir: DMA transfer direction
1694  *
1695  * Coherent IOMMU aware version of arm_dma_map_page()
1696  */
1697 static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
1698              unsigned long offset, size_t size, enum dma_data_direction dir,
1699              struct dma_attrs *attrs)
1700 {
1701         struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1702         dma_addr_t dma_addr;
1703         int ret, prot, len = PAGE_ALIGN(size + offset);
1704 
1705         dma_addr = __alloc_iova(mapping, len);
1706         if (dma_addr == DMA_ERROR_CODE)
1707                 return dma_addr;
1708 
1709         prot = __dma_direction_to_prot(dir);
1710 
1711         ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, prot);
1712         if (ret < 0)
1713                 goto fail;
1714 
1715         return dma_addr + offset;
1716 fail:
1717         __free_iova(mapping, dma_addr, len);
1718         return DMA_ERROR_CODE;
1719 }
1720 
1721 /**
1722  * arm_iommu_map_page
1723  * @dev: valid struct device pointer
1724  * @page: page that buffer resides in
1725  * @offset: offset into page for start of buffer
1726  * @size: size of buffer to map
1727  * @dir: DMA transfer direction
1728  *
1729  * IOMMU aware version of arm_dma_map_page()
1730  */
1731 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1732              unsigned long offset, size_t size, enum dma_data_direction dir,
1733              struct dma_attrs *attrs)
1734 {
1735         if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1736                 __dma_page_cpu_to_dev(page, offset, size, dir);
1737 
1738         return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
1739 }
1740 
1741 /**
1742  * arm_coherent_iommu_unmap_page
1743  * @dev: valid struct device pointer
1744  * @handle: DMA address of buffer
1745  * @size: size of buffer (same as passed to dma_map_page)
1746  * @dir: DMA transfer direction (same as passed to dma_map_page)
1747  *
1748  * Coherent IOMMU aware version of arm_dma_unmap_page()
1749  */
1750 static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1751                 size_t size, enum dma_data_direction dir,
1752                 struct dma_attrs *attrs)
1753 {
1754         struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1755         dma_addr_t iova = handle & PAGE_MASK;
1756         int offset = handle & ~PAGE_MASK;
1757         int len = PAGE_ALIGN(size + offset);
1758 
1759         if (!iova)
1760                 return;
1761 
1762         iommu_unmap(mapping->domain, iova, len);
1763         __free_iova(mapping, iova, len);
1764 }
1765 
1766 /**
1767  * arm_iommu_unmap_page
1768  * @dev: valid struct device pointer
1769  * @handle: DMA address of buffer
1770  * @size: size of buffer (same as passed to dma_map_page)
1771  * @dir: DMA transfer direction (same as passed to dma_map_page)
1772  *
1773  * IOMMU aware version of arm_dma_unmap_page()
1774  */
1775 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1776                 size_t size, enum dma_data_direction dir,
1777                 struct dma_attrs *attrs)
1778 {
1779         struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1780         dma_addr_t iova = handle & PAGE_MASK;
1781         struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1782         int offset = handle & ~PAGE_MASK;
1783         int len = PAGE_ALIGN(size + offset);
1784 
1785         if (!iova)
1786                 return;
1787 
1788         if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1789                 __dma_page_dev_to_cpu(page, offset, size, dir);
1790 
1791         iommu_unmap(mapping->domain, iova, len);
1792         __free_iova(mapping, iova, len);
1793 }
1794 
1795 static void arm_iommu_sync_single_for_cpu(struct device *dev,
1796                 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1797 {
1798         struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1799         dma_addr_t iova = handle & PAGE_MASK;
1800         struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1801         unsigned int offset = handle & ~PAGE_MASK;
1802 
1803         if (!iova)
1804                 return;
1805 
1806         __dma_page_dev_to_cpu(page, offset, size, dir);
1807 }
1808 
1809 static void arm_iommu_sync_single_for_device(struct device *dev,
1810                 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1811 {
1812         struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1813         dma_addr_t iova = handle & PAGE_MASK;
1814         struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1815         unsigned int offset = handle & ~PAGE_MASK;
1816 
1817         if (!iova)
1818                 return;
1819 
1820         __dma_page_cpu_to_dev(page, offset, size, dir);
1821 }
1822 
1823 struct dma_map_ops iommu_ops = {
1824         .alloc          = arm_iommu_alloc_attrs,
1825         .free           = arm_iommu_free_attrs,
1826         .mmap           = arm_iommu_mmap_attrs,
1827         .get_sgtable    = arm_iommu_get_sgtable,
1828 
1829         .map_page               = arm_iommu_map_page,
1830         .unmap_page             = arm_iommu_unmap_page,
1831         .sync_single_for_cpu    = arm_iommu_sync_single_for_cpu,
1832         .sync_single_for_device = arm_iommu_sync_single_for_device,
1833 
1834         .map_sg                 = arm_iommu_map_sg,
1835         .unmap_sg               = arm_iommu_unmap_sg,
1836         .sync_sg_for_cpu        = arm_iommu_sync_sg_for_cpu,
1837         .sync_sg_for_device     = arm_iommu_sync_sg_for_device,
1838 
1839         .set_dma_mask           = arm_dma_set_mask,
1840 };
1841 
1842 struct dma_map_ops iommu_coherent_ops = {
1843         .alloc          = arm_iommu_alloc_attrs,
1844         .free           = arm_iommu_free_attrs,
1845         .mmap           = arm_iommu_mmap_attrs,
1846         .get_sgtable    = arm_iommu_get_sgtable,
1847 
1848         .map_page       = arm_coherent_iommu_map_page,
1849         .unmap_page     = arm_coherent_iommu_unmap_page,
1850 
1851         .map_sg         = arm_coherent_iommu_map_sg,
1852         .unmap_sg       = arm_coherent_iommu_unmap_sg,
1853 
1854         .set_dma_mask   = arm_dma_set_mask,
1855 };
1856 
1857 /**
1858  * arm_iommu_create_mapping
1859  * @bus: pointer to the bus holding the client device (for IOMMU calls)
1860  * @base: start address of the valid IO address space
1861  * @size: size of the valid IO address space
1862  * @order: accuracy of the IO addresses allocations
1863  *
1864  * Creates a mapping structure which holds information about used/unused
1865  * IO address ranges, which is required to perform memory allocation and
1866  * mapping with IOMMU aware functions.
1867  *
1868  * The client device need to be attached to the mapping with
1869  * arm_iommu_attach_device function.
1870  */
1871 struct dma_iommu_mapping *
1872 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size,
1873                          int order)
1874 {
1875         unsigned int count = size >> (PAGE_SHIFT + order);
1876         unsigned int bitmap_size = BITS_TO_LONGS(count) * sizeof(long);
1877         struct dma_iommu_mapping *mapping;
1878         int err = -ENOMEM;
1879 
1880         if (!count)
1881                 return ERR_PTR(-EINVAL);
1882 
1883         mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
1884         if (!mapping)
1885                 goto err;
1886 
1887         mapping->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
1888         if (!mapping->bitmap)
1889                 goto err2;
1890 
1891         mapping->base = base;
1892         mapping->bits = BITS_PER_BYTE * bitmap_size;
1893         mapping->order = order;
1894         spin_lock_init(&mapping->lock);
1895 
1896         mapping->domain = iommu_domain_alloc(bus);
1897         if (!mapping->domain)
1898                 goto err3;
1899 
1900         kref_init(&mapping->kref);
1901         return mapping;
1902 err3:
1903         kfree(mapping->bitmap);
1904 err2:
1905         kfree(mapping);
1906 err:
1907         return ERR_PTR(err);
1908 }
1909 EXPORT_SYMBOL_GPL(arm_iommu_create_mapping);
1910 
1911 static void release_iommu_mapping(struct kref *kref)
1912 {
1913         struct dma_iommu_mapping *mapping =
1914                 container_of(kref, struct dma_iommu_mapping, kref);
1915 
1916         iommu_domain_free(mapping->domain);
1917         kfree(mapping->bitmap);
1918         kfree(mapping);
1919 }
1920 
1921 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
1922 {
1923         if (mapping)
1924                 kref_put(&mapping->kref, release_iommu_mapping);
1925 }
1926 EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
1927 
1928 /**
1929  * arm_iommu_attach_device
1930  * @dev: valid struct device pointer
1931  * @mapping: io address space mapping structure (returned from
1932  *      arm_iommu_create_mapping)
1933  *
1934  * Attaches specified io address space mapping to the provided device,
1935  * this replaces the dma operations (dma_map_ops pointer) with the
1936  * IOMMU aware version. More than one client might be attached to
1937  * the same io address space mapping.
1938  */
1939 int arm_iommu_attach_device(struct device *dev,
1940                             struct dma_iommu_mapping *mapping)
1941 {
1942         int err;
1943 
1944         err = iommu_attach_device(mapping->domain, dev);
1945         if (err)
1946                 return err;
1947 
1948         kref_get(&mapping->kref);
1949         dev->archdata.mapping = mapping;
1950         set_dma_ops(dev, &iommu_ops);
1951 
1952         pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
1953         return 0;
1954 }
1955 EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
1956 
1957 /**
1958  * arm_iommu_detach_device
1959  * @dev: valid struct device pointer
1960  *
1961  * Detaches the provided device from a previously attached map.
1962  * This voids the dma operations (dma_map_ops pointer)
1963  */
1964 void arm_iommu_detach_device(struct device *dev)
1965 {
1966         struct dma_iommu_mapping *mapping;
1967 
1968         mapping = to_dma_iommu_mapping(dev);
1969         if (!mapping) {
1970                 dev_warn(dev, "Not attached\n");
1971                 return;
1972         }
1973 
1974         iommu_detach_device(mapping->domain, dev);
1975         kref_put(&mapping->kref, release_iommu_mapping);
1976         dev->archdata.mapping = NULL;
1977         set_dma_ops(dev, NULL);
1978 
1979         pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
1980 }
1981 EXPORT_SYMBOL_GPL(arm_iommu_detach_device);
1982 
1983 #endif
1984 

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