~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

TOMOYO Linux Cross Reference
Linux/arch/arm/mm/dma-mapping.c

Version: ~ [ linux-5.16-rc3 ] ~ [ linux-5.15.5 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.82 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.162 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.218 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.256 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.291 ] ~ [ linux-4.8.17 ] ~ [ linux-4.7.10 ] ~ [ linux-4.6.7 ] ~ [ linux-4.5.7 ] ~ [ linux-4.4.293 ] ~ [ linux-4.3.6 ] ~ [ linux-4.2.8 ] ~ [ linux-4.1.52 ] ~ [ linux-4.0.9 ] ~ [ linux-3.18.140 ] ~ [ linux-3.16.85 ] ~ [ linux-3.14.79 ] ~ [ linux-3.12.74 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.5 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 /*
  2  *  linux/arch/arm/mm/dma-mapping.c
  3  *
  4  *  Copyright (C) 2000-2004 Russell King
  5  *
  6  * This program is free software; you can redistribute it and/or modify
  7  * it under the terms of the GNU General Public License version 2 as
  8  * published by the Free Software Foundation.
  9  *
 10  *  DMA uncached mapping support.
 11  */
 12 #include <linux/bootmem.h>
 13 #include <linux/module.h>
 14 #include <linux/mm.h>
 15 #include <linux/genalloc.h>
 16 #include <linux/gfp.h>
 17 #include <linux/errno.h>
 18 #include <linux/list.h>
 19 #include <linux/init.h>
 20 #include <linux/device.h>
 21 #include <linux/dma-mapping.h>
 22 #include <linux/dma-contiguous.h>
 23 #include <linux/highmem.h>
 24 #include <linux/memblock.h>
 25 #include <linux/slab.h>
 26 #include <linux/iommu.h>
 27 #include <linux/io.h>
 28 #include <linux/vmalloc.h>
 29 #include <linux/sizes.h>
 30 #include <linux/cma.h>
 31 
 32 #include <asm/memory.h>
 33 #include <asm/highmem.h>
 34 #include <asm/cacheflush.h>
 35 #include <asm/tlbflush.h>
 36 #include <asm/mach/arch.h>
 37 #include <asm/dma-iommu.h>
 38 #include <asm/mach/map.h>
 39 #include <asm/system_info.h>
 40 #include <asm/dma-contiguous.h>
 41 
 42 #include "dma.h"
 43 #include "mm.h"
 44 
 45 struct arm_dma_alloc_args {
 46         struct device *dev;
 47         size_t size;
 48         gfp_t gfp;
 49         pgprot_t prot;
 50         const void *caller;
 51         bool want_vaddr;
 52         int coherent_flag;
 53 };
 54 
 55 struct arm_dma_free_args {
 56         struct device *dev;
 57         size_t size;
 58         void *cpu_addr;
 59         struct page *page;
 60         bool want_vaddr;
 61 };
 62 
 63 #define NORMAL      0
 64 #define COHERENT    1
 65 
 66 struct arm_dma_allocator {
 67         void *(*alloc)(struct arm_dma_alloc_args *args,
 68                        struct page **ret_page);
 69         void (*free)(struct arm_dma_free_args *args);
 70 };
 71 
 72 struct arm_dma_buffer {
 73         struct list_head list;
 74         void *virt;
 75         struct arm_dma_allocator *allocator;
 76 };
 77 
 78 static LIST_HEAD(arm_dma_bufs);
 79 static DEFINE_SPINLOCK(arm_dma_bufs_lock);
 80 
 81 static struct arm_dma_buffer *arm_dma_buffer_find(void *virt)
 82 {
 83         struct arm_dma_buffer *buf, *found = NULL;
 84         unsigned long flags;
 85 
 86         spin_lock_irqsave(&arm_dma_bufs_lock, flags);
 87         list_for_each_entry(buf, &arm_dma_bufs, list) {
 88                 if (buf->virt == virt) {
 89                         list_del(&buf->list);
 90                         found = buf;
 91                         break;
 92                 }
 93         }
 94         spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
 95         return found;
 96 }
 97 
 98 /*
 99  * The DMA API is built upon the notion of "buffer ownership".  A buffer
100  * is either exclusively owned by the CPU (and therefore may be accessed
101  * by it) or exclusively owned by the DMA device.  These helper functions
102  * represent the transitions between these two ownership states.
103  *
104  * Note, however, that on later ARMs, this notion does not work due to
105  * speculative prefetches.  We model our approach on the assumption that
106  * the CPU does do speculative prefetches, which means we clean caches
107  * before transfers and delay cache invalidation until transfer completion.
108  *
109  */
110 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
111                 size_t, enum dma_data_direction);
112 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
113                 size_t, enum dma_data_direction);
114 
115 /**
116  * arm_dma_map_page - map a portion of a page for streaming DMA
117  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
118  * @page: page that buffer resides in
119  * @offset: offset into page for start of buffer
120  * @size: size of buffer to map
121  * @dir: DMA transfer direction
122  *
123  * Ensure that any data held in the cache is appropriately discarded
124  * or written back.
125  *
126  * The device owns this memory once this call has completed.  The CPU
127  * can regain ownership by calling dma_unmap_page().
128  */
129 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
130              unsigned long offset, size_t size, enum dma_data_direction dir,
131              unsigned long attrs)
132 {
133         if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
134                 __dma_page_cpu_to_dev(page, offset, size, dir);
135         return pfn_to_dma(dev, page_to_pfn(page)) + offset;
136 }
137 
138 static dma_addr_t arm_coherent_dma_map_page(struct device *dev, struct page *page,
139              unsigned long offset, size_t size, enum dma_data_direction dir,
140              unsigned long attrs)
141 {
142         return pfn_to_dma(dev, page_to_pfn(page)) + offset;
143 }
144 
145 /**
146  * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
147  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
148  * @handle: DMA address of buffer
149  * @size: size of buffer (same as passed to dma_map_page)
150  * @dir: DMA transfer direction (same as passed to dma_map_page)
151  *
152  * Unmap a page streaming mode DMA translation.  The handle and size
153  * must match what was provided in the previous dma_map_page() call.
154  * All other usages are undefined.
155  *
156  * After this call, reads by the CPU to the buffer are guaranteed to see
157  * whatever the device wrote there.
158  */
159 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
160                 size_t size, enum dma_data_direction dir, unsigned long attrs)
161 {
162         if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
163                 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
164                                       handle & ~PAGE_MASK, size, dir);
165 }
166 
167 static void arm_dma_sync_single_for_cpu(struct device *dev,
168                 dma_addr_t handle, size_t size, enum dma_data_direction dir)
169 {
170         unsigned int offset = handle & (PAGE_SIZE - 1);
171         struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
172         __dma_page_dev_to_cpu(page, offset, size, dir);
173 }
174 
175 static void arm_dma_sync_single_for_device(struct device *dev,
176                 dma_addr_t handle, size_t size, enum dma_data_direction dir)
177 {
178         unsigned int offset = handle & (PAGE_SIZE - 1);
179         struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
180         __dma_page_cpu_to_dev(page, offset, size, dir);
181 }
182 
183 static int arm_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
184 {
185         return dma_addr == ARM_MAPPING_ERROR;
186 }
187 
188 const struct dma_map_ops arm_dma_ops = {
189         .alloc                  = arm_dma_alloc,
190         .free                   = arm_dma_free,
191         .mmap                   = arm_dma_mmap,
192         .get_sgtable            = arm_dma_get_sgtable,
193         .map_page               = arm_dma_map_page,
194         .unmap_page             = arm_dma_unmap_page,
195         .map_sg                 = arm_dma_map_sg,
196         .unmap_sg               = arm_dma_unmap_sg,
197         .sync_single_for_cpu    = arm_dma_sync_single_for_cpu,
198         .sync_single_for_device = arm_dma_sync_single_for_device,
199         .sync_sg_for_cpu        = arm_dma_sync_sg_for_cpu,
200         .sync_sg_for_device     = arm_dma_sync_sg_for_device,
201         .mapping_error          = arm_dma_mapping_error,
202         .dma_supported          = arm_dma_supported,
203 };
204 EXPORT_SYMBOL(arm_dma_ops);
205 
206 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
207         dma_addr_t *handle, gfp_t gfp, unsigned long attrs);
208 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
209                                   dma_addr_t handle, unsigned long attrs);
210 static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
211                  void *cpu_addr, dma_addr_t dma_addr, size_t size,
212                  unsigned long attrs);
213 
214 const struct dma_map_ops arm_coherent_dma_ops = {
215         .alloc                  = arm_coherent_dma_alloc,
216         .free                   = arm_coherent_dma_free,
217         .mmap                   = arm_coherent_dma_mmap,
218         .get_sgtable            = arm_dma_get_sgtable,
219         .map_page               = arm_coherent_dma_map_page,
220         .map_sg                 = arm_dma_map_sg,
221         .mapping_error          = arm_dma_mapping_error,
222         .dma_supported          = arm_dma_supported,
223 };
224 EXPORT_SYMBOL(arm_coherent_dma_ops);
225 
226 static int __dma_supported(struct device *dev, u64 mask, bool warn)
227 {
228         unsigned long max_dma_pfn;
229 
230         /*
231          * If the mask allows for more memory than we can address,
232          * and we actually have that much memory, then we must
233          * indicate that DMA to this device is not supported.
234          */
235         if (sizeof(mask) != sizeof(dma_addr_t) &&
236             mask > (dma_addr_t)~0 &&
237             dma_to_pfn(dev, ~0) < max_pfn - 1) {
238                 if (warn) {
239                         dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
240                                  mask);
241                         dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
242                 }
243                 return 0;
244         }
245 
246         max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);
247 
248         /*
249          * Translate the device's DMA mask to a PFN limit.  This
250          * PFN number includes the page which we can DMA to.
251          */
252         if (dma_to_pfn(dev, mask) < max_dma_pfn) {
253                 if (warn)
254                         dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
255                                  mask,
256                                  dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
257                                  max_dma_pfn + 1);
258                 return 0;
259         }
260 
261         return 1;
262 }
263 
264 static u64 get_coherent_dma_mask(struct device *dev)
265 {
266         u64 mask = (u64)DMA_BIT_MASK(32);
267 
268         if (dev) {
269                 mask = dev->coherent_dma_mask;
270 
271                 /*
272                  * Sanity check the DMA mask - it must be non-zero, and
273                  * must be able to be satisfied by a DMA allocation.
274                  */
275                 if (mask == 0) {
276                         dev_warn(dev, "coherent DMA mask is unset\n");
277                         return 0;
278                 }
279 
280                 if (!__dma_supported(dev, mask, true))
281                         return 0;
282         }
283 
284         return mask;
285 }
286 
287 static void __dma_clear_buffer(struct page *page, size_t size, int coherent_flag)
288 {
289         /*
290          * Ensure that the allocated pages are zeroed, and that any data
291          * lurking in the kernel direct-mapped region is invalidated.
292          */
293         if (PageHighMem(page)) {
294                 phys_addr_t base = __pfn_to_phys(page_to_pfn(page));
295                 phys_addr_t end = base + size;
296                 while (size > 0) {
297                         void *ptr = kmap_atomic(page);
298                         memset(ptr, 0, PAGE_SIZE);
299                         if (coherent_flag != COHERENT)
300                                 dmac_flush_range(ptr, ptr + PAGE_SIZE);
301                         kunmap_atomic(ptr);
302                         page++;
303                         size -= PAGE_SIZE;
304                 }
305                 if (coherent_flag != COHERENT)
306                         outer_flush_range(base, end);
307         } else {
308                 void *ptr = page_address(page);
309                 memset(ptr, 0, size);
310                 if (coherent_flag != COHERENT) {
311                         dmac_flush_range(ptr, ptr + size);
312                         outer_flush_range(__pa(ptr), __pa(ptr) + size);
313                 }
314         }
315 }
316 
317 /*
318  * Allocate a DMA buffer for 'dev' of size 'size' using the
319  * specified gfp mask.  Note that 'size' must be page aligned.
320  */
321 static struct page *__dma_alloc_buffer(struct device *dev, size_t size,
322                                        gfp_t gfp, int coherent_flag)
323 {
324         unsigned long order = get_order(size);
325         struct page *page, *p, *e;
326 
327         page = alloc_pages(gfp, order);
328         if (!page)
329                 return NULL;
330 
331         /*
332          * Now split the huge page and free the excess pages
333          */
334         split_page(page, order);
335         for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
336                 __free_page(p);
337 
338         __dma_clear_buffer(page, size, coherent_flag);
339 
340         return page;
341 }
342 
343 /*
344  * Free a DMA buffer.  'size' must be page aligned.
345  */
346 static void __dma_free_buffer(struct page *page, size_t size)
347 {
348         struct page *e = page + (size >> PAGE_SHIFT);
349 
350         while (page < e) {
351                 __free_page(page);
352                 page++;
353         }
354 }
355 
356 static void *__alloc_from_contiguous(struct device *dev, size_t size,
357                                      pgprot_t prot, struct page **ret_page,
358                                      const void *caller, bool want_vaddr,
359                                      int coherent_flag, gfp_t gfp);
360 
361 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
362                                  pgprot_t prot, struct page **ret_page,
363                                  const void *caller, bool want_vaddr);
364 
365 static void *
366 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
367         const void *caller)
368 {
369         /*
370          * DMA allocation can be mapped to user space, so lets
371          * set VM_USERMAP flags too.
372          */
373         return dma_common_contiguous_remap(page, size,
374                         VM_ARM_DMA_CONSISTENT | VM_USERMAP,
375                         prot, caller);
376 }
377 
378 static void __dma_free_remap(void *cpu_addr, size_t size)
379 {
380         dma_common_free_remap(cpu_addr, size,
381                         VM_ARM_DMA_CONSISTENT | VM_USERMAP);
382 }
383 
384 #define DEFAULT_DMA_COHERENT_POOL_SIZE  SZ_256K
385 static struct gen_pool *atomic_pool __ro_after_init;
386 
387 static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
388 
389 static int __init early_coherent_pool(char *p)
390 {
391         atomic_pool_size = memparse(p, &p);
392         return 0;
393 }
394 early_param("coherent_pool", early_coherent_pool);
395 
396 /*
397  * Initialise the coherent pool for atomic allocations.
398  */
399 static int __init atomic_pool_init(void)
400 {
401         pgprot_t prot = pgprot_dmacoherent(PAGE_KERNEL);
402         gfp_t gfp = GFP_KERNEL | GFP_DMA;
403         struct page *page;
404         void *ptr;
405 
406         atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
407         if (!atomic_pool)
408                 goto out;
409         /*
410          * The atomic pool is only used for non-coherent allocations
411          * so we must pass NORMAL for coherent_flag.
412          */
413         if (dev_get_cma_area(NULL))
414                 ptr = __alloc_from_contiguous(NULL, atomic_pool_size, prot,
415                                       &page, atomic_pool_init, true, NORMAL,
416                                       GFP_KERNEL);
417         else
418                 ptr = __alloc_remap_buffer(NULL, atomic_pool_size, gfp, prot,
419                                            &page, atomic_pool_init, true);
420         if (ptr) {
421                 int ret;
422 
423                 ret = gen_pool_add_virt(atomic_pool, (unsigned long)ptr,
424                                         page_to_phys(page),
425                                         atomic_pool_size, -1);
426                 if (ret)
427                         goto destroy_genpool;
428 
429                 gen_pool_set_algo(atomic_pool,
430                                 gen_pool_first_fit_order_align,
431                                 NULL);
432                 pr_info("DMA: preallocated %zu KiB pool for atomic coherent allocations\n",
433                        atomic_pool_size / 1024);
434                 return 0;
435         }
436 
437 destroy_genpool:
438         gen_pool_destroy(atomic_pool);
439         atomic_pool = NULL;
440 out:
441         pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
442                atomic_pool_size / 1024);
443         return -ENOMEM;
444 }
445 /*
446  * CMA is activated by core_initcall, so we must be called after it.
447  */
448 postcore_initcall(atomic_pool_init);
449 
450 struct dma_contig_early_reserve {
451         phys_addr_t base;
452         unsigned long size;
453 };
454 
455 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
456 
457 static int dma_mmu_remap_num __initdata;
458 
459 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
460 {
461         dma_mmu_remap[dma_mmu_remap_num].base = base;
462         dma_mmu_remap[dma_mmu_remap_num].size = size;
463         dma_mmu_remap_num++;
464 }
465 
466 void __init dma_contiguous_remap(void)
467 {
468         int i;
469         for (i = 0; i < dma_mmu_remap_num; i++) {
470                 phys_addr_t start = dma_mmu_remap[i].base;
471                 phys_addr_t end = start + dma_mmu_remap[i].size;
472                 struct map_desc map;
473                 unsigned long addr;
474 
475                 if (end > arm_lowmem_limit)
476                         end = arm_lowmem_limit;
477                 if (start >= end)
478                         continue;
479 
480                 map.pfn = __phys_to_pfn(start);
481                 map.virtual = __phys_to_virt(start);
482                 map.length = end - start;
483                 map.type = MT_MEMORY_DMA_READY;
484 
485                 /*
486                  * Clear previous low-memory mapping to ensure that the
487                  * TLB does not see any conflicting entries, then flush
488                  * the TLB of the old entries before creating new mappings.
489                  *
490                  * This ensures that any speculatively loaded TLB entries
491                  * (even though they may be rare) can not cause any problems,
492                  * and ensures that this code is architecturally compliant.
493                  */
494                 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
495                      addr += PMD_SIZE)
496                         pmd_clear(pmd_off_k(addr));
497 
498                 flush_tlb_kernel_range(__phys_to_virt(start),
499                                        __phys_to_virt(end));
500 
501                 iotable_init(&map, 1);
502         }
503 }
504 
505 static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr,
506                             void *data)
507 {
508         struct page *page = virt_to_page(addr);
509         pgprot_t prot = *(pgprot_t *)data;
510 
511         set_pte_ext(pte, mk_pte(page, prot), 0);
512         return 0;
513 }
514 
515 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
516 {
517         unsigned long start = (unsigned long) page_address(page);
518         unsigned end = start + size;
519 
520         apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
521         flush_tlb_kernel_range(start, end);
522 }
523 
524 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
525                                  pgprot_t prot, struct page **ret_page,
526                                  const void *caller, bool want_vaddr)
527 {
528         struct page *page;
529         void *ptr = NULL;
530         /*
531          * __alloc_remap_buffer is only called when the device is
532          * non-coherent
533          */
534         page = __dma_alloc_buffer(dev, size, gfp, NORMAL);
535         if (!page)
536                 return NULL;
537         if (!want_vaddr)
538                 goto out;
539 
540         ptr = __dma_alloc_remap(page, size, gfp, prot, caller);
541         if (!ptr) {
542                 __dma_free_buffer(page, size);
543                 return NULL;
544         }
545 
546  out:
547         *ret_page = page;
548         return ptr;
549 }
550 
551 static void *__alloc_from_pool(size_t size, struct page **ret_page)
552 {
553         unsigned long val;
554         void *ptr = NULL;
555 
556         if (!atomic_pool) {
557                 WARN(1, "coherent pool not initialised!\n");
558                 return NULL;
559         }
560 
561         val = gen_pool_alloc(atomic_pool, size);
562         if (val) {
563                 phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
564 
565                 *ret_page = phys_to_page(phys);
566                 ptr = (void *)val;
567         }
568 
569         return ptr;
570 }
571 
572 static bool __in_atomic_pool(void *start, size_t size)
573 {
574         return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
575 }
576 
577 static int __free_from_pool(void *start, size_t size)
578 {
579         if (!__in_atomic_pool(start, size))
580                 return 0;
581 
582         gen_pool_free(atomic_pool, (unsigned long)start, size);
583 
584         return 1;
585 }
586 
587 static void *__alloc_from_contiguous(struct device *dev, size_t size,
588                                      pgprot_t prot, struct page **ret_page,
589                                      const void *caller, bool want_vaddr,
590                                      int coherent_flag, gfp_t gfp)
591 {
592         unsigned long order = get_order(size);
593         size_t count = size >> PAGE_SHIFT;
594         struct page *page;
595         void *ptr = NULL;
596 
597         page = dma_alloc_from_contiguous(dev, count, order, gfp);
598         if (!page)
599                 return NULL;
600 
601         __dma_clear_buffer(page, size, coherent_flag);
602 
603         if (!want_vaddr)
604                 goto out;
605 
606         if (PageHighMem(page)) {
607                 ptr = __dma_alloc_remap(page, size, GFP_KERNEL, prot, caller);
608                 if (!ptr) {
609                         dma_release_from_contiguous(dev, page, count);
610                         return NULL;
611                 }
612         } else {
613                 __dma_remap(page, size, prot);
614                 ptr = page_address(page);
615         }
616 
617  out:
618         *ret_page = page;
619         return ptr;
620 }
621 
622 static void __free_from_contiguous(struct device *dev, struct page *page,
623                                    void *cpu_addr, size_t size, bool want_vaddr)
624 {
625         if (want_vaddr) {
626                 if (PageHighMem(page))
627                         __dma_free_remap(cpu_addr, size);
628                 else
629                         __dma_remap(page, size, PAGE_KERNEL);
630         }
631         dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
632 }
633 
634 static inline pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot)
635 {
636         prot = (attrs & DMA_ATTR_WRITE_COMBINE) ?
637                         pgprot_writecombine(prot) :
638                         pgprot_dmacoherent(prot);
639         return prot;
640 }
641 
642 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
643                                    struct page **ret_page)
644 {
645         struct page *page;
646         /* __alloc_simple_buffer is only called when the device is coherent */
647         page = __dma_alloc_buffer(dev, size, gfp, COHERENT);
648         if (!page)
649                 return NULL;
650 
651         *ret_page = page;
652         return page_address(page);
653 }
654 
655 static void *simple_allocator_alloc(struct arm_dma_alloc_args *args,
656                                     struct page **ret_page)
657 {
658         return __alloc_simple_buffer(args->dev, args->size, args->gfp,
659                                      ret_page);
660 }
661 
662 static void simple_allocator_free(struct arm_dma_free_args *args)
663 {
664         __dma_free_buffer(args->page, args->size);
665 }
666 
667 static struct arm_dma_allocator simple_allocator = {
668         .alloc = simple_allocator_alloc,
669         .free = simple_allocator_free,
670 };
671 
672 static void *cma_allocator_alloc(struct arm_dma_alloc_args *args,
673                                  struct page **ret_page)
674 {
675         return __alloc_from_contiguous(args->dev, args->size, args->prot,
676                                        ret_page, args->caller,
677                                        args->want_vaddr, args->coherent_flag,
678                                        args->gfp);
679 }
680 
681 static void cma_allocator_free(struct arm_dma_free_args *args)
682 {
683         __free_from_contiguous(args->dev, args->page, args->cpu_addr,
684                                args->size, args->want_vaddr);
685 }
686 
687 static struct arm_dma_allocator cma_allocator = {
688         .alloc = cma_allocator_alloc,
689         .free = cma_allocator_free,
690 };
691 
692 static void *pool_allocator_alloc(struct arm_dma_alloc_args *args,
693                                   struct page **ret_page)
694 {
695         return __alloc_from_pool(args->size, ret_page);
696 }
697 
698 static void pool_allocator_free(struct arm_dma_free_args *args)
699 {
700         __free_from_pool(args->cpu_addr, args->size);
701 }
702 
703 static struct arm_dma_allocator pool_allocator = {
704         .alloc = pool_allocator_alloc,
705         .free = pool_allocator_free,
706 };
707 
708 static void *remap_allocator_alloc(struct arm_dma_alloc_args *args,
709                                    struct page **ret_page)
710 {
711         return __alloc_remap_buffer(args->dev, args->size, args->gfp,
712                                     args->prot, ret_page, args->caller,
713                                     args->want_vaddr);
714 }
715 
716 static void remap_allocator_free(struct arm_dma_free_args *args)
717 {
718         if (args->want_vaddr)
719                 __dma_free_remap(args->cpu_addr, args->size);
720 
721         __dma_free_buffer(args->page, args->size);
722 }
723 
724 static struct arm_dma_allocator remap_allocator = {
725         .alloc = remap_allocator_alloc,
726         .free = remap_allocator_free,
727 };
728 
729 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
730                          gfp_t gfp, pgprot_t prot, bool is_coherent,
731                          unsigned long attrs, const void *caller)
732 {
733         u64 mask = get_coherent_dma_mask(dev);
734         struct page *page = NULL;
735         void *addr;
736         bool allowblock, cma;
737         struct arm_dma_buffer *buf;
738         struct arm_dma_alloc_args args = {
739                 .dev = dev,
740                 .size = PAGE_ALIGN(size),
741                 .gfp = gfp,
742                 .prot = prot,
743                 .caller = caller,
744                 .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
745                 .coherent_flag = is_coherent ? COHERENT : NORMAL,
746         };
747 
748 #ifdef CONFIG_DMA_API_DEBUG
749         u64 limit = (mask + 1) & ~mask;
750         if (limit && size >= limit) {
751                 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
752                         size, mask);
753                 return NULL;
754         }
755 #endif
756 
757         if (!mask)
758                 return NULL;
759 
760         buf = kzalloc(sizeof(*buf),
761                       gfp & ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM));
762         if (!buf)
763                 return NULL;
764 
765         if (mask < 0xffffffffULL)
766                 gfp |= GFP_DMA;
767 
768         /*
769          * Following is a work-around (a.k.a. hack) to prevent pages
770          * with __GFP_COMP being passed to split_page() which cannot
771          * handle them.  The real problem is that this flag probably
772          * should be 0 on ARM as it is not supported on this
773          * platform; see CONFIG_HUGETLBFS.
774          */
775         gfp &= ~(__GFP_COMP);
776         args.gfp = gfp;
777 
778         *handle = ARM_MAPPING_ERROR;
779         allowblock = gfpflags_allow_blocking(gfp);
780         cma = allowblock ? dev_get_cma_area(dev) : false;
781 
782         if (cma)
783                 buf->allocator = &cma_allocator;
784         else if (is_coherent)
785                 buf->allocator = &simple_allocator;
786         else if (allowblock)
787                 buf->allocator = &remap_allocator;
788         else
789                 buf->allocator = &pool_allocator;
790 
791         addr = buf->allocator->alloc(&args, &page);
792 
793         if (page) {
794                 unsigned long flags;
795 
796                 *handle = pfn_to_dma(dev, page_to_pfn(page));
797                 buf->virt = args.want_vaddr ? addr : page;
798 
799                 spin_lock_irqsave(&arm_dma_bufs_lock, flags);
800                 list_add(&buf->list, &arm_dma_bufs);
801                 spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
802         } else {
803                 kfree(buf);
804         }
805 
806         return args.want_vaddr ? addr : page;
807 }
808 
809 /*
810  * Allocate DMA-coherent memory space and return both the kernel remapped
811  * virtual and bus address for that space.
812  */
813 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
814                     gfp_t gfp, unsigned long attrs)
815 {
816         pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
817 
818         return __dma_alloc(dev, size, handle, gfp, prot, false,
819                            attrs, __builtin_return_address(0));
820 }
821 
822 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
823         dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
824 {
825         return __dma_alloc(dev, size, handle, gfp, PAGE_KERNEL, true,
826                            attrs, __builtin_return_address(0));
827 }
828 
829 static int __arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
830                  void *cpu_addr, dma_addr_t dma_addr, size_t size,
831                  unsigned long attrs)
832 {
833         int ret;
834         unsigned long nr_vma_pages = vma_pages(vma);
835         unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
836         unsigned long pfn = dma_to_pfn(dev, dma_addr);
837         unsigned long off = vma->vm_pgoff;
838 
839         if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret))
840                 return ret;
841 
842         if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
843                 ret = remap_pfn_range(vma, vma->vm_start,
844                                       pfn + off,
845                                       vma->vm_end - vma->vm_start,
846                                       vma->vm_page_prot);
847         }
848 
849         return ret;
850 }
851 
852 /*
853  * Create userspace mapping for the DMA-coherent memory.
854  */
855 static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
856                  void *cpu_addr, dma_addr_t dma_addr, size_t size,
857                  unsigned long attrs)
858 {
859         return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
860 }
861 
862 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
863                  void *cpu_addr, dma_addr_t dma_addr, size_t size,
864                  unsigned long attrs)
865 {
866         vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
867         return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
868 }
869 
870 /*
871  * Free a buffer as defined by the above mapping.
872  */
873 static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
874                            dma_addr_t handle, unsigned long attrs,
875                            bool is_coherent)
876 {
877         struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
878         struct arm_dma_buffer *buf;
879         struct arm_dma_free_args args = {
880                 .dev = dev,
881                 .size = PAGE_ALIGN(size),
882                 .cpu_addr = cpu_addr,
883                 .page = page,
884                 .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
885         };
886 
887         buf = arm_dma_buffer_find(cpu_addr);
888         if (WARN(!buf, "Freeing invalid buffer %p\n", cpu_addr))
889                 return;
890 
891         buf->allocator->free(&args);
892         kfree(buf);
893 }
894 
895 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
896                   dma_addr_t handle, unsigned long attrs)
897 {
898         __arm_dma_free(dev, size, cpu_addr, handle, attrs, false);
899 }
900 
901 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
902                                   dma_addr_t handle, unsigned long attrs)
903 {
904         __arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
905 }
906 
907 /*
908  * The whole dma_get_sgtable() idea is fundamentally unsafe - it seems
909  * that the intention is to allow exporting memory allocated via the
910  * coherent DMA APIs through the dma_buf API, which only accepts a
911  * scattertable.  This presents a couple of problems:
912  * 1. Not all memory allocated via the coherent DMA APIs is backed by
913  *    a struct page
914  * 2. Passing coherent DMA memory into the streaming APIs is not allowed
915  *    as we will try to flush the memory through a different alias to that
916  *    actually being used (and the flushes are redundant.)
917  */
918 int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
919                  void *cpu_addr, dma_addr_t handle, size_t size,
920                  unsigned long attrs)
921 {
922         unsigned long pfn = dma_to_pfn(dev, handle);
923         struct page *page;
924         int ret;
925 
926         /* If the PFN is not valid, we do not have a struct page */
927         if (!pfn_valid(pfn))
928                 return -ENXIO;
929 
930         page = pfn_to_page(pfn);
931 
932         ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
933         if (unlikely(ret))
934                 return ret;
935 
936         sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
937         return 0;
938 }
939 
940 static void dma_cache_maint_page(struct page *page, unsigned long offset,
941         size_t size, enum dma_data_direction dir,
942         void (*op)(const void *, size_t, int))
943 {
944         unsigned long pfn;
945         size_t left = size;
946 
947         pfn = page_to_pfn(page) + offset / PAGE_SIZE;
948         offset %= PAGE_SIZE;
949 
950         /*
951          * A single sg entry may refer to multiple physically contiguous
952          * pages.  But we still need to process highmem pages individually.
953          * If highmem is not configured then the bulk of this loop gets
954          * optimized out.
955          */
956         do {
957                 size_t len = left;
958                 void *vaddr;
959 
960                 page = pfn_to_page(pfn);
961 
962                 if (PageHighMem(page)) {
963                         if (len + offset > PAGE_SIZE)
964                                 len = PAGE_SIZE - offset;
965 
966                         if (cache_is_vipt_nonaliasing()) {
967                                 vaddr = kmap_atomic(page);
968                                 op(vaddr + offset, len, dir);
969                                 kunmap_atomic(vaddr);
970                         } else {
971                                 vaddr = kmap_high_get(page);
972                                 if (vaddr) {
973                                         op(vaddr + offset, len, dir);
974                                         kunmap_high(page);
975                                 }
976                         }
977                 } else {
978                         vaddr = page_address(page) + offset;
979                         op(vaddr, len, dir);
980                 }
981                 offset = 0;
982                 pfn++;
983                 left -= len;
984         } while (left);
985 }
986 
987 /*
988  * Make an area consistent for devices.
989  * Note: Drivers should NOT use this function directly, as it will break
990  * platforms with CONFIG_DMABOUNCE.
991  * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
992  */
993 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
994         size_t size, enum dma_data_direction dir)
995 {
996         phys_addr_t paddr;
997 
998         dma_cache_maint_page(page, off, size, dir, dmac_map_area);
999 
1000         paddr = page_to_phys(page) + off;
1001         if (dir == DMA_FROM_DEVICE) {
1002                 outer_inv_range(paddr, paddr + size);
1003         } else {
1004                 outer_clean_range(paddr, paddr + size);
1005         }
1006         /* FIXME: non-speculating: flush on bidirectional mappings? */
1007 }
1008 
1009 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
1010         size_t size, enum dma_data_direction dir)
1011 {
1012         phys_addr_t paddr = page_to_phys(page) + off;
1013 
1014         /* FIXME: non-speculating: not required */
1015         /* in any case, don't bother invalidating if DMA to device */
1016         if (dir != DMA_TO_DEVICE) {
1017                 outer_inv_range(paddr, paddr + size);
1018 
1019                 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
1020         }
1021 
1022         /*
1023          * Mark the D-cache clean for these pages to avoid extra flushing.
1024          */
1025         if (dir != DMA_TO_DEVICE && size >= PAGE_SIZE) {
1026                 unsigned long pfn;
1027                 size_t left = size;
1028 
1029                 pfn = page_to_pfn(page) + off / PAGE_SIZE;
1030                 off %= PAGE_SIZE;
1031                 if (off) {
1032                         pfn++;
1033                         left -= PAGE_SIZE - off;
1034                 }
1035                 while (left >= PAGE_SIZE) {
1036                         page = pfn_to_page(pfn++);
1037                         set_bit(PG_dcache_clean, &page->flags);
1038                         left -= PAGE_SIZE;
1039                 }
1040         }
1041 }
1042 
1043 /**
1044  * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
1045  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1046  * @sg: list of buffers
1047  * @nents: number of buffers to map
1048  * @dir: DMA transfer direction
1049  *
1050  * Map a set of buffers described by scatterlist in streaming mode for DMA.
1051  * This is the scatter-gather version of the dma_map_single interface.
1052  * Here the scatter gather list elements are each tagged with the
1053  * appropriate dma address and length.  They are obtained via
1054  * sg_dma_{address,length}.
1055  *
1056  * Device ownership issues as mentioned for dma_map_single are the same
1057  * here.
1058  */
1059 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1060                 enum dma_data_direction dir, unsigned long attrs)
1061 {
1062         const struct dma_map_ops *ops = get_dma_ops(dev);
1063         struct scatterlist *s;
1064         int i, j;
1065 
1066         for_each_sg(sg, s, nents, i) {
1067 #ifdef CONFIG_NEED_SG_DMA_LENGTH
1068                 s->dma_length = s->length;
1069 #endif
1070                 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
1071                                                 s->length, dir, attrs);
1072                 if (dma_mapping_error(dev, s->dma_address))
1073                         goto bad_mapping;
1074         }
1075         return nents;
1076 
1077  bad_mapping:
1078         for_each_sg(sg, s, i, j)
1079                 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1080         return 0;
1081 }
1082 
1083 /**
1084  * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1085  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1086  * @sg: list of buffers
1087  * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1088  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1089  *
1090  * Unmap a set of streaming mode DMA translations.  Again, CPU access
1091  * rules concerning calls here are the same as for dma_unmap_single().
1092  */
1093 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1094                 enum dma_data_direction dir, unsigned long attrs)
1095 {
1096         const struct dma_map_ops *ops = get_dma_ops(dev);
1097         struct scatterlist *s;
1098 
1099         int i;
1100 
1101         for_each_sg(sg, s, nents, i)
1102                 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1103 }
1104 
1105 /**
1106  * arm_dma_sync_sg_for_cpu
1107  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1108  * @sg: list of buffers
1109  * @nents: number of buffers to map (returned from dma_map_sg)
1110  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1111  */
1112 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1113                         int nents, enum dma_data_direction dir)
1114 {
1115         const struct dma_map_ops *ops = get_dma_ops(dev);
1116         struct scatterlist *s;
1117         int i;
1118 
1119         for_each_sg(sg, s, nents, i)
1120                 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
1121                                          dir);
1122 }
1123 
1124 /**
1125  * arm_dma_sync_sg_for_device
1126  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1127  * @sg: list of buffers
1128  * @nents: number of buffers to map (returned from dma_map_sg)
1129  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1130  */
1131 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1132                         int nents, enum dma_data_direction dir)
1133 {
1134         const struct dma_map_ops *ops = get_dma_ops(dev);
1135         struct scatterlist *s;
1136         int i;
1137 
1138         for_each_sg(sg, s, nents, i)
1139                 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
1140                                             dir);
1141 }
1142 
1143 /*
1144  * Return whether the given device DMA address mask can be supported
1145  * properly.  For example, if your device can only drive the low 24-bits
1146  * during bus mastering, then you would pass 0x00ffffff as the mask
1147  * to this function.
1148  */
1149 int arm_dma_supported(struct device *dev, u64 mask)
1150 {
1151         return __dma_supported(dev, mask, false);
1152 }
1153 
1154 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1155 
1156 static int __dma_info_to_prot(enum dma_data_direction dir, unsigned long attrs)
1157 {
1158         int prot = 0;
1159 
1160         if (attrs & DMA_ATTR_PRIVILEGED)
1161                 prot |= IOMMU_PRIV;
1162 
1163         switch (dir) {
1164         case DMA_BIDIRECTIONAL:
1165                 return prot | IOMMU_READ | IOMMU_WRITE;
1166         case DMA_TO_DEVICE:
1167                 return prot | IOMMU_READ;
1168         case DMA_FROM_DEVICE:
1169                 return prot | IOMMU_WRITE;
1170         default:
1171                 return prot;
1172         }
1173 }
1174 
1175 /* IOMMU */
1176 
1177 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping);
1178 
1179 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
1180                                       size_t size)
1181 {
1182         unsigned int order = get_order(size);
1183         unsigned int align = 0;
1184         unsigned int count, start;
1185         size_t mapping_size = mapping->bits << PAGE_SHIFT;
1186         unsigned long flags;
1187         dma_addr_t iova;
1188         int i;
1189 
1190         if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
1191                 order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;
1192 
1193         count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1194         align = (1 << order) - 1;
1195 
1196         spin_lock_irqsave(&mapping->lock, flags);
1197         for (i = 0; i < mapping->nr_bitmaps; i++) {
1198                 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1199                                 mapping->bits, 0, count, align);
1200 
1201                 if (start > mapping->bits)
1202                         continue;
1203 
1204                 bitmap_set(mapping->bitmaps[i], start, count);
1205                 break;
1206         }
1207 
1208         /*
1209          * No unused range found. Try to extend the existing mapping
1210          * and perform a second attempt to reserve an IO virtual
1211          * address range of size bytes.
1212          */
1213         if (i == mapping->nr_bitmaps) {
1214                 if (extend_iommu_mapping(mapping)) {
1215                         spin_unlock_irqrestore(&mapping->lock, flags);
1216                         return ARM_MAPPING_ERROR;
1217                 }
1218 
1219                 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1220                                 mapping->bits, 0, count, align);
1221 
1222                 if (start > mapping->bits) {
1223                         spin_unlock_irqrestore(&mapping->lock, flags);
1224                         return ARM_MAPPING_ERROR;
1225                 }
1226 
1227                 bitmap_set(mapping->bitmaps[i], start, count);
1228         }
1229         spin_unlock_irqrestore(&mapping->lock, flags);
1230 
1231         iova = mapping->base + (mapping_size * i);
1232         iova += start << PAGE_SHIFT;
1233 
1234         return iova;
1235 }
1236 
1237 static inline void __free_iova(struct dma_iommu_mapping *mapping,
1238                                dma_addr_t addr, size_t size)
1239 {
1240         unsigned int start, count;
1241         size_t mapping_size = mapping->bits << PAGE_SHIFT;
1242         unsigned long flags;
1243         dma_addr_t bitmap_base;
1244         u32 bitmap_index;
1245 
1246         if (!size)
1247                 return;
1248 
1249         bitmap_index = (u32) (addr - mapping->base) / (u32) mapping_size;
1250         BUG_ON(addr < mapping->base || bitmap_index > mapping->extensions);
1251 
1252         bitmap_base = mapping->base + mapping_size * bitmap_index;
1253 
1254         start = (addr - bitmap_base) >> PAGE_SHIFT;
1255 
1256         if (addr + size > bitmap_base + mapping_size) {
1257                 /*
1258                  * The address range to be freed reaches into the iova
1259                  * range of the next bitmap. This should not happen as
1260                  * we don't allow this in __alloc_iova (at the
1261                  * moment).
1262                  */
1263                 BUG();
1264         } else
1265                 count = size >> PAGE_SHIFT;
1266 
1267         spin_lock_irqsave(&mapping->lock, flags);
1268         bitmap_clear(mapping->bitmaps[bitmap_index], start, count);
1269         spin_unlock_irqrestore(&mapping->lock, flags);
1270 }
1271 
1272 /* We'll try 2M, 1M, 64K, and finally 4K; array must end with 0! */
1273 static const int iommu_order_array[] = { 9, 8, 4, 0 };
1274 
1275 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
1276                                           gfp_t gfp, unsigned long attrs,
1277                                           int coherent_flag)
1278 {
1279         struct page **pages;
1280         int count = size >> PAGE_SHIFT;
1281         int array_size = count * sizeof(struct page *);
1282         int i = 0;
1283         int order_idx = 0;
1284 
1285         if (array_size <= PAGE_SIZE)
1286                 pages = kzalloc(array_size, GFP_KERNEL);
1287         else
1288                 pages = vzalloc(array_size);
1289         if (!pages)
1290                 return NULL;
1291 
1292         if (attrs & DMA_ATTR_FORCE_CONTIGUOUS)
1293         {
1294                 unsigned long order = get_order(size);
1295                 struct page *page;
1296 
1297                 page = dma_alloc_from_contiguous(dev, count, order, gfp);
1298                 if (!page)
1299                         goto error;
1300 
1301                 __dma_clear_buffer(page, size, coherent_flag);
1302 
1303                 for (i = 0; i < count; i++)
1304                         pages[i] = page + i;
1305 
1306                 return pages;
1307         }
1308 
1309         /* Go straight to 4K chunks if caller says it's OK. */
1310         if (attrs & DMA_ATTR_ALLOC_SINGLE_PAGES)
1311                 order_idx = ARRAY_SIZE(iommu_order_array) - 1;
1312 
1313         /*
1314          * IOMMU can map any pages, so himem can also be used here
1315          */
1316         gfp |= __GFP_NOWARN | __GFP_HIGHMEM;
1317 
1318         while (count) {
1319                 int j, order;
1320 
1321                 order = iommu_order_array[order_idx];
1322 
1323                 /* Drop down when we get small */
1324                 if (__fls(count) < order) {
1325                         order_idx++;
1326                         continue;
1327                 }
1328 
1329                 if (order) {
1330                         /* See if it's easy to allocate a high-order chunk */
1331                         pages[i] = alloc_pages(gfp | __GFP_NORETRY, order);
1332 
1333                         /* Go down a notch at first sign of pressure */
1334                         if (!pages[i]) {
1335                                 order_idx++;
1336                                 continue;
1337                         }
1338                 } else {
1339                         pages[i] = alloc_pages(gfp, 0);
1340                         if (!pages[i])
1341                                 goto error;
1342                 }
1343 
1344                 if (order) {
1345                         split_page(pages[i], order);
1346                         j = 1 << order;
1347                         while (--j)
1348                                 pages[i + j] = pages[i] + j;
1349                 }
1350 
1351                 __dma_clear_buffer(pages[i], PAGE_SIZE << order, coherent_flag);
1352                 i += 1 << order;
1353                 count -= 1 << order;
1354         }
1355 
1356         return pages;
1357 error:
1358         while (i--)
1359                 if (pages[i])
1360                         __free_pages(pages[i], 0);
1361         kvfree(pages);
1362         return NULL;
1363 }
1364 
1365 static int __iommu_free_buffer(struct device *dev, struct page **pages,
1366                                size_t size, unsigned long attrs)
1367 {
1368         int count = size >> PAGE_SHIFT;
1369         int i;
1370 
1371         if (attrs & DMA_ATTR_FORCE_CONTIGUOUS) {
1372                 dma_release_from_contiguous(dev, pages[0], count);
1373         } else {
1374                 for (i = 0; i < count; i++)
1375                         if (pages[i])
1376                                 __free_pages(pages[i], 0);
1377         }
1378 
1379         kvfree(pages);
1380         return 0;
1381 }
1382 
1383 /*
1384  * Create a CPU mapping for a specified pages
1385  */
1386 static void *
1387 __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
1388                     const void *caller)
1389 {
1390         return dma_common_pages_remap(pages, size,
1391                         VM_ARM_DMA_CONSISTENT | VM_USERMAP, prot, caller);
1392 }
1393 
1394 /*
1395  * Create a mapping in device IO address space for specified pages
1396  */
1397 static dma_addr_t
1398 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size,
1399                        unsigned long attrs)
1400 {
1401         struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1402         unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1403         dma_addr_t dma_addr, iova;
1404         int i;
1405 
1406         dma_addr = __alloc_iova(mapping, size);
1407         if (dma_addr == ARM_MAPPING_ERROR)
1408                 return dma_addr;
1409 
1410         iova = dma_addr;
1411         for (i = 0; i < count; ) {
1412                 int ret;
1413 
1414                 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1415                 phys_addr_t phys = page_to_phys(pages[i]);
1416                 unsigned int len, j;
1417 
1418                 for (j = i + 1; j < count; j++, next_pfn++)
1419                         if (page_to_pfn(pages[j]) != next_pfn)
1420                                 break;
1421 
1422                 len = (j - i) << PAGE_SHIFT;
1423                 ret = iommu_map(mapping->domain, iova, phys, len,
1424                                 __dma_info_to_prot(DMA_BIDIRECTIONAL, attrs));
1425                 if (ret < 0)
1426                         goto fail;
1427                 iova += len;
1428                 i = j;
1429         }
1430         return dma_addr;
1431 fail:
1432         iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1433         __free_iova(mapping, dma_addr, size);
1434         return ARM_MAPPING_ERROR;
1435 }
1436 
1437 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1438 {
1439         struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1440 
1441         /*
1442          * add optional in-page offset from iova to size and align
1443          * result to page size
1444          */
1445         size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1446         iova &= PAGE_MASK;
1447 
1448         iommu_unmap(mapping->domain, iova, size);
1449         __free_iova(mapping, iova, size);
1450         return 0;
1451 }
1452 
1453 static struct page **__atomic_get_pages(void *addr)
1454 {
1455         struct page *page;
1456         phys_addr_t phys;
1457 
1458         phys = gen_pool_virt_to_phys(atomic_pool, (unsigned long)addr);
1459         page = phys_to_page(phys);
1460 
1461         return (struct page **)page;
1462 }
1463 
1464 static struct page **__iommu_get_pages(void *cpu_addr, unsigned long attrs)
1465 {
1466         struct vm_struct *area;
1467 
1468         if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
1469                 return __atomic_get_pages(cpu_addr);
1470 
1471         if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1472                 return cpu_addr;
1473 
1474         area = find_vm_area(cpu_addr);
1475         if (area && (area->flags & VM_ARM_DMA_CONSISTENT))
1476                 return area->pages;
1477         return NULL;
1478 }
1479 
1480 static void *__iommu_alloc_simple(struct device *dev, size_t size, gfp_t gfp,
1481                                   dma_addr_t *handle, int coherent_flag,
1482                                   unsigned long attrs)
1483 {
1484         struct page *page;
1485         void *addr;
1486 
1487         if (coherent_flag  == COHERENT)
1488                 addr = __alloc_simple_buffer(dev, size, gfp, &page);
1489         else
1490                 addr = __alloc_from_pool(size, &page);
1491         if (!addr)
1492                 return NULL;
1493 
1494         *handle = __iommu_create_mapping(dev, &page, size, attrs);
1495         if (*handle == ARM_MAPPING_ERROR)
1496                 goto err_mapping;
1497 
1498         return addr;
1499 
1500 err_mapping:
1501         __free_from_pool(addr, size);
1502         return NULL;
1503 }
1504 
1505 static void __iommu_free_atomic(struct device *dev, void *cpu_addr,
1506                         dma_addr_t handle, size_t size, int coherent_flag)
1507 {
1508         __iommu_remove_mapping(dev, handle, size);
1509         if (coherent_flag == COHERENT)
1510                 __dma_free_buffer(virt_to_page(cpu_addr), size);
1511         else
1512                 __free_from_pool(cpu_addr, size);
1513 }
1514 
1515 static void *__arm_iommu_alloc_attrs(struct device *dev, size_t size,
1516             dma_addr_t *handle, gfp_t gfp, unsigned long attrs,
1517             int coherent_flag)
1518 {
1519         pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
1520         struct page **pages;
1521         void *addr = NULL;
1522 
1523         *handle = ARM_MAPPING_ERROR;
1524         size = PAGE_ALIGN(size);
1525 
1526         if (coherent_flag  == COHERENT || !gfpflags_allow_blocking(gfp))
1527                 return __iommu_alloc_simple(dev, size, gfp, handle,
1528                                             coherent_flag, attrs);
1529 
1530         /*
1531          * Following is a work-around (a.k.a. hack) to prevent pages
1532          * with __GFP_COMP being passed to split_page() which cannot
1533          * handle them.  The real problem is that this flag probably
1534          * should be 0 on ARM as it is not supported on this
1535          * platform; see CONFIG_HUGETLBFS.
1536          */
1537         gfp &= ~(__GFP_COMP);
1538 
1539         pages = __iommu_alloc_buffer(dev, size, gfp, attrs, coherent_flag);
1540         if (!pages)
1541                 return NULL;
1542 
1543         *handle = __iommu_create_mapping(dev, pages, size, attrs);
1544         if (*handle == ARM_MAPPING_ERROR)
1545                 goto err_buffer;
1546 
1547         if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1548                 return pages;
1549 
1550         addr = __iommu_alloc_remap(pages, size, gfp, prot,
1551                                    __builtin_return_address(0));
1552         if (!addr)
1553                 goto err_mapping;
1554 
1555         return addr;
1556 
1557 err_mapping:
1558         __iommu_remove_mapping(dev, *handle, size);
1559 err_buffer:
1560         __iommu_free_buffer(dev, pages, size, attrs);
1561         return NULL;
1562 }
1563 
1564 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1565             dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
1566 {
1567         return __arm_iommu_alloc_attrs(dev, size, handle, gfp, attrs, NORMAL);
1568 }
1569 
1570 static void *arm_coherent_iommu_alloc_attrs(struct device *dev, size_t size,
1571                     dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
1572 {
1573         return __arm_iommu_alloc_attrs(dev, size, handle, gfp, attrs, COHERENT);
1574 }
1575 
1576 static int __arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1577                     void *cpu_addr, dma_addr_t dma_addr, size_t size,
1578                     unsigned long attrs)
1579 {
1580         unsigned long uaddr = vma->vm_start;
1581         unsigned long usize = vma->vm_end - vma->vm_start;
1582         struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1583         unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1584         unsigned long off = vma->vm_pgoff;
1585 
1586         if (!pages)
1587                 return -ENXIO;
1588 
1589         if (off >= nr_pages || (usize >> PAGE_SHIFT) > nr_pages - off)
1590                 return -ENXIO;
1591 
1592         pages += off;
1593 
1594         do {
1595                 int ret = vm_insert_page(vma, uaddr, *pages++);
1596                 if (ret) {
1597                         pr_err("Remapping memory failed: %d\n", ret);
1598                         return ret;
1599                 }
1600                 uaddr += PAGE_SIZE;
1601                 usize -= PAGE_SIZE;
1602         } while (usize > 0);
1603 
1604         return 0;
1605 }
1606 static int arm_iommu_mmap_attrs(struct device *dev,
1607                 struct vm_area_struct *vma, void *cpu_addr,
1608                 dma_addr_t dma_addr, size_t size, unsigned long attrs)
1609 {
1610         vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1611 
1612         return __arm_iommu_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, attrs);
1613 }
1614 
1615 static int arm_coherent_iommu_mmap_attrs(struct device *dev,
1616                 struct vm_area_struct *vma, void *cpu_addr,
1617                 dma_addr_t dma_addr, size_t size, unsigned long attrs)
1618 {
1619         return __arm_iommu_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, attrs);
1620 }
1621 
1622 /*
1623  * free a page as defined by the above mapping.
1624  * Must not be called with IRQs disabled.
1625  */
1626 void __arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1627         dma_addr_t handle, unsigned long attrs, int coherent_flag)
1628 {
1629         struct page **pages;
1630         size = PAGE_ALIGN(size);
1631 
1632         if (coherent_flag == COHERENT || __in_atomic_pool(cpu_addr, size)) {
1633                 __iommu_free_atomic(dev, cpu_addr, handle, size, coherent_flag);
1634                 return;
1635         }
1636 
1637         pages = __iommu_get_pages(cpu_addr, attrs);
1638         if (!pages) {
1639                 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1640                 return;
1641         }
1642 
1643         if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0) {
1644                 dma_common_free_remap(cpu_addr, size,
1645                         VM_ARM_DMA_CONSISTENT | VM_USERMAP);
1646         }
1647 
1648         __iommu_remove_mapping(dev, handle, size);
1649         __iommu_free_buffer(dev, pages, size, attrs);
1650 }
1651 
1652 void arm_iommu_free_attrs(struct device *dev, size_t size,
1653                     void *cpu_addr, dma_addr_t handle, unsigned long attrs)
1654 {
1655         __arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs, NORMAL);
1656 }
1657 
1658 void arm_coherent_iommu_free_attrs(struct device *dev, size_t size,
1659                     void *cpu_addr, dma_addr_t handle, unsigned long attrs)
1660 {
1661         __arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs, COHERENT);
1662 }
1663 
1664 static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
1665                                  void *cpu_addr, dma_addr_t dma_addr,
1666                                  size_t size, unsigned long attrs)
1667 {
1668         unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1669         struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1670 
1671         if (!pages)
1672                 return -ENXIO;
1673 
1674         return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
1675                                          GFP_KERNEL);
1676 }
1677 
1678 /*
1679  * Map a part of the scatter-gather list into contiguous io address space
1680  */
1681 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1682                           size_t size, dma_addr_t *handle,
1683                           enum dma_data_direction dir, unsigned long attrs,
1684                           bool is_coherent)
1685 {
1686         struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1687         dma_addr_t iova, iova_base;
1688         int ret = 0;
1689         unsigned int count;
1690         struct scatterlist *s;
1691         int prot;
1692 
1693         size = PAGE_ALIGN(size);
1694         *handle = ARM_MAPPING_ERROR;
1695 
1696         iova_base = iova = __alloc_iova(mapping, size);
1697         if (iova == ARM_MAPPING_ERROR)
1698                 return -ENOMEM;
1699 
1700         for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1701                 phys_addr_t phys = page_to_phys(sg_page(s));
1702                 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1703 
1704                 if (!is_coherent && (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1705                         __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1706 
1707                 prot = __dma_info_to_prot(dir, attrs);
1708 
1709                 ret = iommu_map(mapping->domain, iova, phys, len, prot);
1710                 if (ret < 0)
1711                         goto fail;
1712                 count += len >> PAGE_SHIFT;
1713                 iova += len;
1714         }
1715         *handle = iova_base;
1716 
1717         return 0;
1718 fail:
1719         iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1720         __free_iova(mapping, iova_base, size);
1721         return ret;
1722 }
1723 
1724 static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1725                      enum dma_data_direction dir, unsigned long attrs,
1726                      bool is_coherent)
1727 {
1728         struct scatterlist *s = sg, *dma = sg, *start = sg;
1729         int i, count = 0;
1730         unsigned int offset = s->offset;
1731         unsigned int size = s->offset + s->length;
1732         unsigned int max = dma_get_max_seg_size(dev);
1733 
1734         for (i = 1; i < nents; i++) {
1735                 s = sg_next(s);
1736 
1737                 s->dma_address = ARM_MAPPING_ERROR;
1738                 s->dma_length = 0;
1739 
1740                 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1741                         if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1742                             dir, attrs, is_coherent) < 0)
1743                                 goto bad_mapping;
1744 
1745                         dma->dma_address += offset;
1746                         dma->dma_length = size - offset;
1747 
1748                         size = offset = s->offset;
1749                         start = s;
1750                         dma = sg_next(dma);
1751                         count += 1;
1752                 }
1753                 size += s->length;
1754         }
1755         if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
1756                 is_coherent) < 0)
1757                 goto bad_mapping;
1758 
1759         dma->dma_address += offset;
1760         dma->dma_length = size - offset;
1761 
1762         return count+1;
1763 
1764 bad_mapping:
1765         for_each_sg(sg, s, count, i)
1766                 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1767         return 0;
1768 }
1769 
1770 /**
1771  * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1772  * @dev: valid struct device pointer
1773  * @sg: list of buffers
1774  * @nents: number of buffers to map
1775  * @dir: DMA transfer direction
1776  *
1777  * Map a set of i/o coherent buffers described by scatterlist in streaming
1778  * mode for DMA. The scatter gather list elements are merged together (if
1779  * possible) and tagged with the appropriate dma address and length. They are
1780  * obtained via sg_dma_{address,length}.
1781  */
1782 int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1783                 int nents, enum dma_data_direction dir, unsigned long attrs)
1784 {
1785         return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
1786 }
1787 
1788 /**
1789  * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1790  * @dev: valid struct device pointer
1791  * @sg: list of buffers
1792  * @nents: number of buffers to map
1793  * @dir: DMA transfer direction
1794  *
1795  * Map a set of buffers described by scatterlist in streaming mode for DMA.
1796  * The scatter gather list elements are merged together (if possible) and
1797  * tagged with the appropriate dma address and length. They are obtained via
1798  * sg_dma_{address,length}.
1799  */
1800 int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1801                 int nents, enum dma_data_direction dir, unsigned long attrs)
1802 {
1803         return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
1804 }
1805 
1806 static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1807                 int nents, enum dma_data_direction dir,
1808                 unsigned long attrs, bool is_coherent)
1809 {
1810         struct scatterlist *s;
1811         int i;
1812 
1813         for_each_sg(sg, s, nents, i) {
1814                 if (sg_dma_len(s))
1815                         __iommu_remove_mapping(dev, sg_dma_address(s),
1816                                                sg_dma_len(s));
1817                 if (!is_coherent && (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1818                         __dma_page_dev_to_cpu(sg_page(s), s->offset,
1819                                               s->length, dir);
1820         }
1821 }
1822 
1823 /**
1824  * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1825  * @dev: valid struct device pointer
1826  * @sg: list of buffers
1827  * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1828  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1829  *
1830  * Unmap a set of streaming mode DMA translations.  Again, CPU access
1831  * rules concerning calls here are the same as for dma_unmap_single().
1832  */
1833 void arm_coherent_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1834                 int nents, enum dma_data_direction dir,
1835                 unsigned long attrs)
1836 {
1837         __iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
1838 }
1839 
1840 /**
1841  * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1842  * @dev: valid struct device pointer
1843  * @sg: list of buffers
1844  * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1845  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1846  *
1847  * Unmap a set of streaming mode DMA translations.  Again, CPU access
1848  * rules concerning calls here are the same as for dma_unmap_single().
1849  */
1850 void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1851                         enum dma_data_direction dir,
1852                         unsigned long attrs)
1853 {
1854         __iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
1855 }
1856 
1857 /**
1858  * arm_iommu_sync_sg_for_cpu
1859  * @dev: valid struct device pointer
1860  * @sg: list of buffers
1861  * @nents: number of buffers to map (returned from dma_map_sg)
1862  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1863  */
1864 void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1865                         int nents, enum dma_data_direction dir)
1866 {
1867         struct scatterlist *s;
1868         int i;
1869 
1870         for_each_sg(sg, s, nents, i)
1871                 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1872 
1873 }
1874 
1875 /**
1876  * arm_iommu_sync_sg_for_device
1877  * @dev: valid struct device pointer
1878  * @sg: list of buffers
1879  * @nents: number of buffers to map (returned from dma_map_sg)
1880  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1881  */
1882 void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1883                         int nents, enum dma_data_direction dir)
1884 {
1885         struct scatterlist *s;
1886         int i;
1887 
1888         for_each_sg(sg, s, nents, i)
1889                 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1890 }
1891 
1892 
1893 /**
1894  * arm_coherent_iommu_map_page
1895  * @dev: valid struct device pointer
1896  * @page: page that buffer resides in
1897  * @offset: offset into page for start of buffer
1898  * @size: size of buffer to map
1899  * @dir: DMA transfer direction
1900  *
1901  * Coherent IOMMU aware version of arm_dma_map_page()
1902  */
1903 static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
1904              unsigned long offset, size_t size, enum dma_data_direction dir,
1905              unsigned long attrs)
1906 {
1907         struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1908         dma_addr_t dma_addr;
1909         int ret, prot, len = PAGE_ALIGN(size + offset);
1910 
1911         dma_addr = __alloc_iova(mapping, len);
1912         if (dma_addr == ARM_MAPPING_ERROR)
1913                 return dma_addr;
1914 
1915         prot = __dma_info_to_prot(dir, attrs);
1916 
1917         ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, prot);
1918         if (ret < 0)
1919                 goto fail;
1920 
1921         return dma_addr + offset;
1922 fail:
1923         __free_iova(mapping, dma_addr, len);
1924         return ARM_MAPPING_ERROR;
1925 }
1926 
1927 /**
1928  * arm_iommu_map_page
1929  * @dev: valid struct device pointer
1930  * @page: page that buffer resides in
1931  * @offset: offset into page for start of buffer
1932  * @size: size of buffer to map
1933  * @dir: DMA transfer direction
1934  *
1935  * IOMMU aware version of arm_dma_map_page()
1936  */
1937 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1938              unsigned long offset, size_t size, enum dma_data_direction dir,
1939              unsigned long attrs)
1940 {
1941         if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1942                 __dma_page_cpu_to_dev(page, offset, size, dir);
1943 
1944         return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
1945 }
1946 
1947 /**
1948  * arm_coherent_iommu_unmap_page
1949  * @dev: valid struct device pointer
1950  * @handle: DMA address of buffer
1951  * @size: size of buffer (same as passed to dma_map_page)
1952  * @dir: DMA transfer direction (same as passed to dma_map_page)
1953  *
1954  * Coherent IOMMU aware version of arm_dma_unmap_page()
1955  */
1956 static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1957                 size_t size, enum dma_data_direction dir, unsigned long attrs)
1958 {
1959         struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1960         dma_addr_t iova = handle & PAGE_MASK;
1961         int offset = handle & ~PAGE_MASK;
1962         int len = PAGE_ALIGN(size + offset);
1963 
1964         if (!iova)
1965                 return;
1966 
1967         iommu_unmap(mapping->domain, iova, len);
1968         __free_iova(mapping, iova, len);
1969 }
1970 
1971 /**
1972  * arm_iommu_unmap_page
1973  * @dev: valid struct device pointer
1974  * @handle: DMA address of buffer
1975  * @size: size of buffer (same as passed to dma_map_page)
1976  * @dir: DMA transfer direction (same as passed to dma_map_page)
1977  *
1978  * IOMMU aware version of arm_dma_unmap_page()
1979  */
1980 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1981                 size_t size, enum dma_data_direction dir, unsigned long attrs)
1982 {
1983         struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1984         dma_addr_t iova = handle & PAGE_MASK;
1985         struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1986         int offset = handle & ~PAGE_MASK;
1987         int len = PAGE_ALIGN(size + offset);
1988 
1989         if (!iova)
1990                 return;
1991 
1992         if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1993                 __dma_page_dev_to_cpu(page, offset, size, dir);
1994 
1995         iommu_unmap(mapping->domain, iova, len);
1996         __free_iova(mapping, iova, len);
1997 }
1998 
1999 /**
2000  * arm_iommu_map_resource - map a device resource for DMA
2001  * @dev: valid struct device pointer
2002  * @phys_addr: physical address of resource
2003  * @size: size of resource to map
2004  * @dir: DMA transfer direction
2005  */
2006 static dma_addr_t arm_iommu_map_resource(struct device *dev,
2007                 phys_addr_t phys_addr, size_t size,
2008                 enum dma_data_direction dir, unsigned long attrs)
2009 {
2010         struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2011         dma_addr_t dma_addr;
2012         int ret, prot;
2013         phys_addr_t addr = phys_addr & PAGE_MASK;
2014         unsigned int offset = phys_addr & ~PAGE_MASK;
2015         size_t len = PAGE_ALIGN(size + offset);
2016 
2017         dma_addr = __alloc_iova(mapping, len);
2018         if (dma_addr == ARM_MAPPING_ERROR)
2019                 return dma_addr;
2020 
2021         prot = __dma_info_to_prot(dir, attrs) | IOMMU_MMIO;
2022 
2023         ret = iommu_map(mapping->domain, dma_addr, addr, len, prot);
2024         if (ret < 0)
2025                 goto fail;
2026 
2027         return dma_addr + offset;
2028 fail:
2029         __free_iova(mapping, dma_addr, len);
2030         return ARM_MAPPING_ERROR;
2031 }
2032 
2033 /**
2034  * arm_iommu_unmap_resource - unmap a device DMA resource
2035  * @dev: valid struct device pointer
2036  * @dma_handle: DMA address to resource
2037  * @size: size of resource to map
2038  * @dir: DMA transfer direction
2039  */
2040 static void arm_iommu_unmap_resource(struct device *dev, dma_addr_t dma_handle,
2041                 size_t size, enum dma_data_direction dir,
2042                 unsigned long attrs)
2043 {
2044         struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2045         dma_addr_t iova = dma_handle & PAGE_MASK;
2046         unsigned int offset = dma_handle & ~PAGE_MASK;
2047         size_t len = PAGE_ALIGN(size + offset);
2048 
2049         if (!iova)
2050                 return;
2051 
2052         iommu_unmap(mapping->domain, iova, len);
2053         __free_iova(mapping, iova, len);
2054 }
2055 
2056 static void arm_iommu_sync_single_for_cpu(struct device *dev,
2057                 dma_addr_t handle, size_t size, enum dma_data_direction dir)
2058 {
2059         struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2060         dma_addr_t iova = handle & PAGE_MASK;
2061         struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
2062         unsigned int offset = handle & ~PAGE_MASK;
2063 
2064         if (!iova)
2065                 return;
2066 
2067         __dma_page_dev_to_cpu(page, offset, size, dir);
2068 }
2069 
2070 static void arm_iommu_sync_single_for_device(struct device *dev,
2071                 dma_addr_t handle, size_t size, enum dma_data_direction dir)
2072 {
2073         struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2074         dma_addr_t iova = handle & PAGE_MASK;
2075         struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
2076         unsigned int offset = handle & ~PAGE_MASK;
2077 
2078         if (!iova)
2079                 return;
2080 
2081         __dma_page_cpu_to_dev(page, offset, size, dir);
2082 }
2083 
2084 const struct dma_map_ops iommu_ops = {
2085         .alloc          = arm_iommu_alloc_attrs,
2086         .free           = arm_iommu_free_attrs,
2087         .mmap           = arm_iommu_mmap_attrs,
2088         .get_sgtable    = arm_iommu_get_sgtable,
2089 
2090         .map_page               = arm_iommu_map_page,
2091         .unmap_page             = arm_iommu_unmap_page,
2092         .sync_single_for_cpu    = arm_iommu_sync_single_for_cpu,
2093         .sync_single_for_device = arm_iommu_sync_single_for_device,
2094 
2095         .map_sg                 = arm_iommu_map_sg,
2096         .unmap_sg               = arm_iommu_unmap_sg,
2097         .sync_sg_for_cpu        = arm_iommu_sync_sg_for_cpu,
2098         .sync_sg_for_device     = arm_iommu_sync_sg_for_device,
2099 
2100         .map_resource           = arm_iommu_map_resource,
2101         .unmap_resource         = arm_iommu_unmap_resource,
2102 
2103         .mapping_error          = arm_dma_mapping_error,
2104         .dma_supported          = arm_dma_supported,
2105 };
2106 
2107 const struct dma_map_ops iommu_coherent_ops = {
2108         .alloc          = arm_coherent_iommu_alloc_attrs,
2109         .free           = arm_coherent_iommu_free_attrs,
2110         .mmap           = arm_coherent_iommu_mmap_attrs,
2111         .get_sgtable    = arm_iommu_get_sgtable,
2112 
2113         .map_page       = arm_coherent_iommu_map_page,
2114         .unmap_page     = arm_coherent_iommu_unmap_page,
2115 
2116         .map_sg         = arm_coherent_iommu_map_sg,
2117         .unmap_sg       = arm_coherent_iommu_unmap_sg,
2118 
2119         .map_resource   = arm_iommu_map_resource,
2120         .unmap_resource = arm_iommu_unmap_resource,
2121 
2122         .mapping_error          = arm_dma_mapping_error,
2123         .dma_supported          = arm_dma_supported,
2124 };
2125 
2126 /**
2127  * arm_iommu_create_mapping
2128  * @bus: pointer to the bus holding the client device (for IOMMU calls)
2129  * @base: start address of the valid IO address space
2130  * @size: maximum size of the valid IO address space
2131  *
2132  * Creates a mapping structure which holds information about used/unused
2133  * IO address ranges, which is required to perform memory allocation and
2134  * mapping with IOMMU aware functions.
2135  *
2136  * The client device need to be attached to the mapping with
2137  * arm_iommu_attach_device function.
2138  */
2139 struct dma_iommu_mapping *
2140 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, u64 size)
2141 {
2142         unsigned int bits = size >> PAGE_SHIFT;
2143         unsigned int bitmap_size = BITS_TO_LONGS(bits) * sizeof(long);
2144         struct dma_iommu_mapping *mapping;
2145         int extensions = 1;
2146         int err = -ENOMEM;
2147 
2148         /* currently only 32-bit DMA address space is supported */
2149         if (size > DMA_BIT_MASK(32) + 1)
2150                 return ERR_PTR(-ERANGE);
2151 
2152         if (!bitmap_size)
2153                 return ERR_PTR(-EINVAL);
2154 
2155         if (bitmap_size > PAGE_SIZE) {
2156                 extensions = bitmap_size / PAGE_SIZE;
2157                 bitmap_size = PAGE_SIZE;
2158         }
2159 
2160         mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
2161         if (!mapping)
2162                 goto err;
2163 
2164         mapping->bitmap_size = bitmap_size;
2165         mapping->bitmaps = kcalloc(extensions, sizeof(unsigned long *),
2166                                    GFP_KERNEL);
2167         if (!mapping->bitmaps)
2168                 goto err2;
2169 
2170         mapping->bitmaps[0] = kzalloc(bitmap_size, GFP_KERNEL);
2171         if (!mapping->bitmaps[0])
2172                 goto err3;
2173 
2174         mapping->nr_bitmaps = 1;
2175         mapping->extensions = extensions;
2176         mapping->base = base;
2177         mapping->bits = BITS_PER_BYTE * bitmap_size;
2178 
2179         spin_lock_init(&mapping->lock);
2180 
2181         mapping->domain = iommu_domain_alloc(bus);
2182         if (!mapping->domain)
2183                 goto err4;
2184 
2185         kref_init(&mapping->kref);
2186         return mapping;
2187 err4:
2188         kfree(mapping->bitmaps[0]);
2189 err3:
2190         kfree(mapping->bitmaps);
2191 err2:
2192         kfree(mapping);
2193 err:
2194         return ERR_PTR(err);
2195 }
2196 EXPORT_SYMBOL_GPL(arm_iommu_create_mapping);
2197 
2198 static void release_iommu_mapping(struct kref *kref)
2199 {
2200         int i;
2201         struct dma_iommu_mapping *mapping =
2202                 container_of(kref, struct dma_iommu_mapping, kref);
2203 
2204         iommu_domain_free(mapping->domain);
2205         for (i = 0; i < mapping->nr_bitmaps; i++)
2206                 kfree(mapping->bitmaps[i]);
2207         kfree(mapping->bitmaps);
2208         kfree(mapping);
2209 }
2210 
2211 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping)
2212 {
2213         int next_bitmap;
2214 
2215         if (mapping->nr_bitmaps >= mapping->extensions)
2216                 return -EINVAL;
2217 
2218         next_bitmap = mapping->nr_bitmaps;
2219         mapping->bitmaps[next_bitmap] = kzalloc(mapping->bitmap_size,
2220                                                 GFP_ATOMIC);
2221         if (!mapping->bitmaps[next_bitmap])
2222                 return -ENOMEM;
2223 
2224         mapping->nr_bitmaps++;
2225 
2226         return 0;
2227 }
2228 
2229 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
2230 {
2231         if (mapping)
2232                 kref_put(&mapping->kref, release_iommu_mapping);
2233 }
2234 EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
2235 
2236 static int __arm_iommu_attach_device(struct device *dev,
2237                                      struct dma_iommu_mapping *mapping)
2238 {
2239         int err;
2240 
2241         err = iommu_attach_device(mapping->domain, dev);
2242         if (err)
2243                 return err;
2244 
2245         kref_get(&mapping->kref);
2246         to_dma_iommu_mapping(dev) = mapping;
2247 
2248         pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
2249         return 0;
2250 }
2251 
2252 /**
2253  * arm_iommu_attach_device
2254  * @dev: valid struct device pointer
2255  * @mapping: io address space mapping structure (returned from
2256  *      arm_iommu_create_mapping)
2257  *
2258  * Attaches specified io address space mapping to the provided device.
2259  * This replaces the dma operations (dma_map_ops pointer) with the
2260  * IOMMU aware version.
2261  *
2262  * More than one client might be attached to the same io address space
2263  * mapping.
2264  */
2265 int arm_iommu_attach_device(struct device *dev,
2266                             struct dma_iommu_mapping *mapping)
2267 {
2268         int err;
2269 
2270         err = __arm_iommu_attach_device(dev, mapping);
2271         if (err)
2272                 return err;
2273 
2274         set_dma_ops(dev, &iommu_ops);
2275         return 0;
2276 }
2277 EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
2278 
2279 /**
2280  * arm_iommu_detach_device
2281  * @dev: valid struct device pointer
2282  *
2283  * Detaches the provided device from a previously attached map.
2284  * This voids the dma operations (dma_map_ops pointer)
2285  */
2286 void arm_iommu_detach_device(struct device *dev)
2287 {
2288         struct dma_iommu_mapping *mapping;
2289 
2290         mapping = to_dma_iommu_mapping(dev);
2291         if (!mapping) {
2292                 dev_warn(dev, "Not attached\n");
2293                 return;
2294         }
2295 
2296         iommu_detach_device(mapping->domain, dev);
2297         kref_put(&mapping->kref, release_iommu_mapping);
2298         to_dma_iommu_mapping(dev) = NULL;
2299         set_dma_ops(dev, NULL);
2300 
2301         pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
2302 }
2303 EXPORT_SYMBOL_GPL(arm_iommu_detach_device);
2304 
2305 static const struct dma_map_ops *arm_get_iommu_dma_map_ops(bool coherent)
2306 {
2307         return coherent ? &iommu_coherent_ops : &iommu_ops;
2308 }
2309 
2310 static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2311                                     const struct iommu_ops *iommu)
2312 {
2313         struct dma_iommu_mapping *mapping;
2314 
2315         if (!iommu)
2316                 return false;
2317 
2318         mapping = arm_iommu_create_mapping(dev->bus, dma_base, size);
2319         if (IS_ERR(mapping)) {
2320                 pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n",
2321                                 size, dev_name(dev));
2322                 return false;
2323         }
2324 
2325         if (__arm_iommu_attach_device(dev, mapping)) {
2326                 pr_warn("Failed to attached device %s to IOMMU_mapping\n",
2327                                 dev_name(dev));
2328                 arm_iommu_release_mapping(mapping);
2329                 return false;
2330         }
2331 
2332         return true;
2333 }
2334 
2335 static void arm_teardown_iommu_dma_ops(struct device *dev)
2336 {
2337         struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2338 
2339         if (!mapping)
2340                 return;
2341 
2342         arm_iommu_detach_device(dev);
2343         arm_iommu_release_mapping(mapping);
2344 }
2345 
2346 #else
2347 
2348 static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2349                                     const struct iommu_ops *iommu)
2350 {
2351         return false;
2352 }
2353 
2354 static void arm_teardown_iommu_dma_ops(struct device *dev) { }
2355 
2356 #define arm_get_iommu_dma_map_ops arm_get_dma_map_ops
2357 
2358 #endif  /* CONFIG_ARM_DMA_USE_IOMMU */
2359 
2360 static const struct dma_map_ops *arm_get_dma_map_ops(bool coherent)
2361 {
2362         return coherent ? &arm_coherent_dma_ops : &arm_dma_ops;
2363 }
2364 
2365 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
2366                         const struct iommu_ops *iommu, bool coherent)
2367 {
2368         const struct dma_map_ops *dma_ops;
2369 
2370         dev->archdata.dma_coherent = coherent;
2371 
2372         /*
2373          * Don't override the dma_ops if they have already been set. Ideally
2374          * this should be the only location where dma_ops are set, remove this
2375          * check when all other callers of set_dma_ops will have disappeared.
2376          */
2377         if (dev->dma_ops)
2378                 return;
2379 
2380         if (arm_setup_iommu_dma_ops(dev, dma_base, size, iommu))
2381                 dma_ops = arm_get_iommu_dma_map_ops(coherent);
2382         else
2383                 dma_ops = arm_get_dma_map_ops(coherent);
2384 
2385         set_dma_ops(dev, dma_ops);
2386 
2387 #ifdef CONFIG_XEN
2388         if (xen_initial_domain()) {
2389                 dev->archdata.dev_dma_ops = dev->dma_ops;
2390                 dev->dma_ops = xen_dma_ops;
2391         }
2392 #endif
2393         dev->archdata.dma_ops_setup = true;
2394 }
2395 
2396 void arch_teardown_dma_ops(struct device *dev)
2397 {
2398         if (!dev->archdata.dma_ops_setup)
2399                 return;
2400 
2401         arm_teardown_iommu_dma_ops(dev);
2402 }
2403 

~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

kernel.org | git.kernel.org | LWN.net | Project Home | Wiki (Japanese) | Wiki (English) | SVN repository | Mail admin

Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.

osdn.jp