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Linux/arch/arm/plat-omap/i2c.c

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  1 /*
  2  * linux/arch/arm/plat-omap/i2c.c
  3  *
  4  * Helper module for board specific I2C bus registration
  5  *
  6  * Copyright (C) 2007 Nokia Corporation.
  7  *
  8  * Contact: Jarkko Nikula <jhnikula@gmail.com>
  9  *
 10  * This program is free software; you can redistribute it and/or
 11  * modify it under the terms of the GNU General Public License
 12  * version 2 as published by the Free Software Foundation.
 13  *
 14  * This program is distributed in the hope that it will be useful, but
 15  * WITHOUT ANY WARRANTY; without even the implied warranty of
 16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 17  * General Public License for more details.
 18  *
 19  * You should have received a copy of the GNU General Public License
 20  * along with this program; if not, write to the Free Software
 21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 22  * 02110-1301 USA
 23  *
 24  */
 25 
 26 #include <linux/kernel.h>
 27 #include <linux/platform_device.h>
 28 #include <linux/i2c.h>
 29 #include <linux/i2c-omap.h>
 30 #include <linux/slab.h>
 31 #include <linux/err.h>
 32 #include <linux/clk.h>
 33 
 34 #include <mach/irqs.h>
 35 #include <plat/mux.h>
 36 #include <plat/i2c.h>
 37 #include <plat/omap-pm.h>
 38 #include <plat/omap_device.h>
 39 
 40 #define OMAP_I2C_SIZE           0x3f
 41 #define OMAP1_I2C_BASE          0xfffb3800
 42 
 43 static const char name[] = "omap_i2c";
 44 
 45 #define I2C_RESOURCE_BUILDER(base, irq)                 \
 46         {                                               \
 47                 .start  = (base),                       \
 48                 .end    = (base) + OMAP_I2C_SIZE,       \
 49                 .flags  = IORESOURCE_MEM,               \
 50         },                                              \
 51         {                                               \
 52                 .start  = (irq),                        \
 53                 .flags  = IORESOURCE_IRQ,               \
 54         },
 55 
 56 static struct resource i2c_resources[][2] = {
 57         { I2C_RESOURCE_BUILDER(0, 0) },
 58 };
 59 
 60 #define I2C_DEV_BUILDER(bus_id, res, data)              \
 61         {                                               \
 62                 .id     = (bus_id),                     \
 63                 .name   = name,                         \
 64                 .num_resources  = ARRAY_SIZE(res),      \
 65                 .resource       = (res),                \
 66                 .dev            = {                     \
 67                         .platform_data  = (data),       \
 68                 },                                      \
 69         }
 70 
 71 #define MAX_OMAP_I2C_HWMOD_NAME_LEN     16
 72 #define OMAP_I2C_MAX_CONTROLLERS 4
 73 static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
 74 static struct platform_device omap_i2c_devices[] = {
 75         I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
 76 };
 77 
 78 #define OMAP_I2C_CMDLINE_SETUP  (BIT(31))
 79 
 80 static int __init omap_i2c_nr_ports(void)
 81 {
 82         int ports = 0;
 83 
 84         if (cpu_class_is_omap1())
 85                 ports = 1;
 86         else if (cpu_is_omap24xx())
 87                 ports = 2;
 88         else if (cpu_is_omap34xx())
 89                 ports = 3;
 90         else if (cpu_is_omap44xx())
 91                 ports = 4;
 92 
 93         return ports;
 94 }
 95 
 96 static inline int omap1_i2c_add_bus(int bus_id)
 97 {
 98         struct platform_device *pdev;
 99         struct omap_i2c_bus_platform_data *pdata;
100         struct resource *res;
101 
102         omap1_i2c_mux_pins(bus_id);
103 
104         pdev = &omap_i2c_devices[bus_id - 1];
105         res = pdev->resource;
106         res[0].start = OMAP1_I2C_BASE;
107         res[0].end = res[0].start + OMAP_I2C_SIZE;
108         res[1].start = INT_I2C;
109         pdata = &i2c_pdata[bus_id - 1];
110 
111         /* all OMAP1 have IP version 1 register set */
112         pdata->rev = OMAP_I2C_IP_VERSION_1;
113 
114         /* all OMAP1 I2C are implemented like this */
115         pdata->flags = OMAP_I2C_FLAG_NO_FIFO |
116                        OMAP_I2C_FLAG_SIMPLE_CLOCK |
117                        OMAP_I2C_FLAG_16BIT_DATA_REG |
118                        OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK;
119 
120         /* how the cpu bus is wired up differs for 7xx only */
121 
122         if (cpu_is_omap7xx())
123                 pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1;
124         else
125                 pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2;
126 
127         return platform_device_register(pdev);
128 }
129 
130 
131 #ifdef CONFIG_ARCH_OMAP2PLUS
132 /*
133  * XXX This function is a temporary compatibility wrapper - only
134  * needed until the I2C driver can be converted to call
135  * omap_pm_set_max_dev_wakeup_lat() and handle a return code.
136  */
137 static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
138 {
139         omap_pm_set_max_mpu_wakeup_lat(dev, t);
140 }
141 
142 static inline int omap2_i2c_add_bus(int bus_id)
143 {
144         int l;
145         struct omap_hwmod *oh;
146         struct platform_device *pdev;
147         char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
148         struct omap_i2c_bus_platform_data *pdata;
149         struct omap_i2c_dev_attr *dev_attr;
150 
151         omap2_i2c_mux_pins(bus_id);
152 
153         l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
154         WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
155                 "String buffer overflow in I2C%d device setup\n", bus_id);
156         oh = omap_hwmod_lookup(oh_name);
157         if (!oh) {
158                         pr_err("Could not look up %s\n", oh_name);
159                         return -EEXIST;
160         }
161 
162         pdata = &i2c_pdata[bus_id - 1];
163         /*
164          * pass the hwmod class's CPU-specific knowledge of I2C IP revision in
165          * use, and functionality implementation flags, up to the OMAP I2C
166          * driver via platform data
167          */
168         pdata->rev = oh->class->rev;
169 
170         dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
171         pdata->flags = dev_attr->flags;
172 
173         /*
174          * When waiting for completion of a i2c transfer, we need to
175          * set a wake up latency constraint for the MPU. This is to
176          * ensure quick enough wakeup from idle, when transfer
177          * completes.
178          * Only omap3 has support for constraints
179          */
180         if (cpu_is_omap34xx())
181                 pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
182         pdev = omap_device_build(name, bus_id, oh, pdata,
183                         sizeof(struct omap_i2c_bus_platform_data),
184                         NULL, 0, 0);
185         WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
186 
187         return PTR_RET(pdev);
188 }
189 #else
190 static inline int omap2_i2c_add_bus(int bus_id)
191 {
192         return 0;
193 }
194 #endif
195 
196 static int __init omap_i2c_add_bus(int bus_id)
197 {
198         if (cpu_class_is_omap1())
199                 return omap1_i2c_add_bus(bus_id);
200         else
201                 return omap2_i2c_add_bus(bus_id);
202 }
203 
204 /**
205  * omap_i2c_bus_setup - Process command line options for the I2C bus speed
206  * @str: String of options
207  *
208  * This function allow to override the default I2C bus speed for given I2C
209  * bus with a command line option.
210  *
211  * Format: i2c_bus=bus_id,clkrate (in kHz)
212  *
213  * Returns 1 on success, 0 otherwise.
214  */
215 static int __init omap_i2c_bus_setup(char *str)
216 {
217         int ports;
218         int ints[3];
219 
220         ports = omap_i2c_nr_ports();
221         get_options(str, 3, ints);
222         if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
223                 return 0;
224         i2c_pdata[ints[1] - 1].clkrate = ints[2];
225         i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
226 
227         return 1;
228 }
229 __setup("i2c_bus=", omap_i2c_bus_setup);
230 
231 /*
232  * Register busses defined in command line but that are not registered with
233  * omap_register_i2c_bus from board initialization code.
234  */
235 static int __init omap_register_i2c_bus_cmdline(void)
236 {
237         int i, err = 0;
238 
239         for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
240                 if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
241                         i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
242                         err = omap_i2c_add_bus(i + 1);
243                         if (err)
244                                 goto out;
245                 }
246 
247 out:
248         return err;
249 }
250 subsys_initcall(omap_register_i2c_bus_cmdline);
251 
252 /**
253  * omap_register_i2c_bus - register I2C bus with device descriptors
254  * @bus_id: bus id counting from number 1
255  * @clkrate: clock rate of the bus in kHz
256  * @info: pointer into I2C device descriptor table or NULL
257  * @len: number of descriptors in the table
258  *
259  * Returns 0 on success or an error code.
260  */
261 int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
262                           struct i2c_board_info const *info,
263                           unsigned len)
264 {
265         int err;
266 
267         BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());
268 
269         if (info) {
270                 err = i2c_register_board_info(bus_id, info, len);
271                 if (err)
272                         return err;
273         }
274 
275         if (!i2c_pdata[bus_id - 1].clkrate)
276                 i2c_pdata[bus_id - 1].clkrate = clkrate;
277 
278         i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
279 
280         return omap_i2c_add_bus(bus_id);
281 }
282 

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