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Linux/arch/arm/plat-samsung/include/plat/gpio-cfg.h

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  1 /* linux/arch/arm/plat-s3c/include/plat/gpio-cfg.h
  2  *
  3  * Copyright 2008 Openmoko, Inc.
  4  * Copyright 2008 Simtec Electronics
  5  *      http://armlinux.simtec.co.uk/
  6  *      Ben Dooks <ben@simtec.co.uk>
  7  *
  8  * S3C Platform - GPIO pin configuration
  9  *
 10  * This program is free software; you can redistribute it and/or modify
 11  * it under the terms of the GNU General Public License version 2 as
 12  * published by the Free Software Foundation.
 13 */
 14 
 15 /* This file contains the necessary definitions to get the basic gpio
 16  * pin configuration done such as setting a pin to input or output or
 17  * changing the pull-{up,down} configurations.
 18  */
 19 
 20 /* Note, this interface is being added to the s3c64xx arch first and will
 21  * be added to the s3c24xx systems later.
 22  */
 23 
 24 #ifndef __PLAT_GPIO_CFG_H
 25 #define __PLAT_GPIO_CFG_H __FILE__
 26 
 27 #include <linux/types.h>
 28 
 29 typedef unsigned int __bitwise__ samsung_gpio_pull_t;
 30 typedef unsigned int __bitwise__ s5p_gpio_drvstr_t;
 31 
 32 /* forward declaration if gpio-core.h hasn't been included */
 33 struct samsung_gpio_chip;
 34 
 35 /**
 36  * struct samsung_gpio_cfg GPIO configuration
 37  * @cfg_eint: Configuration setting when used for external interrupt source
 38  * @get_pull: Read the current pull configuration for the GPIO
 39  * @set_pull: Set the current pull configuraiton for the GPIO
 40  * @set_config: Set the current configuration for the GPIO
 41  * @get_config: Read the current configuration for the GPIO
 42  *
 43  * Each chip can have more than one type of GPIO bank available and some
 44  * have different capabilites even when they have the same control register
 45  * layouts. Provide an point to vector control routine and provide any
 46  * per-bank configuration information that other systems such as the
 47  * external interrupt code will need.
 48  *
 49  * @sa samsung_gpio_cfgpin
 50  * @sa s3c_gpio_getcfg
 51  * @sa s3c_gpio_setpull
 52  * @sa s3c_gpio_getpull
 53  */
 54 struct samsung_gpio_cfg {
 55         unsigned int    cfg_eint;
 56 
 57         samsung_gpio_pull_t     (*get_pull)(struct samsung_gpio_chip *chip, unsigned offs);
 58         int             (*set_pull)(struct samsung_gpio_chip *chip, unsigned offs,
 59                                     samsung_gpio_pull_t pull);
 60 
 61         unsigned (*get_config)(struct samsung_gpio_chip *chip, unsigned offs);
 62         int      (*set_config)(struct samsung_gpio_chip *chip, unsigned offs,
 63                                unsigned config);
 64 };
 65 
 66 #define S3C_GPIO_SPECIAL_MARK   (0xfffffff0)
 67 #define S3C_GPIO_SPECIAL(x)     (S3C_GPIO_SPECIAL_MARK | (x))
 68 
 69 /* Defines for generic pin configurations */
 70 #define S3C_GPIO_INPUT  (S3C_GPIO_SPECIAL(0))
 71 #define S3C_GPIO_OUTPUT (S3C_GPIO_SPECIAL(1))
 72 #define S3C_GPIO_SFN(x) (S3C_GPIO_SPECIAL(x))
 73 
 74 #define samsung_gpio_is_cfg_special(_cfg) \
 75         (((_cfg) & S3C_GPIO_SPECIAL_MARK) == S3C_GPIO_SPECIAL_MARK)
 76 
 77 /**
 78  * s3c_gpio_cfgpin() - Change the GPIO function of a pin.
 79  * @pin pin The pin number to configure.
 80  * @to to The configuration for the pin's function.
 81  *
 82  * Configure which function is actually connected to the external
 83  * pin, such as an gpio input, output or some form of special function
 84  * connected to an internal peripheral block.
 85  *
 86  * The @to parameter can be one of the generic S3C_GPIO_INPUT, S3C_GPIO_OUTPUT
 87  * or S3C_GPIO_SFN() to indicate one of the possible values that the helper
 88  * will then generate the correct bit mask and shift for the configuration.
 89  *
 90  * If a bank of GPIOs all needs to be set to special-function 2, then
 91  * the following code will work:
 92  *
 93  *      for (gpio = start; gpio < end; gpio++)
 94  *              s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
 95  *
 96  * The @to parameter can also be a specific value already shifted to the
 97  * correct position in the control register, although these are discouraged
 98  * in newer kernels and are only being kept for compatibility.
 99  */
100 extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to);
101 
102 /**
103  * s3c_gpio_getcfg - Read the current function for a GPIO pin
104  * @pin: The pin to read the configuration value for.
105  *
106  * Read the configuration state of the given @pin, returning a value that
107  * could be passed back to s3c_gpio_cfgpin().
108  *
109  * @sa s3c_gpio_cfgpin
110  */
111 extern unsigned s3c_gpio_getcfg(unsigned int pin);
112 
113 /**
114  * s3c_gpio_cfgpin_range() - Change the GPIO function for configuring pin range
115  * @start: The pin number to start at
116  * @nr: The number of pins to configure from @start.
117  * @cfg: The configuration for the pin's function
118  *
119  * Call s3c_gpio_cfgpin() for the @nr pins starting at @start.
120  *
121  * @sa s3c_gpio_cfgpin.
122  */
123 extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr,
124                                  unsigned int cfg);
125 
126 /* Define values for the pull-{up,down} available for each gpio pin.
127  *
128  * These values control the state of the weak pull-{up,down} resistors
129  * available on most pins on the S3C series. Not all chips support both
130  * up or down settings, and it may be dependent on the chip that is being
131  * used to whether the particular mode is available.
132  */
133 #define S3C_GPIO_PULL_NONE      ((__force samsung_gpio_pull_t)0x00)
134 #define S3C_GPIO_PULL_DOWN      ((__force samsung_gpio_pull_t)0x01)
135 #define S3C_GPIO_PULL_UP        ((__force samsung_gpio_pull_t)0x02)
136 
137 /**
138  * s3c_gpio_setpull() - set the state of a gpio pin pull resistor
139  * @pin: The pin number to configure the pull resistor.
140  * @pull: The configuration for the pull resistor.
141  *
142  * This function sets the state of the pull-{up,down} resistor for the
143  * specified pin. It will return 0 if successful, or a negative error
144  * code if the pin cannot support the requested pull setting.
145  *
146  * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP.
147 */
148 extern int s3c_gpio_setpull(unsigned int pin, samsung_gpio_pull_t pull);
149 
150 /**
151  * s3c_gpio_getpull() - get the pull resistor state of a gpio pin
152  * @pin: The pin number to get the settings for
153  *
154  * Read the pull resistor value for the specified pin.
155 */
156 extern samsung_gpio_pull_t s3c_gpio_getpull(unsigned int pin);
157 
158 /* configure `all` aspects of an gpio */
159 
160 /**
161  * s3c_gpio_cfgall_range() - configure range of gpio functtion and pull.
162  * @start: The gpio number to start at.
163  * @nr: The number of gpio to configure from @start.
164  * @cfg: The configuration to use
165  * @pull: The pull setting to use.
166  *
167  * Run s3c_gpio_cfgpin() and s3c_gpio_setpull() over the gpio range starting
168  * @gpio and running for @size.
169  *
170  * @sa s3c_gpio_cfgpin
171  * @sa s3c_gpio_setpull
172  * @sa s3c_gpio_cfgpin_range
173  */
174 extern int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr,
175                                  unsigned int cfg, samsung_gpio_pull_t pull);
176 
177 static inline int s3c_gpio_cfgrange_nopull(unsigned int pin, unsigned int size,
178                                            unsigned int cfg)
179 {
180         return s3c_gpio_cfgall_range(pin, size, cfg, S3C_GPIO_PULL_NONE);
181 }
182 
183 /* Define values for the drvstr available for each gpio pin.
184  *
185  * These values control the value of the output signal driver strength,
186  * configurable on most pins on the S5P series.
187  */
188 #define S5P_GPIO_DRVSTR_LV1     ((__force s5p_gpio_drvstr_t)0x0)
189 #define S5P_GPIO_DRVSTR_LV2     ((__force s5p_gpio_drvstr_t)0x2)
190 #define S5P_GPIO_DRVSTR_LV3     ((__force s5p_gpio_drvstr_t)0x1)
191 #define S5P_GPIO_DRVSTR_LV4     ((__force s5p_gpio_drvstr_t)0x3)
192 
193 /**
194  * s5c_gpio_get_drvstr() - get the driver streght value of a gpio pin
195  * @pin: The pin number to get the settings for
196  *
197  * Read the driver streght value for the specified pin.
198 */
199 extern s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin);
200 
201 /**
202  * s3c_gpio_set_drvstr() - set the driver streght value of a gpio pin
203  * @pin: The pin number to configure the driver streght value
204  * @drvstr: The new value of the driver strength
205  *
206  * This function sets the driver strength value for the specified pin.
207  * It will return 0 if successful, or a negative error code if the pin
208  * cannot support the requested setting.
209 */
210 extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr);
211 
212 /**
213  * s5p_register_gpio_interrupt() - register interrupt support for a gpio group
214  * @pin: The pin number from the group to be registered
215  *
216  * This function registers gpio interrupt support for the group that the
217  * specified pin belongs to.
218  *
219  * The total number of gpio pins is quite large ob s5p series. Registering
220  * irq support for all of them would be a resource waste. Because of that the
221  * interrupt support for standard gpio pins is registered dynamically.
222  *
223  * It will return the irq number of the interrupt that has been registered
224  * or -ENOMEM if no more gpio interrupts can be registered. It is allowed
225  * to call this function more than once for the same gpio group (the group
226  * will be registered only once).
227  */
228 extern int s5p_register_gpio_interrupt(int pin);
229 
230 /** s5p_register_gpioint_bank() - add gpio bank for further gpio interrupt
231  * registration (see s5p_register_gpio_interrupt function)
232  * @chain_irq: chained irq number for the gpio int handler for this bank
233  * @start: start gpio group number of this bank
234  * @nr_groups: number of gpio groups handled by this bank
235  *
236  * This functions registers initial information about gpio banks that
237  * can be later used by the s5p_register_gpio_interrupt() function to
238  * enable support for gpio interrupt for particular gpio group.
239  */
240 #ifdef CONFIG_S5P_GPIO_INT
241 extern int s5p_register_gpioint_bank(int chain_irq, int start, int nr_groups);
242 #else
243 #define s5p_register_gpioint_bank(chain_irq, start, nr_groups) do { } while (0)
244 #endif
245 
246 #endif /* __PLAT_GPIO_CFG_H */
247 

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