1 /*
2 * Based on arch/arm/include/asm/processor.h
3 *
4 * Copyright (C) 1995-1999 Russell King
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19 #ifndef __ASM_PROCESSOR_H
20 #define __ASM_PROCESSOR_H
21
22 #define KERNEL_DS UL(-1)
23 #define USER_DS ((UL(1) << MAX_USER_VA_BITS) - 1)
24
25 /*
26 * On arm64 systems, unaligned accesses by the CPU are cheap, and so there is
27 * no point in shifting all network buffers by 2 bytes just to make some IP
28 * header fields appear aligned in memory, potentially sacrificing some DMA
29 * performance on some platforms.
30 */
31 #define NET_IP_ALIGN 0
32
33 #ifndef __ASSEMBLY__
34 #ifdef __KERNEL__
35
36 #include <linux/build_bug.h>
37 #include <linux/cache.h>
38 #include <linux/init.h>
39 #include <linux/stddef.h>
40 #include <linux/string.h>
41
42 #include <asm/alternative.h>
43 #include <asm/cpufeature.h>
44 #include <asm/hw_breakpoint.h>
45 #include <asm/lse.h>
46 #include <asm/pgtable-hwdef.h>
47 #include <asm/pointer_auth.h>
48 #include <asm/ptrace.h>
49 #include <asm/types.h>
50
51 /*
52 * TASK_SIZE - the maximum size of a user space task.
53 * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area.
54 */
55
56 #define DEFAULT_MAP_WINDOW_64 (UL(1) << VA_BITS)
57 #define TASK_SIZE_64 (UL(1) << vabits_user)
58
59 #ifdef CONFIG_COMPAT
60 #ifdef CONFIG_ARM64_64K_PAGES
61 /*
62 * With CONFIG_ARM64_64K_PAGES enabled, the last page is occupied
63 * by the compat vectors page.
64 */
65 #define TASK_SIZE_32 UL(0x100000000)
66 #else
67 #define TASK_SIZE_32 (UL(0x100000000) - PAGE_SIZE)
68 #endif /* CONFIG_ARM64_64K_PAGES */
69 #define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \
70 TASK_SIZE_32 : TASK_SIZE_64)
71 #define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
72 TASK_SIZE_32 : TASK_SIZE_64)
73 #define DEFAULT_MAP_WINDOW (test_thread_flag(TIF_32BIT) ? \
74 TASK_SIZE_32 : DEFAULT_MAP_WINDOW_64)
75 #else
76 #define TASK_SIZE TASK_SIZE_64
77 #define DEFAULT_MAP_WINDOW DEFAULT_MAP_WINDOW_64
78 #endif /* CONFIG_COMPAT */
79
80 #ifdef CONFIG_ARM64_FORCE_52BIT
81 #define STACK_TOP_MAX TASK_SIZE_64
82 #define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 4))
83 #else
84 #define STACK_TOP_MAX DEFAULT_MAP_WINDOW_64
85 #define TASK_UNMAPPED_BASE (PAGE_ALIGN(DEFAULT_MAP_WINDOW / 4))
86 #endif /* CONFIG_ARM64_FORCE_52BIT */
87
88 #ifdef CONFIG_COMPAT
89 #define AARCH32_VECTORS_BASE 0xffff0000
90 #define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
91 AARCH32_VECTORS_BASE : STACK_TOP_MAX)
92 #else
93 #define STACK_TOP STACK_TOP_MAX
94 #endif /* CONFIG_COMPAT */
95
96 #ifndef CONFIG_ARM64_FORCE_52BIT
97 #define arch_get_mmap_end(addr) ((addr > DEFAULT_MAP_WINDOW) ? TASK_SIZE :\
98 DEFAULT_MAP_WINDOW)
99
100 #define arch_get_mmap_base(addr, base) ((addr > DEFAULT_MAP_WINDOW) ? \
101 base + TASK_SIZE - DEFAULT_MAP_WINDOW :\
102 base)
103 #endif /* CONFIG_ARM64_FORCE_52BIT */
104
105 extern phys_addr_t arm64_dma_phys_limit;
106 #define ARCH_LOW_ADDRESS_LIMIT (arm64_dma_phys_limit - 1)
107
108 struct debug_info {
109 #ifdef CONFIG_HAVE_HW_BREAKPOINT
110 /* Have we suspended stepping by a debugger? */
111 int suspended_step;
112 /* Allow breakpoints and watchpoints to be disabled for this thread. */
113 int bps_disabled;
114 int wps_disabled;
115 /* Hardware breakpoints pinned to this task. */
116 struct perf_event *hbp_break[ARM_MAX_BRP];
117 struct perf_event *hbp_watch[ARM_MAX_WRP];
118 #endif
119 };
120
121 struct cpu_context {
122 unsigned long x19;
123 unsigned long x20;
124 unsigned long x21;
125 unsigned long x22;
126 unsigned long x23;
127 unsigned long x24;
128 unsigned long x25;
129 unsigned long x26;
130 unsigned long x27;
131 unsigned long x28;
132 unsigned long fp;
133 unsigned long sp;
134 unsigned long pc;
135 };
136
137 struct thread_struct {
138 struct cpu_context cpu_context; /* cpu context */
139
140 /*
141 * Whitelisted fields for hardened usercopy:
142 * Maintainers must ensure manually that this contains no
143 * implicit padding.
144 */
145 struct {
146 unsigned long tp_value; /* TLS register */
147 unsigned long tp2_value;
148 struct user_fpsimd_state fpsimd_state;
149 } uw;
150
151 unsigned int fpsimd_cpu;
152 void *sve_state; /* SVE registers, if any */
153 unsigned int sve_vl; /* SVE vector length */
154 unsigned int sve_vl_onexec; /* SVE vl after next exec */
155 unsigned long fault_address; /* fault info */
156 unsigned long fault_code; /* ESR_EL1 value */
157 struct debug_info debug; /* debugging */
158 #ifdef CONFIG_ARM64_PTR_AUTH
159 struct ptrauth_keys keys_user;
160 #endif
161 };
162
163 static inline void arch_thread_struct_whitelist(unsigned long *offset,
164 unsigned long *size)
165 {
166 /* Verify that there is no padding among the whitelisted fields: */
167 BUILD_BUG_ON(sizeof_field(struct thread_struct, uw) !=
168 sizeof_field(struct thread_struct, uw.tp_value) +
169 sizeof_field(struct thread_struct, uw.tp2_value) +
170 sizeof_field(struct thread_struct, uw.fpsimd_state));
171
172 *offset = offsetof(struct thread_struct, uw);
173 *size = sizeof_field(struct thread_struct, uw);
174 }
175
176 #ifdef CONFIG_COMPAT
177 #define task_user_tls(t) \
178 ({ \
179 unsigned long *__tls; \
180 if (is_compat_thread(task_thread_info(t))) \
181 __tls = &(t)->thread.uw.tp2_value; \
182 else \
183 __tls = &(t)->thread.uw.tp_value; \
184 __tls; \
185 })
186 #else
187 #define task_user_tls(t) (&(t)->thread.uw.tp_value)
188 #endif
189
190 /* Sync TPIDR_EL0 back to thread_struct for current */
191 void tls_preserve_current_state(void);
192
193 #define INIT_THREAD { \
194 .fpsimd_cpu = NR_CPUS, \
195 }
196
197 static inline void start_thread_common(struct pt_regs *regs, unsigned long pc)
198 {
199 memset(regs, 0, sizeof(*regs));
200 forget_syscall(regs);
201 regs->pc = pc;
202 }
203
204 static inline void start_thread(struct pt_regs *regs, unsigned long pc,
205 unsigned long sp)
206 {
207 start_thread_common(regs, pc);
208 regs->pstate = PSR_MODE_EL0t;
209
210 if (arm64_get_ssbd_state() != ARM64_SSBD_FORCE_ENABLE)
211 regs->pstate |= PSR_SSBS_BIT;
212
213 regs->sp = sp;
214 }
215
216 #ifdef CONFIG_COMPAT
217 static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc,
218 unsigned long sp)
219 {
220 start_thread_common(regs, pc);
221 regs->pstate = PSR_AA32_MODE_USR;
222 if (pc & 1)
223 regs->pstate |= PSR_AA32_T_BIT;
224
225 #ifdef __AARCH64EB__
226 regs->pstate |= PSR_AA32_E_BIT;
227 #endif
228
229 if (arm64_get_ssbd_state() != ARM64_SSBD_FORCE_ENABLE)
230 regs->pstate |= PSR_AA32_SSBS_BIT;
231
232 regs->compat_sp = sp;
233 }
234 #endif
235
236 /* Forward declaration, a strange C thing */
237 struct task_struct;
238
239 /* Free all resources held by a thread. */
240 extern void release_thread(struct task_struct *);
241
242 unsigned long get_wchan(struct task_struct *p);
243
244 static inline void cpu_relax(void)
245 {
246 asm volatile("yield" ::: "memory");
247 }
248
249 /* Thread switching */
250 extern struct task_struct *cpu_switch_to(struct task_struct *prev,
251 struct task_struct *next);
252
253 #define task_pt_regs(p) \
254 ((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1)
255
256 #define KSTK_EIP(tsk) ((unsigned long)task_pt_regs(tsk)->pc)
257 #define KSTK_ESP(tsk) user_stack_pointer(task_pt_regs(tsk))
258
259 /*
260 * Prefetching support
261 */
262 #define ARCH_HAS_PREFETCH
263 static inline void prefetch(const void *ptr)
264 {
265 asm volatile("prfm pldl1keep, %a0\n" : : "p" (ptr));
266 }
267
268 #define ARCH_HAS_PREFETCHW
269 static inline void prefetchw(const void *ptr)
270 {
271 asm volatile("prfm pstl1keep, %a0\n" : : "p" (ptr));
272 }
273
274 #define ARCH_HAS_SPINLOCK_PREFETCH
275 static inline void spin_lock_prefetch(const void *ptr)
276 {
277 asm volatile(ARM64_LSE_ATOMIC_INSN(
278 "prfm pstl1strm, %a0",
279 "nop") : : "p" (ptr));
280 }
281
282 #define HAVE_ARCH_PICK_MMAP_LAYOUT
283
284 #endif
285
286 extern unsigned long __ro_after_init signal_minsigstksz; /* sigframe size */
287 extern void __init minsigstksz_setup(void);
288
289 /*
290 * Not at the top of the file due to a direct #include cycle between
291 * <asm/fpsimd.h> and <asm/processor.h>. Deferring this #include
292 * ensures that contents of processor.h are visible to fpsimd.h even if
293 * processor.h is included first.
294 *
295 * These prctl helpers are the only things in this file that require
296 * fpsimd.h. The core code expects them to be in this header.
297 */
298 #include <asm/fpsimd.h>
299
300 /* Userspace interface for PR_SVE_{SET,GET}_VL prctl()s: */
301 #define SVE_SET_VL(arg) sve_set_current_vl(arg)
302 #define SVE_GET_VL() sve_get_current_vl()
303
304 /* PR_PAC_RESET_KEYS prctl */
305 #define PAC_RESET_KEYS(tsk, arg) ptrauth_prctl_reset_keys(tsk, arg)
306
307 /*
308 * For CONFIG_GCC_PLUGIN_STACKLEAK
309 *
310 * These need to be macros because otherwise we get stuck in a nightmare
311 * of header definitions for the use of task_stack_page.
312 */
313
314 #define current_top_of_stack() \
315 ({ \
316 struct stack_info _info; \
317 BUG_ON(!on_accessible_stack(current, current_stack_pointer, &_info)); \
318 _info.high; \
319 })
320 #define on_thread_stack() (on_task_stack(current, current_stack_pointer, NULL))
321
322 #endif /* __ASSEMBLY__ */
323 #endif /* __ASM_PROCESSOR_H */
324
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