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Linux/arch/arm64/kernel/smp.c

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  1 // SPDX-License-Identifier: GPL-2.0-only
  2 /*
  3  * SMP initialisation and IPI support
  4  * Based on arch/arm/kernel/smp.c
  5  *
  6  * Copyright (C) 2012 ARM Ltd.
  7  */
  8 
  9 #include <linux/acpi.h>
 10 #include <linux/arm_sdei.h>
 11 #include <linux/delay.h>
 12 #include <linux/init.h>
 13 #include <linux/spinlock.h>
 14 #include <linux/sched/mm.h>
 15 #include <linux/sched/hotplug.h>
 16 #include <linux/sched/task_stack.h>
 17 #include <linux/interrupt.h>
 18 #include <linux/cache.h>
 19 #include <linux/profile.h>
 20 #include <linux/errno.h>
 21 #include <linux/mm.h>
 22 #include <linux/err.h>
 23 #include <linux/cpu.h>
 24 #include <linux/smp.h>
 25 #include <linux/seq_file.h>
 26 #include <linux/irq.h>
 27 #include <linux/irqchip/arm-gic-v3.h>
 28 #include <linux/percpu.h>
 29 #include <linux/clockchips.h>
 30 #include <linux/completion.h>
 31 #include <linux/of.h>
 32 #include <linux/irq_work.h>
 33 #include <linux/kernel_stat.h>
 34 #include <linux/kexec.h>
 35 #include <linux/kvm_host.h>
 36 
 37 #include <asm/alternative.h>
 38 #include <asm/atomic.h>
 39 #include <asm/cacheflush.h>
 40 #include <asm/cpu.h>
 41 #include <asm/cputype.h>
 42 #include <asm/cpu_ops.h>
 43 #include <asm/daifflags.h>
 44 #include <asm/kvm_mmu.h>
 45 #include <asm/mmu_context.h>
 46 #include <asm/numa.h>
 47 #include <asm/processor.h>
 48 #include <asm/smp_plat.h>
 49 #include <asm/sections.h>
 50 #include <asm/tlbflush.h>
 51 #include <asm/ptrace.h>
 52 #include <asm/virt.h>
 53 
 54 #define CREATE_TRACE_POINTS
 55 #include <trace/events/ipi.h>
 56 
 57 DEFINE_PER_CPU_READ_MOSTLY(int, cpu_number);
 58 EXPORT_PER_CPU_SYMBOL(cpu_number);
 59 
 60 /*
 61  * as from 2.5, kernels no longer have an init_tasks structure
 62  * so we need some other way of telling a new secondary core
 63  * where to place its SVC stack
 64  */
 65 struct secondary_data secondary_data;
 66 /* Number of CPUs which aren't online, but looping in kernel text. */
 67 static int cpus_stuck_in_kernel;
 68 
 69 enum ipi_msg_type {
 70         IPI_RESCHEDULE,
 71         IPI_CALL_FUNC,
 72         IPI_CPU_STOP,
 73         IPI_CPU_CRASH_STOP,
 74         IPI_TIMER,
 75         IPI_IRQ_WORK,
 76         IPI_WAKEUP,
 77         NR_IPI
 78 };
 79 
 80 static int ipi_irq_base __read_mostly;
 81 static int nr_ipi __read_mostly = NR_IPI;
 82 static struct irq_desc *ipi_desc[NR_IPI] __read_mostly;
 83 
 84 static void ipi_setup(int cpu);
 85 
 86 #ifdef CONFIG_HOTPLUG_CPU
 87 static void ipi_teardown(int cpu);
 88 static int op_cpu_kill(unsigned int cpu);
 89 #else
 90 static inline int op_cpu_kill(unsigned int cpu)
 91 {
 92         return -ENOSYS;
 93 }
 94 #endif
 95 
 96 
 97 /*
 98  * Boot a secondary CPU, and assign it the specified idle task.
 99  * This also gives us the initial stack to use for this CPU.
100  */
101 static int boot_secondary(unsigned int cpu, struct task_struct *idle)
102 {
103         const struct cpu_operations *ops = get_cpu_ops(cpu);
104 
105         if (ops->cpu_boot)
106                 return ops->cpu_boot(cpu);
107 
108         return -EOPNOTSUPP;
109 }
110 
111 static DECLARE_COMPLETION(cpu_running);
112 
113 int __cpu_up(unsigned int cpu, struct task_struct *idle)
114 {
115         int ret;
116         long status;
117 
118         /*
119          * We need to tell the secondary core where to find its stack and the
120          * page tables.
121          */
122         secondary_data.task = idle;
123         secondary_data.stack = task_stack_page(idle) + THREAD_SIZE;
124         update_cpu_boot_status(CPU_MMU_OFF);
125         __flush_dcache_area(&secondary_data, sizeof(secondary_data));
126 
127         /* Now bring the CPU into our world */
128         ret = boot_secondary(cpu, idle);
129         if (ret) {
130                 pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
131                 return ret;
132         }
133 
134         /*
135          * CPU was successfully started, wait for it to come online or
136          * time out.
137          */
138         wait_for_completion_timeout(&cpu_running,
139                                     msecs_to_jiffies(5000));
140         if (cpu_online(cpu))
141                 return 0;
142 
143         pr_crit("CPU%u: failed to come online\n", cpu);
144         secondary_data.task = NULL;
145         secondary_data.stack = NULL;
146         __flush_dcache_area(&secondary_data, sizeof(secondary_data));
147         status = READ_ONCE(secondary_data.status);
148         if (status == CPU_MMU_OFF)
149                 status = READ_ONCE(__early_cpu_boot_status);
150 
151         switch (status & CPU_BOOT_STATUS_MASK) {
152         default:
153                 pr_err("CPU%u: failed in unknown state : 0x%lx\n",
154                        cpu, status);
155                 cpus_stuck_in_kernel++;
156                 break;
157         case CPU_KILL_ME:
158                 if (!op_cpu_kill(cpu)) {
159                         pr_crit("CPU%u: died during early boot\n", cpu);
160                         break;
161                 }
162                 pr_crit("CPU%u: may not have shut down cleanly\n", cpu);
163                 fallthrough;
164         case CPU_STUCK_IN_KERNEL:
165                 pr_crit("CPU%u: is stuck in kernel\n", cpu);
166                 if (status & CPU_STUCK_REASON_52_BIT_VA)
167                         pr_crit("CPU%u: does not support 52-bit VAs\n", cpu);
168                 if (status & CPU_STUCK_REASON_NO_GRAN) {
169                         pr_crit("CPU%u: does not support %luK granule\n",
170                                 cpu, PAGE_SIZE / SZ_1K);
171                 }
172                 cpus_stuck_in_kernel++;
173                 break;
174         case CPU_PANIC_KERNEL:
175                 panic("CPU%u detected unsupported configuration\n", cpu);
176         }
177 
178         return -EIO;
179 }
180 
181 static void init_gic_priority_masking(void)
182 {
183         u32 cpuflags;
184 
185         if (WARN_ON(!gic_enable_sre()))
186                 return;
187 
188         cpuflags = read_sysreg(daif);
189 
190         WARN_ON(!(cpuflags & PSR_I_BIT));
191         WARN_ON(!(cpuflags & PSR_F_BIT));
192 
193         gic_write_pmr(GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET);
194 }
195 
196 /*
197  * This is the secondary CPU boot entry.  We're using this CPUs
198  * idle thread stack, but a set of temporary page tables.
199  */
200 asmlinkage notrace void secondary_start_kernel(void)
201 {
202         u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
203         struct mm_struct *mm = &init_mm;
204         const struct cpu_operations *ops;
205         unsigned int cpu;
206 
207         cpu = task_cpu(current);
208         set_my_cpu_offset(per_cpu_offset(cpu));
209 
210         /*
211          * All kernel threads share the same mm context; grab a
212          * reference and switch to it.
213          */
214         mmgrab(mm);
215         current->active_mm = mm;
216 
217         /*
218          * TTBR0 is only used for the identity mapping at this stage. Make it
219          * point to zero page to avoid speculatively fetching new entries.
220          */
221         cpu_uninstall_idmap();
222 
223         if (system_uses_irq_prio_masking())
224                 init_gic_priority_masking();
225 
226         rcu_cpu_starting(cpu);
227         trace_hardirqs_off();
228 
229         /*
230          * If the system has established the capabilities, make sure
231          * this CPU ticks all of those. If it doesn't, the CPU will
232          * fail to come online.
233          */
234         check_local_cpu_capabilities();
235 
236         ops = get_cpu_ops(cpu);
237         if (ops->cpu_postboot)
238                 ops->cpu_postboot();
239 
240         /*
241          * Log the CPU info before it is marked online and might get read.
242          */
243         cpuinfo_store_cpu();
244 
245         /*
246          * Enable GIC and timers.
247          */
248         notify_cpu_starting(cpu);
249 
250         ipi_setup(cpu);
251 
252         store_cpu_topology(cpu);
253         numa_add_cpu(cpu);
254 
255         /*
256          * OK, now it's safe to let the boot CPU continue.  Wait for
257          * the CPU migration code to notice that the CPU is online
258          * before we continue.
259          */
260         pr_info("CPU%u: Booted secondary processor 0x%010lx [0x%08x]\n",
261                                          cpu, (unsigned long)mpidr,
262                                          read_cpuid_id());
263         update_cpu_boot_status(CPU_BOOT_SUCCESS);
264         set_cpu_online(cpu, true);
265         complete(&cpu_running);
266 
267         local_daif_restore(DAIF_PROCCTX);
268 
269         /*
270          * OK, it's off to the idle thread for us
271          */
272         cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
273 }
274 
275 #ifdef CONFIG_HOTPLUG_CPU
276 static int op_cpu_disable(unsigned int cpu)
277 {
278         const struct cpu_operations *ops = get_cpu_ops(cpu);
279 
280         /*
281          * If we don't have a cpu_die method, abort before we reach the point
282          * of no return. CPU0 may not have an cpu_ops, so test for it.
283          */
284         if (!ops || !ops->cpu_die)
285                 return -EOPNOTSUPP;
286 
287         /*
288          * We may need to abort a hot unplug for some other mechanism-specific
289          * reason.
290          */
291         if (ops->cpu_disable)
292                 return ops->cpu_disable(cpu);
293 
294         return 0;
295 }
296 
297 /*
298  * __cpu_disable runs on the processor to be shutdown.
299  */
300 int __cpu_disable(void)
301 {
302         unsigned int cpu = smp_processor_id();
303         int ret;
304 
305         ret = op_cpu_disable(cpu);
306         if (ret)
307                 return ret;
308 
309         remove_cpu_topology(cpu);
310         numa_remove_cpu(cpu);
311 
312         /*
313          * Take this CPU offline.  Once we clear this, we can't return,
314          * and we must not schedule until we're ready to give up the cpu.
315          */
316         set_cpu_online(cpu, false);
317         ipi_teardown(cpu);
318 
319         /*
320          * OK - migrate IRQs away from this CPU
321          */
322         irq_migrate_all_off_this_cpu();
323 
324         return 0;
325 }
326 
327 static int op_cpu_kill(unsigned int cpu)
328 {
329         const struct cpu_operations *ops = get_cpu_ops(cpu);
330 
331         /*
332          * If we have no means of synchronising with the dying CPU, then assume
333          * that it is really dead. We can only wait for an arbitrary length of
334          * time and hope that it's dead, so let's skip the wait and just hope.
335          */
336         if (!ops->cpu_kill)
337                 return 0;
338 
339         return ops->cpu_kill(cpu);
340 }
341 
342 /*
343  * called on the thread which is asking for a CPU to be shutdown -
344  * waits until shutdown has completed, or it is timed out.
345  */
346 void __cpu_die(unsigned int cpu)
347 {
348         int err;
349 
350         if (!cpu_wait_death(cpu, 5)) {
351                 pr_crit("CPU%u: cpu didn't die\n", cpu);
352                 return;
353         }
354         pr_notice("CPU%u: shutdown\n", cpu);
355 
356         /*
357          * Now that the dying CPU is beyond the point of no return w.r.t.
358          * in-kernel synchronisation, try to get the firwmare to help us to
359          * verify that it has really left the kernel before we consider
360          * clobbering anything it might still be using.
361          */
362         err = op_cpu_kill(cpu);
363         if (err)
364                 pr_warn("CPU%d may not have shut down cleanly: %d\n", cpu, err);
365 }
366 
367 /*
368  * Called from the idle thread for the CPU which has been shutdown.
369  *
370  */
371 void cpu_die(void)
372 {
373         unsigned int cpu = smp_processor_id();
374         const struct cpu_operations *ops = get_cpu_ops(cpu);
375 
376         idle_task_exit();
377 
378         local_daif_mask();
379 
380         /* Tell __cpu_die() that this CPU is now safe to dispose of */
381         (void)cpu_report_death();
382 
383         /*
384          * Actually shutdown the CPU. This must never fail. The specific hotplug
385          * mechanism must perform all required cache maintenance to ensure that
386          * no dirty lines are lost in the process of shutting down the CPU.
387          */
388         ops->cpu_die(cpu);
389 
390         BUG();
391 }
392 #endif
393 
394 static void __cpu_try_die(int cpu)
395 {
396 #ifdef CONFIG_HOTPLUG_CPU
397         const struct cpu_operations *ops = get_cpu_ops(cpu);
398 
399         if (ops && ops->cpu_die)
400                 ops->cpu_die(cpu);
401 #endif
402 }
403 
404 /*
405  * Kill the calling secondary CPU, early in bringup before it is turned
406  * online.
407  */
408 void cpu_die_early(void)
409 {
410         int cpu = smp_processor_id();
411 
412         pr_crit("CPU%d: will not boot\n", cpu);
413 
414         /* Mark this CPU absent */
415         set_cpu_present(cpu, 0);
416         rcu_report_dead(cpu);
417 
418         if (IS_ENABLED(CONFIG_HOTPLUG_CPU)) {
419                 update_cpu_boot_status(CPU_KILL_ME);
420                 __cpu_try_die(cpu);
421         }
422 
423         update_cpu_boot_status(CPU_STUCK_IN_KERNEL);
424 
425         cpu_park_loop();
426 }
427 
428 static void __init hyp_mode_check(void)
429 {
430         if (is_hyp_mode_available())
431                 pr_info("CPU: All CPU(s) started at EL2\n");
432         else if (is_hyp_mode_mismatched())
433                 WARN_TAINT(1, TAINT_CPU_OUT_OF_SPEC,
434                            "CPU: CPUs started in inconsistent modes");
435         else
436                 pr_info("CPU: All CPU(s) started at EL1\n");
437         if (IS_ENABLED(CONFIG_KVM) && !is_kernel_in_hyp_mode()) {
438                 kvm_compute_layout();
439                 kvm_apply_hyp_relocations();
440         }
441 }
442 
443 void __init smp_cpus_done(unsigned int max_cpus)
444 {
445         pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
446         setup_cpu_features();
447         hyp_mode_check();
448         apply_alternatives_all();
449         mark_linear_text_alias_ro();
450 }
451 
452 void __init smp_prepare_boot_cpu(void)
453 {
454         set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
455         cpuinfo_store_boot_cpu();
456 
457         /*
458          * We now know enough about the boot CPU to apply the
459          * alternatives that cannot wait until interrupt handling
460          * and/or scheduling is enabled.
461          */
462         apply_boot_alternatives();
463 
464         /* Conditionally switch to GIC PMR for interrupt masking */
465         if (system_uses_irq_prio_masking())
466                 init_gic_priority_masking();
467 
468         kasan_init_hw_tags();
469 }
470 
471 static u64 __init of_get_cpu_mpidr(struct device_node *dn)
472 {
473         const __be32 *cell;
474         u64 hwid;
475 
476         /*
477          * A cpu node with missing "reg" property is
478          * considered invalid to build a cpu_logical_map
479          * entry.
480          */
481         cell = of_get_property(dn, "reg", NULL);
482         if (!cell) {
483                 pr_err("%pOF: missing reg property\n", dn);
484                 return INVALID_HWID;
485         }
486 
487         hwid = of_read_number(cell, of_n_addr_cells(dn));
488         /*
489          * Non affinity bits must be set to 0 in the DT
490          */
491         if (hwid & ~MPIDR_HWID_BITMASK) {
492                 pr_err("%pOF: invalid reg property\n", dn);
493                 return INVALID_HWID;
494         }
495         return hwid;
496 }
497 
498 /*
499  * Duplicate MPIDRs are a recipe for disaster. Scan all initialized
500  * entries and check for duplicates. If any is found just ignore the
501  * cpu. cpu_logical_map was initialized to INVALID_HWID to avoid
502  * matching valid MPIDR values.
503  */
504 static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid)
505 {
506         unsigned int i;
507 
508         for (i = 1; (i < cpu) && (i < NR_CPUS); i++)
509                 if (cpu_logical_map(i) == hwid)
510                         return true;
511         return false;
512 }
513 
514 /*
515  * Initialize cpu operations for a logical cpu and
516  * set it in the possible mask on success
517  */
518 static int __init smp_cpu_setup(int cpu)
519 {
520         const struct cpu_operations *ops;
521 
522         if (init_cpu_ops(cpu))
523                 return -ENODEV;
524 
525         ops = get_cpu_ops(cpu);
526         if (ops->cpu_init(cpu))
527                 return -ENODEV;
528 
529         set_cpu_possible(cpu, true);
530 
531         return 0;
532 }
533 
534 static bool bootcpu_valid __initdata;
535 static unsigned int cpu_count = 1;
536 
537 #ifdef CONFIG_ACPI
538 static struct acpi_madt_generic_interrupt cpu_madt_gicc[NR_CPUS];
539 
540 struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu)
541 {
542         return &cpu_madt_gicc[cpu];
543 }
544 
545 /*
546  * acpi_map_gic_cpu_interface - parse processor MADT entry
547  *
548  * Carry out sanity checks on MADT processor entry and initialize
549  * cpu_logical_map on success
550  */
551 static void __init
552 acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
553 {
554         u64 hwid = processor->arm_mpidr;
555 
556         if (!(processor->flags & ACPI_MADT_ENABLED)) {
557                 pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
558                 return;
559         }
560 
561         if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) {
562                 pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid);
563                 return;
564         }
565 
566         if (is_mpidr_duplicate(cpu_count, hwid)) {
567                 pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);
568                 return;
569         }
570 
571         /* Check if GICC structure of boot CPU is available in the MADT */
572         if (cpu_logical_map(0) == hwid) {
573                 if (bootcpu_valid) {
574                         pr_err("duplicate boot CPU MPIDR: 0x%llx in MADT\n",
575                                hwid);
576                         return;
577                 }
578                 bootcpu_valid = true;
579                 cpu_madt_gicc[0] = *processor;
580                 return;
581         }
582 
583         if (cpu_count >= NR_CPUS)
584                 return;
585 
586         /* map the logical cpu id to cpu MPIDR */
587         set_cpu_logical_map(cpu_count, hwid);
588 
589         cpu_madt_gicc[cpu_count] = *processor;
590 
591         /*
592          * Set-up the ACPI parking protocol cpu entries
593          * while initializing the cpu_logical_map to
594          * avoid parsing MADT entries multiple times for
595          * nothing (ie a valid cpu_logical_map entry should
596          * contain a valid parking protocol data set to
597          * initialize the cpu if the parking protocol is
598          * the only available enable method).
599          */
600         acpi_set_mailbox_entry(cpu_count, processor);
601 
602         cpu_count++;
603 }
604 
605 static int __init
606 acpi_parse_gic_cpu_interface(union acpi_subtable_headers *header,
607                              const unsigned long end)
608 {
609         struct acpi_madt_generic_interrupt *processor;
610 
611         processor = (struct acpi_madt_generic_interrupt *)header;
612         if (BAD_MADT_GICC_ENTRY(processor, end))
613                 return -EINVAL;
614 
615         acpi_table_print_madt_entry(&header->common);
616 
617         acpi_map_gic_cpu_interface(processor);
618 
619         return 0;
620 }
621 
622 static void __init acpi_parse_and_init_cpus(void)
623 {
624         int i;
625 
626         /*
627          * do a walk of MADT to determine how many CPUs
628          * we have including disabled CPUs, and get information
629          * we need for SMP init.
630          */
631         acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
632                                       acpi_parse_gic_cpu_interface, 0);
633 
634         /*
635          * In ACPI, SMP and CPU NUMA information is provided in separate
636          * static tables, namely the MADT and the SRAT.
637          *
638          * Thus, it is simpler to first create the cpu logical map through
639          * an MADT walk and then map the logical cpus to their node ids
640          * as separate steps.
641          */
642         acpi_map_cpus_to_nodes();
643 
644         for (i = 0; i < nr_cpu_ids; i++)
645                 early_map_cpu_to_node(i, acpi_numa_get_nid(i));
646 }
647 #else
648 #define acpi_parse_and_init_cpus(...)   do { } while (0)
649 #endif
650 
651 /*
652  * Enumerate the possible CPU set from the device tree and build the
653  * cpu logical map array containing MPIDR values related to logical
654  * cpus. Assumes that cpu_logical_map(0) has already been initialized.
655  */
656 static void __init of_parse_and_init_cpus(void)
657 {
658         struct device_node *dn;
659 
660         for_each_of_cpu_node(dn) {
661                 u64 hwid = of_get_cpu_mpidr(dn);
662 
663                 if (hwid == INVALID_HWID)
664                         goto next;
665 
666                 if (is_mpidr_duplicate(cpu_count, hwid)) {
667                         pr_err("%pOF: duplicate cpu reg properties in the DT\n",
668                                 dn);
669                         goto next;
670                 }
671 
672                 /*
673                  * The numbering scheme requires that the boot CPU
674                  * must be assigned logical id 0. Record it so that
675                  * the logical map built from DT is validated and can
676                  * be used.
677                  */
678                 if (hwid == cpu_logical_map(0)) {
679                         if (bootcpu_valid) {
680                                 pr_err("%pOF: duplicate boot cpu reg property in DT\n",
681                                         dn);
682                                 goto next;
683                         }
684 
685                         bootcpu_valid = true;
686                         early_map_cpu_to_node(0, of_node_to_nid(dn));
687 
688                         /*
689                          * cpu_logical_map has already been
690                          * initialized and the boot cpu doesn't need
691                          * the enable-method so continue without
692                          * incrementing cpu.
693                          */
694                         continue;
695                 }
696 
697                 if (cpu_count >= NR_CPUS)
698                         goto next;
699 
700                 pr_debug("cpu logical map 0x%llx\n", hwid);
701                 set_cpu_logical_map(cpu_count, hwid);
702 
703                 early_map_cpu_to_node(cpu_count, of_node_to_nid(dn));
704 next:
705                 cpu_count++;
706         }
707 }
708 
709 /*
710  * Enumerate the possible CPU set from the device tree or ACPI and build the
711  * cpu logical map array containing MPIDR values related to logical
712  * cpus. Assumes that cpu_logical_map(0) has already been initialized.
713  */
714 void __init smp_init_cpus(void)
715 {
716         int i;
717 
718         if (acpi_disabled)
719                 of_parse_and_init_cpus();
720         else
721                 acpi_parse_and_init_cpus();
722 
723         if (cpu_count > nr_cpu_ids)
724                 pr_warn("Number of cores (%d) exceeds configured maximum of %u - clipping\n",
725                         cpu_count, nr_cpu_ids);
726 
727         if (!bootcpu_valid) {
728                 pr_err("missing boot CPU MPIDR, not enabling secondaries\n");
729                 return;
730         }
731 
732         /*
733          * We need to set the cpu_logical_map entries before enabling
734          * the cpus so that cpu processor description entries (DT cpu nodes
735          * and ACPI MADT entries) can be retrieved by matching the cpu hwid
736          * with entries in cpu_logical_map while initializing the cpus.
737          * If the cpu set-up fails, invalidate the cpu_logical_map entry.
738          */
739         for (i = 1; i < nr_cpu_ids; i++) {
740                 if (cpu_logical_map(i) != INVALID_HWID) {
741                         if (smp_cpu_setup(i))
742                                 set_cpu_logical_map(i, INVALID_HWID);
743                 }
744         }
745 }
746 
747 void __init smp_prepare_cpus(unsigned int max_cpus)
748 {
749         const struct cpu_operations *ops;
750         int err;
751         unsigned int cpu;
752         unsigned int this_cpu;
753 
754         init_cpu_topology();
755 
756         this_cpu = smp_processor_id();
757         store_cpu_topology(this_cpu);
758         numa_store_cpu_info(this_cpu);
759         numa_add_cpu(this_cpu);
760 
761         /*
762          * If UP is mandated by "nosmp" (which implies "maxcpus=0"), don't set
763          * secondary CPUs present.
764          */
765         if (max_cpus == 0)
766                 return;
767 
768         /*
769          * Initialise the present map (which describes the set of CPUs
770          * actually populated at the present time) and release the
771          * secondaries from the bootloader.
772          */
773         for_each_possible_cpu(cpu) {
774 
775                 per_cpu(cpu_number, cpu) = cpu;
776 
777                 if (cpu == smp_processor_id())
778                         continue;
779 
780                 ops = get_cpu_ops(cpu);
781                 if (!ops)
782                         continue;
783 
784                 err = ops->cpu_prepare(cpu);
785                 if (err)
786                         continue;
787 
788                 set_cpu_present(cpu, true);
789                 numa_store_cpu_info(cpu);
790         }
791 }
792 
793 static const char *ipi_types[NR_IPI] __tracepoint_string = {
794         [IPI_RESCHEDULE]        = "Rescheduling interrupts",
795         [IPI_CALL_FUNC]         = "Function call interrupts",
796         [IPI_CPU_STOP]          = "CPU stop interrupts",
797         [IPI_CPU_CRASH_STOP]    = "CPU stop (for crash dump) interrupts",
798         [IPI_TIMER]             = "Timer broadcast interrupts",
799         [IPI_IRQ_WORK]          = "IRQ work interrupts",
800         [IPI_WAKEUP]            = "CPU wake-up interrupts",
801 };
802 
803 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr);
804 
805 unsigned long irq_err_count;
806 
807 int arch_show_interrupts(struct seq_file *p, int prec)
808 {
809         unsigned int cpu, i;
810 
811         for (i = 0; i < NR_IPI; i++) {
812                 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
813                            prec >= 4 ? " " : "");
814                 for_each_online_cpu(cpu)
815                         seq_printf(p, "%10u ", irq_desc_kstat_cpu(ipi_desc[i], cpu));
816                 seq_printf(p, "      %s\n", ipi_types[i]);
817         }
818 
819         seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
820         return 0;
821 }
822 
823 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
824 {
825         smp_cross_call(mask, IPI_CALL_FUNC);
826 }
827 
828 void arch_send_call_function_single_ipi(int cpu)
829 {
830         smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
831 }
832 
833 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
834 void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
835 {
836         smp_cross_call(mask, IPI_WAKEUP);
837 }
838 #endif
839 
840 #ifdef CONFIG_IRQ_WORK
841 void arch_irq_work_raise(void)
842 {
843         smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
844 }
845 #endif
846 
847 static void local_cpu_stop(void)
848 {
849         set_cpu_online(smp_processor_id(), false);
850 
851         local_daif_mask();
852         sdei_mask_local_cpu();
853         cpu_park_loop();
854 }
855 
856 /*
857  * We need to implement panic_smp_self_stop() for parallel panic() calls, so
858  * that cpu_online_mask gets correctly updated and smp_send_stop() can skip
859  * CPUs that have already stopped themselves.
860  */
861 void panic_smp_self_stop(void)
862 {
863         local_cpu_stop();
864 }
865 
866 #ifdef CONFIG_KEXEC_CORE
867 static atomic_t waiting_for_crash_ipi = ATOMIC_INIT(0);
868 #endif
869 
870 static void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
871 {
872 #ifdef CONFIG_KEXEC_CORE
873         crash_save_cpu(regs, cpu);
874 
875         atomic_dec(&waiting_for_crash_ipi);
876 
877         local_irq_disable();
878         sdei_mask_local_cpu();
879 
880         if (IS_ENABLED(CONFIG_HOTPLUG_CPU))
881                 __cpu_try_die(cpu);
882 
883         /* just in case */
884         cpu_park_loop();
885 #endif
886 }
887 
888 /*
889  * Main handler for inter-processor interrupts
890  */
891 static void do_handle_IPI(int ipinr)
892 {
893         unsigned int cpu = smp_processor_id();
894 
895         if ((unsigned)ipinr < NR_IPI)
896                 trace_ipi_entry_rcuidle(ipi_types[ipinr]);
897 
898         switch (ipinr) {
899         case IPI_RESCHEDULE:
900                 scheduler_ipi();
901                 break;
902 
903         case IPI_CALL_FUNC:
904                 generic_smp_call_function_interrupt();
905                 break;
906 
907         case IPI_CPU_STOP:
908                 local_cpu_stop();
909                 break;
910 
911         case IPI_CPU_CRASH_STOP:
912                 if (IS_ENABLED(CONFIG_KEXEC_CORE)) {
913                         ipi_cpu_crash_stop(cpu, get_irq_regs());
914 
915                         unreachable();
916                 }
917                 break;
918 
919 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
920         case IPI_TIMER:
921                 tick_receive_broadcast();
922                 break;
923 #endif
924 
925 #ifdef CONFIG_IRQ_WORK
926         case IPI_IRQ_WORK:
927                 irq_work_run();
928                 break;
929 #endif
930 
931 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
932         case IPI_WAKEUP:
933                 WARN_ONCE(!acpi_parking_protocol_valid(cpu),
934                           "CPU%u: Wake-up IPI outside the ACPI parking protocol\n",
935                           cpu);
936                 break;
937 #endif
938 
939         default:
940                 pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
941                 break;
942         }
943 
944         if ((unsigned)ipinr < NR_IPI)
945                 trace_ipi_exit_rcuidle(ipi_types[ipinr]);
946 }
947 
948 static irqreturn_t ipi_handler(int irq, void *data)
949 {
950         do_handle_IPI(irq - ipi_irq_base);
951         return IRQ_HANDLED;
952 }
953 
954 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
955 {
956         trace_ipi_raise(target, ipi_types[ipinr]);
957         __ipi_send_mask(ipi_desc[ipinr], target);
958 }
959 
960 static void ipi_setup(int cpu)
961 {
962         int i;
963 
964         if (WARN_ON_ONCE(!ipi_irq_base))
965                 return;
966 
967         for (i = 0; i < nr_ipi; i++)
968                 enable_percpu_irq(ipi_irq_base + i, 0);
969 }
970 
971 #ifdef CONFIG_HOTPLUG_CPU
972 static void ipi_teardown(int cpu)
973 {
974         int i;
975 
976         if (WARN_ON_ONCE(!ipi_irq_base))
977                 return;
978 
979         for (i = 0; i < nr_ipi; i++)
980                 disable_percpu_irq(ipi_irq_base + i);
981 }
982 #endif
983 
984 void __init set_smp_ipi_range(int ipi_base, int n)
985 {
986         int i;
987 
988         WARN_ON(n < NR_IPI);
989         nr_ipi = min(n, NR_IPI);
990 
991         for (i = 0; i < nr_ipi; i++) {
992                 int err;
993 
994                 err = request_percpu_irq(ipi_base + i, ipi_handler,
995                                          "IPI", &cpu_number);
996                 WARN_ON(err);
997 
998                 ipi_desc[i] = irq_to_desc(ipi_base + i);
999                 irq_set_status_flags(ipi_base + i, IRQ_HIDDEN);
1000         }
1001 
1002         ipi_irq_base = ipi_base;
1003 
1004         /* Setup the boot CPU immediately */
1005         ipi_setup(smp_processor_id());
1006 }
1007 
1008 void smp_send_reschedule(int cpu)
1009 {
1010         smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
1011 }
1012 
1013 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
1014 void tick_broadcast(const struct cpumask *mask)
1015 {
1016         smp_cross_call(mask, IPI_TIMER);
1017 }
1018 #endif
1019 
1020 /*
1021  * The number of CPUs online, not counting this CPU (which may not be
1022  * fully online and so not counted in num_online_cpus()).
1023  */
1024 static inline unsigned int num_other_online_cpus(void)
1025 {
1026         unsigned int this_cpu_online = cpu_online(smp_processor_id());
1027 
1028         return num_online_cpus() - this_cpu_online;
1029 }
1030 
1031 void smp_send_stop(void)
1032 {
1033         unsigned long timeout;
1034 
1035         if (num_other_online_cpus()) {
1036                 cpumask_t mask;
1037 
1038                 cpumask_copy(&mask, cpu_online_mask);
1039                 cpumask_clear_cpu(smp_processor_id(), &mask);
1040 
1041                 if (system_state <= SYSTEM_RUNNING)
1042                         pr_crit("SMP: stopping secondary CPUs\n");
1043                 smp_cross_call(&mask, IPI_CPU_STOP);
1044         }
1045 
1046         /* Wait up to one second for other CPUs to stop */
1047         timeout = USEC_PER_SEC;
1048         while (num_other_online_cpus() && timeout--)
1049                 udelay(1);
1050 
1051         if (num_other_online_cpus())
1052                 pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
1053                         cpumask_pr_args(cpu_online_mask));
1054 
1055         sdei_mask_local_cpu();
1056 }
1057 
1058 #ifdef CONFIG_KEXEC_CORE
1059 void crash_smp_send_stop(void)
1060 {
1061         static int cpus_stopped;
1062         cpumask_t mask;
1063         unsigned long timeout;
1064 
1065         /*
1066          * This function can be called twice in panic path, but obviously
1067          * we execute this only once.
1068          */
1069         if (cpus_stopped)
1070                 return;
1071 
1072         cpus_stopped = 1;
1073 
1074         /*
1075          * If this cpu is the only one alive at this point in time, online or
1076          * not, there are no stop messages to be sent around, so just back out.
1077          */
1078         if (num_other_online_cpus() == 0) {
1079                 sdei_mask_local_cpu();
1080                 return;
1081         }
1082 
1083         cpumask_copy(&mask, cpu_online_mask);
1084         cpumask_clear_cpu(smp_processor_id(), &mask);
1085 
1086         atomic_set(&waiting_for_crash_ipi, num_other_online_cpus());
1087 
1088         pr_crit("SMP: stopping secondary CPUs\n");
1089         smp_cross_call(&mask, IPI_CPU_CRASH_STOP);
1090 
1091         /* Wait up to one second for other CPUs to stop */
1092         timeout = USEC_PER_SEC;
1093         while ((atomic_read(&waiting_for_crash_ipi) > 0) && timeout--)
1094                 udelay(1);
1095 
1096         if (atomic_read(&waiting_for_crash_ipi) > 0)
1097                 pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
1098                         cpumask_pr_args(&mask));
1099 
1100         sdei_mask_local_cpu();
1101 }
1102 
1103 bool smp_crash_stop_failed(void)
1104 {
1105         return (atomic_read(&waiting_for_crash_ipi) > 0);
1106 }
1107 #endif
1108 
1109 /*
1110  * not supported here
1111  */
1112 int setup_profiling_timer(unsigned int multiplier)
1113 {
1114         return -EINVAL;
1115 }
1116 
1117 static bool have_cpu_die(void)
1118 {
1119 #ifdef CONFIG_HOTPLUG_CPU
1120         int any_cpu = raw_smp_processor_id();
1121         const struct cpu_operations *ops = get_cpu_ops(any_cpu);
1122 
1123         if (ops && ops->cpu_die)
1124                 return true;
1125 #endif
1126         return false;
1127 }
1128 
1129 bool cpus_are_stuck_in_kernel(void)
1130 {
1131         bool smp_spin_tables = (num_possible_cpus() > 1 && !have_cpu_die());
1132 
1133         return !!cpus_stuck_in_kernel || smp_spin_tables;
1134 }
1135 

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