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TOMOYO Linux Cross Reference
Linux/arch/arm64/net/bpf_jit_comp.c

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  1 /*
  2  * BPF JIT compiler for ARM64
  3  *
  4  * Copyright (C) 2014-2016 Zi Shen Lim <zlim.lnx@gmail.com>
  5  *
  6  * This program is free software; you can redistribute it and/or modify
  7  * it under the terms of the GNU General Public License version 2 as
  8  * published by the Free Software Foundation.
  9  *
 10  * This program is distributed in the hope that it will be useful,
 11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 13  * GNU General Public License for more details.
 14  *
 15  * You should have received a copy of the GNU General Public License
 16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 17  */
 18 
 19 #define pr_fmt(fmt) "bpf_jit: " fmt
 20 
 21 #include <linux/bpf.h>
 22 #include <linux/filter.h>
 23 #include <linux/printk.h>
 24 #include <linux/skbuff.h>
 25 #include <linux/slab.h>
 26 
 27 #include <asm/byteorder.h>
 28 #include <asm/cacheflush.h>
 29 #include <asm/debug-monitors.h>
 30 #include <asm/set_memory.h>
 31 
 32 #include "bpf_jit.h"
 33 
 34 int bpf_jit_enable __read_mostly;
 35 
 36 #define TMP_REG_1 (MAX_BPF_JIT_REG + 0)
 37 #define TMP_REG_2 (MAX_BPF_JIT_REG + 1)
 38 #define TCALL_CNT (MAX_BPF_JIT_REG + 2)
 39 #define TMP_REG_3 (MAX_BPF_JIT_REG + 3)
 40 
 41 /* Map BPF registers to A64 registers */
 42 static const int bpf2a64[] = {
 43         /* return value from in-kernel function, and exit value from eBPF */
 44         [BPF_REG_0] = A64_R(7),
 45         /* arguments from eBPF program to in-kernel function */
 46         [BPF_REG_1] = A64_R(0),
 47         [BPF_REG_2] = A64_R(1),
 48         [BPF_REG_3] = A64_R(2),
 49         [BPF_REG_4] = A64_R(3),
 50         [BPF_REG_5] = A64_R(4),
 51         /* callee saved registers that in-kernel function will preserve */
 52         [BPF_REG_6] = A64_R(19),
 53         [BPF_REG_7] = A64_R(20),
 54         [BPF_REG_8] = A64_R(21),
 55         [BPF_REG_9] = A64_R(22),
 56         /* read-only frame pointer to access stack */
 57         [BPF_REG_FP] = A64_R(25),
 58         /* temporary registers for internal BPF JIT */
 59         [TMP_REG_1] = A64_R(10),
 60         [TMP_REG_2] = A64_R(11),
 61         [TMP_REG_3] = A64_R(12),
 62         /* tail_call_cnt */
 63         [TCALL_CNT] = A64_R(26),
 64         /* temporary register for blinding constants */
 65         [BPF_REG_AX] = A64_R(9),
 66 };
 67 
 68 struct jit_ctx {
 69         const struct bpf_prog *prog;
 70         int idx;
 71         int epilogue_offset;
 72         int *offset;
 73         __le32 *image;
 74         u32 stack_size;
 75 };
 76 
 77 static inline void emit(const u32 insn, struct jit_ctx *ctx)
 78 {
 79         if (ctx->image != NULL)
 80                 ctx->image[ctx->idx] = cpu_to_le32(insn);
 81 
 82         ctx->idx++;
 83 }
 84 
 85 static inline void emit_a64_mov_i64(const int reg, const u64 val,
 86                                     struct jit_ctx *ctx)
 87 {
 88         u64 tmp = val;
 89         int shift = 0;
 90 
 91         emit(A64_MOVZ(1, reg, tmp & 0xffff, shift), ctx);
 92         tmp >>= 16;
 93         shift += 16;
 94         while (tmp) {
 95                 if (tmp & 0xffff)
 96                         emit(A64_MOVK(1, reg, tmp & 0xffff, shift), ctx);
 97                 tmp >>= 16;
 98                 shift += 16;
 99         }
100 }
101 
102 static inline void emit_a64_mov_i(const int is64, const int reg,
103                                   const s32 val, struct jit_ctx *ctx)
104 {
105         u16 hi = val >> 16;
106         u16 lo = val & 0xffff;
107 
108         if (hi & 0x8000) {
109                 if (hi == 0xffff) {
110                         emit(A64_MOVN(is64, reg, (u16)~lo, 0), ctx);
111                 } else {
112                         emit(A64_MOVN(is64, reg, (u16)~hi, 16), ctx);
113                         emit(A64_MOVK(is64, reg, lo, 0), ctx);
114                 }
115         } else {
116                 emit(A64_MOVZ(is64, reg, lo, 0), ctx);
117                 if (hi)
118                         emit(A64_MOVK(is64, reg, hi, 16), ctx);
119         }
120 }
121 
122 static inline int bpf2a64_offset(int bpf_to, int bpf_from,
123                                  const struct jit_ctx *ctx)
124 {
125         int to = ctx->offset[bpf_to];
126         /* -1 to account for the Branch instruction */
127         int from = ctx->offset[bpf_from] - 1;
128 
129         return to - from;
130 }
131 
132 static void jit_fill_hole(void *area, unsigned int size)
133 {
134         __le32 *ptr;
135         /* We are guaranteed to have aligned memory. */
136         for (ptr = area; size >= sizeof(u32); size -= sizeof(u32))
137                 *ptr++ = cpu_to_le32(AARCH64_BREAK_FAULT);
138 }
139 
140 static inline int epilogue_offset(const struct jit_ctx *ctx)
141 {
142         int to = ctx->epilogue_offset;
143         int from = ctx->idx;
144 
145         return to - from;
146 }
147 
148 /* Stack must be multiples of 16B */
149 #define STACK_ALIGN(sz) (((sz) + 15) & ~15)
150 
151 #define PROLOGUE_OFFSET 8
152 
153 static int build_prologue(struct jit_ctx *ctx)
154 {
155         const struct bpf_prog *prog = ctx->prog;
156         const u8 r6 = bpf2a64[BPF_REG_6];
157         const u8 r7 = bpf2a64[BPF_REG_7];
158         const u8 r8 = bpf2a64[BPF_REG_8];
159         const u8 r9 = bpf2a64[BPF_REG_9];
160         const u8 fp = bpf2a64[BPF_REG_FP];
161         const u8 tcc = bpf2a64[TCALL_CNT];
162         const int idx0 = ctx->idx;
163         int cur_offset;
164 
165         /*
166          * BPF prog stack layout
167          *
168          *                         high
169          * original A64_SP =>   0:+-----+ BPF prologue
170          *                        |FP/LR|
171          * current A64_FP =>  -16:+-----+
172          *                        | ... | callee saved registers
173          * BPF fp register => -64:+-----+ <= (BPF_FP)
174          *                        |     |
175          *                        | ... | BPF prog stack
176          *                        |     |
177          *                        +-----+ <= (BPF_FP - prog->aux->stack_depth)
178          *                        |RSVD | JIT scratchpad
179          * current A64_SP =>      +-----+ <= (BPF_FP - ctx->stack_size)
180          *                        |     |
181          *                        | ... | Function call stack
182          *                        |     |
183          *                        +-----+
184          *                          low
185          *
186          */
187 
188         /* Save FP and LR registers to stay align with ARM64 AAPCS */
189         emit(A64_PUSH(A64_FP, A64_LR, A64_SP), ctx);
190         emit(A64_MOV(1, A64_FP, A64_SP), ctx);
191 
192         /* Save callee-saved registers */
193         emit(A64_PUSH(r6, r7, A64_SP), ctx);
194         emit(A64_PUSH(r8, r9, A64_SP), ctx);
195         emit(A64_PUSH(fp, tcc, A64_SP), ctx);
196 
197         /* Set up BPF prog stack base register */
198         emit(A64_MOV(1, fp, A64_SP), ctx);
199 
200         /* Initialize tail_call_cnt */
201         emit(A64_MOVZ(1, tcc, 0, 0), ctx);
202 
203         /* 4 byte extra for skb_copy_bits buffer */
204         ctx->stack_size = prog->aux->stack_depth + 4;
205         ctx->stack_size = STACK_ALIGN(ctx->stack_size);
206 
207         /* Set up function call stack */
208         emit(A64_SUB_I(1, A64_SP, A64_SP, ctx->stack_size), ctx);
209 
210         cur_offset = ctx->idx - idx0;
211         if (cur_offset != PROLOGUE_OFFSET) {
212                 pr_err_once("PROLOGUE_OFFSET = %d, expected %d!\n",
213                             cur_offset, PROLOGUE_OFFSET);
214                 return -1;
215         }
216         return 0;
217 }
218 
219 static int out_offset = -1; /* initialized on the first pass of build_body() */
220 static int emit_bpf_tail_call(struct jit_ctx *ctx)
221 {
222         /* bpf_tail_call(void *prog_ctx, struct bpf_array *array, u64 index) */
223         const u8 r2 = bpf2a64[BPF_REG_2];
224         const u8 r3 = bpf2a64[BPF_REG_3];
225 
226         const u8 tmp = bpf2a64[TMP_REG_1];
227         const u8 prg = bpf2a64[TMP_REG_2];
228         const u8 tcc = bpf2a64[TCALL_CNT];
229         const int idx0 = ctx->idx;
230 #define cur_offset (ctx->idx - idx0)
231 #define jmp_offset (out_offset - (cur_offset))
232         size_t off;
233 
234         /* if (index >= array->map.max_entries)
235          *     goto out;
236          */
237         off = offsetof(struct bpf_array, map.max_entries);
238         emit_a64_mov_i64(tmp, off, ctx);
239         emit(A64_LDR32(tmp, r2, tmp), ctx);
240         emit(A64_CMP(0, r3, tmp), ctx);
241         emit(A64_B_(A64_COND_GE, jmp_offset), ctx);
242 
243         /* if (tail_call_cnt > MAX_TAIL_CALL_CNT)
244          *     goto out;
245          * tail_call_cnt++;
246          */
247         emit_a64_mov_i64(tmp, MAX_TAIL_CALL_CNT, ctx);
248         emit(A64_CMP(1, tcc, tmp), ctx);
249         emit(A64_B_(A64_COND_GT, jmp_offset), ctx);
250         emit(A64_ADD_I(1, tcc, tcc, 1), ctx);
251 
252         /* prog = array->ptrs[index];
253          * if (prog == NULL)
254          *     goto out;
255          */
256         off = offsetof(struct bpf_array, ptrs);
257         emit_a64_mov_i64(tmp, off, ctx);
258         emit(A64_ADD(1, tmp, r2, tmp), ctx);
259         emit(A64_LSL(1, prg, r3, 3), ctx);
260         emit(A64_LDR64(prg, tmp, prg), ctx);
261         emit(A64_CBZ(1, prg, jmp_offset), ctx);
262 
263         /* goto *(prog->bpf_func + prologue_size); */
264         off = offsetof(struct bpf_prog, bpf_func);
265         emit_a64_mov_i64(tmp, off, ctx);
266         emit(A64_LDR64(tmp, prg, tmp), ctx);
267         emit(A64_ADD_I(1, tmp, tmp, sizeof(u32) * PROLOGUE_OFFSET), ctx);
268         emit(A64_BR(tmp), ctx);
269 
270         /* out: */
271         if (out_offset == -1)
272                 out_offset = cur_offset;
273         if (cur_offset != out_offset) {
274                 pr_err_once("tail_call out_offset = %d, expected %d!\n",
275                             cur_offset, out_offset);
276                 return -1;
277         }
278         return 0;
279 #undef cur_offset
280 #undef jmp_offset
281 }
282 
283 static void build_epilogue(struct jit_ctx *ctx)
284 {
285         const u8 r0 = bpf2a64[BPF_REG_0];
286         const u8 r6 = bpf2a64[BPF_REG_6];
287         const u8 r7 = bpf2a64[BPF_REG_7];
288         const u8 r8 = bpf2a64[BPF_REG_8];
289         const u8 r9 = bpf2a64[BPF_REG_9];
290         const u8 fp = bpf2a64[BPF_REG_FP];
291 
292         /* We're done with BPF stack */
293         emit(A64_ADD_I(1, A64_SP, A64_SP, ctx->stack_size), ctx);
294 
295         /* Restore fs (x25) and x26 */
296         emit(A64_POP(fp, A64_R(26), A64_SP), ctx);
297 
298         /* Restore callee-saved register */
299         emit(A64_POP(r8, r9, A64_SP), ctx);
300         emit(A64_POP(r6, r7, A64_SP), ctx);
301 
302         /* Restore FP/LR registers */
303         emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);
304 
305         /* Set return value */
306         emit(A64_MOV(1, A64_R(0), r0), ctx);
307 
308         emit(A64_RET(A64_LR), ctx);
309 }
310 
311 /* JITs an eBPF instruction.
312  * Returns:
313  * 0  - successfully JITed an 8-byte eBPF instruction.
314  * >0 - successfully JITed a 16-byte eBPF instruction.
315  * <0 - failed to JIT.
316  */
317 static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
318 {
319         const u8 code = insn->code;
320         const u8 dst = bpf2a64[insn->dst_reg];
321         const u8 src = bpf2a64[insn->src_reg];
322         const u8 tmp = bpf2a64[TMP_REG_1];
323         const u8 tmp2 = bpf2a64[TMP_REG_2];
324         const u8 tmp3 = bpf2a64[TMP_REG_3];
325         const s16 off = insn->off;
326         const s32 imm = insn->imm;
327         const int i = insn - ctx->prog->insnsi;
328         const bool is64 = BPF_CLASS(code) == BPF_ALU64;
329         const bool isdw = BPF_SIZE(code) == BPF_DW;
330         u8 jmp_cond;
331         s32 jmp_offset;
332 
333 #define check_imm(bits, imm) do {                               \
334         if ((((imm) > 0) && ((imm) >> (bits))) ||               \
335             (((imm) < 0) && (~(imm) >> (bits)))) {              \
336                 pr_info("[%2d] imm=%d(0x%x) out of range\n",    \
337                         i, imm, imm);                           \
338                 return -EINVAL;                                 \
339         }                                                       \
340 } while (0)
341 #define check_imm19(imm) check_imm(19, imm)
342 #define check_imm26(imm) check_imm(26, imm)
343 
344         switch (code) {
345         /* dst = src */
346         case BPF_ALU | BPF_MOV | BPF_X:
347         case BPF_ALU64 | BPF_MOV | BPF_X:
348                 emit(A64_MOV(is64, dst, src), ctx);
349                 break;
350         /* dst = dst OP src */
351         case BPF_ALU | BPF_ADD | BPF_X:
352         case BPF_ALU64 | BPF_ADD | BPF_X:
353                 emit(A64_ADD(is64, dst, dst, src), ctx);
354                 break;
355         case BPF_ALU | BPF_SUB | BPF_X:
356         case BPF_ALU64 | BPF_SUB | BPF_X:
357                 emit(A64_SUB(is64, dst, dst, src), ctx);
358                 break;
359         case BPF_ALU | BPF_AND | BPF_X:
360         case BPF_ALU64 | BPF_AND | BPF_X:
361                 emit(A64_AND(is64, dst, dst, src), ctx);
362                 break;
363         case BPF_ALU | BPF_OR | BPF_X:
364         case BPF_ALU64 | BPF_OR | BPF_X:
365                 emit(A64_ORR(is64, dst, dst, src), ctx);
366                 break;
367         case BPF_ALU | BPF_XOR | BPF_X:
368         case BPF_ALU64 | BPF_XOR | BPF_X:
369                 emit(A64_EOR(is64, dst, dst, src), ctx);
370                 break;
371         case BPF_ALU | BPF_MUL | BPF_X:
372         case BPF_ALU64 | BPF_MUL | BPF_X:
373                 emit(A64_MUL(is64, dst, dst, src), ctx);
374                 break;
375         case BPF_ALU | BPF_DIV | BPF_X:
376         case BPF_ALU64 | BPF_DIV | BPF_X:
377         case BPF_ALU | BPF_MOD | BPF_X:
378         case BPF_ALU64 | BPF_MOD | BPF_X:
379         {
380                 const u8 r0 = bpf2a64[BPF_REG_0];
381 
382                 /* if (src == 0) return 0 */
383                 jmp_offset = 3; /* skip ahead to else path */
384                 check_imm19(jmp_offset);
385                 emit(A64_CBNZ(is64, src, jmp_offset), ctx);
386                 emit(A64_MOVZ(1, r0, 0, 0), ctx);
387                 jmp_offset = epilogue_offset(ctx);
388                 check_imm26(jmp_offset);
389                 emit(A64_B(jmp_offset), ctx);
390                 /* else */
391                 switch (BPF_OP(code)) {
392                 case BPF_DIV:
393                         emit(A64_UDIV(is64, dst, dst, src), ctx);
394                         break;
395                 case BPF_MOD:
396                         emit(A64_UDIV(is64, tmp, dst, src), ctx);
397                         emit(A64_MUL(is64, tmp, tmp, src), ctx);
398                         emit(A64_SUB(is64, dst, dst, tmp), ctx);
399                         break;
400                 }
401                 break;
402         }
403         case BPF_ALU | BPF_LSH | BPF_X:
404         case BPF_ALU64 | BPF_LSH | BPF_X:
405                 emit(A64_LSLV(is64, dst, dst, src), ctx);
406                 break;
407         case BPF_ALU | BPF_RSH | BPF_X:
408         case BPF_ALU64 | BPF_RSH | BPF_X:
409                 emit(A64_LSRV(is64, dst, dst, src), ctx);
410                 break;
411         case BPF_ALU | BPF_ARSH | BPF_X:
412         case BPF_ALU64 | BPF_ARSH | BPF_X:
413                 emit(A64_ASRV(is64, dst, dst, src), ctx);
414                 break;
415         /* dst = -dst */
416         case BPF_ALU | BPF_NEG:
417         case BPF_ALU64 | BPF_NEG:
418                 emit(A64_NEG(is64, dst, dst), ctx);
419                 break;
420         /* dst = BSWAP##imm(dst) */
421         case BPF_ALU | BPF_END | BPF_FROM_LE:
422         case BPF_ALU | BPF_END | BPF_FROM_BE:
423 #ifdef CONFIG_CPU_BIG_ENDIAN
424                 if (BPF_SRC(code) == BPF_FROM_BE)
425                         goto emit_bswap_uxt;
426 #else /* !CONFIG_CPU_BIG_ENDIAN */
427                 if (BPF_SRC(code) == BPF_FROM_LE)
428                         goto emit_bswap_uxt;
429 #endif
430                 switch (imm) {
431                 case 16:
432                         emit(A64_REV16(is64, dst, dst), ctx);
433                         /* zero-extend 16 bits into 64 bits */
434                         emit(A64_UXTH(is64, dst, dst), ctx);
435                         break;
436                 case 32:
437                         emit(A64_REV32(is64, dst, dst), ctx);
438                         /* upper 32 bits already cleared */
439                         break;
440                 case 64:
441                         emit(A64_REV64(dst, dst), ctx);
442                         break;
443                 }
444                 break;
445 emit_bswap_uxt:
446                 switch (imm) {
447                 case 16:
448                         /* zero-extend 16 bits into 64 bits */
449                         emit(A64_UXTH(is64, dst, dst), ctx);
450                         break;
451                 case 32:
452                         /* zero-extend 32 bits into 64 bits */
453                         emit(A64_UXTW(is64, dst, dst), ctx);
454                         break;
455                 case 64:
456                         /* nop */
457                         break;
458                 }
459                 break;
460         /* dst = imm */
461         case BPF_ALU | BPF_MOV | BPF_K:
462         case BPF_ALU64 | BPF_MOV | BPF_K:
463                 emit_a64_mov_i(is64, dst, imm, ctx);
464                 break;
465         /* dst = dst OP imm */
466         case BPF_ALU | BPF_ADD | BPF_K:
467         case BPF_ALU64 | BPF_ADD | BPF_K:
468                 emit_a64_mov_i(is64, tmp, imm, ctx);
469                 emit(A64_ADD(is64, dst, dst, tmp), ctx);
470                 break;
471         case BPF_ALU | BPF_SUB | BPF_K:
472         case BPF_ALU64 | BPF_SUB | BPF_K:
473                 emit_a64_mov_i(is64, tmp, imm, ctx);
474                 emit(A64_SUB(is64, dst, dst, tmp), ctx);
475                 break;
476         case BPF_ALU | BPF_AND | BPF_K:
477         case BPF_ALU64 | BPF_AND | BPF_K:
478                 emit_a64_mov_i(is64, tmp, imm, ctx);
479                 emit(A64_AND(is64, dst, dst, tmp), ctx);
480                 break;
481         case BPF_ALU | BPF_OR | BPF_K:
482         case BPF_ALU64 | BPF_OR | BPF_K:
483                 emit_a64_mov_i(is64, tmp, imm, ctx);
484                 emit(A64_ORR(is64, dst, dst, tmp), ctx);
485                 break;
486         case BPF_ALU | BPF_XOR | BPF_K:
487         case BPF_ALU64 | BPF_XOR | BPF_K:
488                 emit_a64_mov_i(is64, tmp, imm, ctx);
489                 emit(A64_EOR(is64, dst, dst, tmp), ctx);
490                 break;
491         case BPF_ALU | BPF_MUL | BPF_K:
492         case BPF_ALU64 | BPF_MUL | BPF_K:
493                 emit_a64_mov_i(is64, tmp, imm, ctx);
494                 emit(A64_MUL(is64, dst, dst, tmp), ctx);
495                 break;
496         case BPF_ALU | BPF_DIV | BPF_K:
497         case BPF_ALU64 | BPF_DIV | BPF_K:
498                 emit_a64_mov_i(is64, tmp, imm, ctx);
499                 emit(A64_UDIV(is64, dst, dst, tmp), ctx);
500                 break;
501         case BPF_ALU | BPF_MOD | BPF_K:
502         case BPF_ALU64 | BPF_MOD | BPF_K:
503                 emit_a64_mov_i(is64, tmp2, imm, ctx);
504                 emit(A64_UDIV(is64, tmp, dst, tmp2), ctx);
505                 emit(A64_MUL(is64, tmp, tmp, tmp2), ctx);
506                 emit(A64_SUB(is64, dst, dst, tmp), ctx);
507                 break;
508         case BPF_ALU | BPF_LSH | BPF_K:
509         case BPF_ALU64 | BPF_LSH | BPF_K:
510                 emit(A64_LSL(is64, dst, dst, imm), ctx);
511                 break;
512         case BPF_ALU | BPF_RSH | BPF_K:
513         case BPF_ALU64 | BPF_RSH | BPF_K:
514                 emit(A64_LSR(is64, dst, dst, imm), ctx);
515                 break;
516         case BPF_ALU | BPF_ARSH | BPF_K:
517         case BPF_ALU64 | BPF_ARSH | BPF_K:
518                 emit(A64_ASR(is64, dst, dst, imm), ctx);
519                 break;
520 
521         /* JUMP off */
522         case BPF_JMP | BPF_JA:
523                 jmp_offset = bpf2a64_offset(i + off, i, ctx);
524                 check_imm26(jmp_offset);
525                 emit(A64_B(jmp_offset), ctx);
526                 break;
527         /* IF (dst COND src) JUMP off */
528         case BPF_JMP | BPF_JEQ | BPF_X:
529         case BPF_JMP | BPF_JGT | BPF_X:
530         case BPF_JMP | BPF_JLT | BPF_X:
531         case BPF_JMP | BPF_JGE | BPF_X:
532         case BPF_JMP | BPF_JLE | BPF_X:
533         case BPF_JMP | BPF_JNE | BPF_X:
534         case BPF_JMP | BPF_JSGT | BPF_X:
535         case BPF_JMP | BPF_JSLT | BPF_X:
536         case BPF_JMP | BPF_JSGE | BPF_X:
537         case BPF_JMP | BPF_JSLE | BPF_X:
538                 emit(A64_CMP(1, dst, src), ctx);
539 emit_cond_jmp:
540                 jmp_offset = bpf2a64_offset(i + off, i, ctx);
541                 check_imm19(jmp_offset);
542                 switch (BPF_OP(code)) {
543                 case BPF_JEQ:
544                         jmp_cond = A64_COND_EQ;
545                         break;
546                 case BPF_JGT:
547                         jmp_cond = A64_COND_HI;
548                         break;
549                 case BPF_JLT:
550                         jmp_cond = A64_COND_CC;
551                         break;
552                 case BPF_JGE:
553                         jmp_cond = A64_COND_CS;
554                         break;
555                 case BPF_JLE:
556                         jmp_cond = A64_COND_LS;
557                         break;
558                 case BPF_JSET:
559                 case BPF_JNE:
560                         jmp_cond = A64_COND_NE;
561                         break;
562                 case BPF_JSGT:
563                         jmp_cond = A64_COND_GT;
564                         break;
565                 case BPF_JSLT:
566                         jmp_cond = A64_COND_LT;
567                         break;
568                 case BPF_JSGE:
569                         jmp_cond = A64_COND_GE;
570                         break;
571                 case BPF_JSLE:
572                         jmp_cond = A64_COND_LE;
573                         break;
574                 default:
575                         return -EFAULT;
576                 }
577                 emit(A64_B_(jmp_cond, jmp_offset), ctx);
578                 break;
579         case BPF_JMP | BPF_JSET | BPF_X:
580                 emit(A64_TST(1, dst, src), ctx);
581                 goto emit_cond_jmp;
582         /* IF (dst COND imm) JUMP off */
583         case BPF_JMP | BPF_JEQ | BPF_K:
584         case BPF_JMP | BPF_JGT | BPF_K:
585         case BPF_JMP | BPF_JLT | BPF_K:
586         case BPF_JMP | BPF_JGE | BPF_K:
587         case BPF_JMP | BPF_JLE | BPF_K:
588         case BPF_JMP | BPF_JNE | BPF_K:
589         case BPF_JMP | BPF_JSGT | BPF_K:
590         case BPF_JMP | BPF_JSLT | BPF_K:
591         case BPF_JMP | BPF_JSGE | BPF_K:
592         case BPF_JMP | BPF_JSLE | BPF_K:
593                 emit_a64_mov_i(1, tmp, imm, ctx);
594                 emit(A64_CMP(1, dst, tmp), ctx);
595                 goto emit_cond_jmp;
596         case BPF_JMP | BPF_JSET | BPF_K:
597                 emit_a64_mov_i(1, tmp, imm, ctx);
598                 emit(A64_TST(1, dst, tmp), ctx);
599                 goto emit_cond_jmp;
600         /* function call */
601         case BPF_JMP | BPF_CALL:
602         {
603                 const u8 r0 = bpf2a64[BPF_REG_0];
604                 const u64 func = (u64)__bpf_call_base + imm;
605 
606                 emit_a64_mov_i64(tmp, func, ctx);
607                 emit(A64_BLR(tmp), ctx);
608                 emit(A64_MOV(1, r0, A64_R(0)), ctx);
609                 break;
610         }
611         /* tail call */
612         case BPF_JMP | BPF_TAIL_CALL:
613                 if (emit_bpf_tail_call(ctx))
614                         return -EFAULT;
615                 break;
616         /* function return */
617         case BPF_JMP | BPF_EXIT:
618                 /* Optimization: when last instruction is EXIT,
619                    simply fallthrough to epilogue. */
620                 if (i == ctx->prog->len - 1)
621                         break;
622                 jmp_offset = epilogue_offset(ctx);
623                 check_imm26(jmp_offset);
624                 emit(A64_B(jmp_offset), ctx);
625                 break;
626 
627         /* dst = imm64 */
628         case BPF_LD | BPF_IMM | BPF_DW:
629         {
630                 const struct bpf_insn insn1 = insn[1];
631                 u64 imm64;
632 
633                 imm64 = (u64)insn1.imm << 32 | (u32)imm;
634                 emit_a64_mov_i64(dst, imm64, ctx);
635 
636                 return 1;
637         }
638 
639         /* LDX: dst = *(size *)(src + off) */
640         case BPF_LDX | BPF_MEM | BPF_W:
641         case BPF_LDX | BPF_MEM | BPF_H:
642         case BPF_LDX | BPF_MEM | BPF_B:
643         case BPF_LDX | BPF_MEM | BPF_DW:
644                 emit_a64_mov_i(1, tmp, off, ctx);
645                 switch (BPF_SIZE(code)) {
646                 case BPF_W:
647                         emit(A64_LDR32(dst, src, tmp), ctx);
648                         break;
649                 case BPF_H:
650                         emit(A64_LDRH(dst, src, tmp), ctx);
651                         break;
652                 case BPF_B:
653                         emit(A64_LDRB(dst, src, tmp), ctx);
654                         break;
655                 case BPF_DW:
656                         emit(A64_LDR64(dst, src, tmp), ctx);
657                         break;
658                 }
659                 break;
660 
661         /* ST: *(size *)(dst + off) = imm */
662         case BPF_ST | BPF_MEM | BPF_W:
663         case BPF_ST | BPF_MEM | BPF_H:
664         case BPF_ST | BPF_MEM | BPF_B:
665         case BPF_ST | BPF_MEM | BPF_DW:
666                 /* Load imm to a register then store it */
667                 emit_a64_mov_i(1, tmp2, off, ctx);
668                 emit_a64_mov_i(1, tmp, imm, ctx);
669                 switch (BPF_SIZE(code)) {
670                 case BPF_W:
671                         emit(A64_STR32(tmp, dst, tmp2), ctx);
672                         break;
673                 case BPF_H:
674                         emit(A64_STRH(tmp, dst, tmp2), ctx);
675                         break;
676                 case BPF_B:
677                         emit(A64_STRB(tmp, dst, tmp2), ctx);
678                         break;
679                 case BPF_DW:
680                         emit(A64_STR64(tmp, dst, tmp2), ctx);
681                         break;
682                 }
683                 break;
684 
685         /* STX: *(size *)(dst + off) = src */
686         case BPF_STX | BPF_MEM | BPF_W:
687         case BPF_STX | BPF_MEM | BPF_H:
688         case BPF_STX | BPF_MEM | BPF_B:
689         case BPF_STX | BPF_MEM | BPF_DW:
690                 emit_a64_mov_i(1, tmp, off, ctx);
691                 switch (BPF_SIZE(code)) {
692                 case BPF_W:
693                         emit(A64_STR32(src, dst, tmp), ctx);
694                         break;
695                 case BPF_H:
696                         emit(A64_STRH(src, dst, tmp), ctx);
697                         break;
698                 case BPF_B:
699                         emit(A64_STRB(src, dst, tmp), ctx);
700                         break;
701                 case BPF_DW:
702                         emit(A64_STR64(src, dst, tmp), ctx);
703                         break;
704                 }
705                 break;
706         /* STX XADD: lock *(u32 *)(dst + off) += src */
707         case BPF_STX | BPF_XADD | BPF_W:
708         /* STX XADD: lock *(u64 *)(dst + off) += src */
709         case BPF_STX | BPF_XADD | BPF_DW:
710                 emit_a64_mov_i(1, tmp, off, ctx);
711                 emit(A64_ADD(1, tmp, tmp, dst), ctx);
712                 emit(A64_PRFM(tmp, PST, L1, STRM), ctx);
713                 emit(A64_LDXR(isdw, tmp2, tmp), ctx);
714                 emit(A64_ADD(isdw, tmp2, tmp2, src), ctx);
715                 emit(A64_STXR(isdw, tmp2, tmp, tmp3), ctx);
716                 jmp_offset = -3;
717                 check_imm19(jmp_offset);
718                 emit(A64_CBNZ(0, tmp3, jmp_offset), ctx);
719                 break;
720 
721         /* R0 = ntohx(*(size *)(((struct sk_buff *)R6)->data + imm)) */
722         case BPF_LD | BPF_ABS | BPF_W:
723         case BPF_LD | BPF_ABS | BPF_H:
724         case BPF_LD | BPF_ABS | BPF_B:
725         /* R0 = ntohx(*(size *)(((struct sk_buff *)R6)->data + src + imm)) */
726         case BPF_LD | BPF_IND | BPF_W:
727         case BPF_LD | BPF_IND | BPF_H:
728         case BPF_LD | BPF_IND | BPF_B:
729         {
730                 const u8 r0 = bpf2a64[BPF_REG_0]; /* r0 = return value */
731                 const u8 r6 = bpf2a64[BPF_REG_6]; /* r6 = pointer to sk_buff */
732                 const u8 fp = bpf2a64[BPF_REG_FP];
733                 const u8 r1 = bpf2a64[BPF_REG_1]; /* r1: struct sk_buff *skb */
734                 const u8 r2 = bpf2a64[BPF_REG_2]; /* r2: int k */
735                 const u8 r3 = bpf2a64[BPF_REG_3]; /* r3: unsigned int size */
736                 const u8 r4 = bpf2a64[BPF_REG_4]; /* r4: void *buffer */
737                 const u8 r5 = bpf2a64[BPF_REG_5]; /* r5: void *(*func)(...) */
738                 int size;
739 
740                 emit(A64_MOV(1, r1, r6), ctx);
741                 emit_a64_mov_i(0, r2, imm, ctx);
742                 if (BPF_MODE(code) == BPF_IND)
743                         emit(A64_ADD(0, r2, r2, src), ctx);
744                 switch (BPF_SIZE(code)) {
745                 case BPF_W:
746                         size = 4;
747                         break;
748                 case BPF_H:
749                         size = 2;
750                         break;
751                 case BPF_B:
752                         size = 1;
753                         break;
754                 default:
755                         return -EINVAL;
756                 }
757                 emit_a64_mov_i64(r3, size, ctx);
758                 emit(A64_SUB_I(1, r4, fp, ctx->stack_size), ctx);
759                 emit_a64_mov_i64(r5, (unsigned long)bpf_load_pointer, ctx);
760                 emit(A64_BLR(r5), ctx);
761                 emit(A64_MOV(1, r0, A64_R(0)), ctx);
762 
763                 jmp_offset = epilogue_offset(ctx);
764                 check_imm19(jmp_offset);
765                 emit(A64_CBZ(1, r0, jmp_offset), ctx);
766                 emit(A64_MOV(1, r5, r0), ctx);
767                 switch (BPF_SIZE(code)) {
768                 case BPF_W:
769                         emit(A64_LDR32(r0, r5, A64_ZR), ctx);
770 #ifndef CONFIG_CPU_BIG_ENDIAN
771                         emit(A64_REV32(0, r0, r0), ctx);
772 #endif
773                         break;
774                 case BPF_H:
775                         emit(A64_LDRH(r0, r5, A64_ZR), ctx);
776 #ifndef CONFIG_CPU_BIG_ENDIAN
777                         emit(A64_REV16(0, r0, r0), ctx);
778 #endif
779                         break;
780                 case BPF_B:
781                         emit(A64_LDRB(r0, r5, A64_ZR), ctx);
782                         break;
783                 }
784                 break;
785         }
786         default:
787                 pr_err_once("unknown opcode %02x\n", code);
788                 return -EINVAL;
789         }
790 
791         return 0;
792 }
793 
794 static int build_body(struct jit_ctx *ctx)
795 {
796         const struct bpf_prog *prog = ctx->prog;
797         int i;
798 
799         for (i = 0; i < prog->len; i++) {
800                 const struct bpf_insn *insn = &prog->insnsi[i];
801                 int ret;
802 
803                 ret = build_insn(insn, ctx);
804                 if (ret > 0) {
805                         i++;
806                         if (ctx->image == NULL)
807                                 ctx->offset[i] = ctx->idx;
808                         continue;
809                 }
810                 if (ctx->image == NULL)
811                         ctx->offset[i] = ctx->idx;
812                 if (ret)
813                         return ret;
814         }
815 
816         return 0;
817 }
818 
819 static int validate_code(struct jit_ctx *ctx)
820 {
821         int i;
822 
823         for (i = 0; i < ctx->idx; i++) {
824                 u32 a64_insn = le32_to_cpu(ctx->image[i]);
825 
826                 if (a64_insn == AARCH64_BREAK_FAULT)
827                         return -1;
828         }
829 
830         return 0;
831 }
832 
833 static inline void bpf_flush_icache(void *start, void *end)
834 {
835         flush_icache_range((unsigned long)start, (unsigned long)end);
836 }
837 
838 struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
839 {
840         struct bpf_prog *tmp, *orig_prog = prog;
841         struct bpf_binary_header *header;
842         bool tmp_blinded = false;
843         struct jit_ctx ctx;
844         int image_size;
845         u8 *image_ptr;
846 
847         if (!bpf_jit_enable)
848                 return orig_prog;
849 
850         tmp = bpf_jit_blind_constants(prog);
851         /* If blinding was requested and we failed during blinding,
852          * we must fall back to the interpreter.
853          */
854         if (IS_ERR(tmp))
855                 return orig_prog;
856         if (tmp != prog) {
857                 tmp_blinded = true;
858                 prog = tmp;
859         }
860 
861         memset(&ctx, 0, sizeof(ctx));
862         ctx.prog = prog;
863 
864         ctx.offset = kcalloc(prog->len, sizeof(int), GFP_KERNEL);
865         if (ctx.offset == NULL) {
866                 prog = orig_prog;
867                 goto out;
868         }
869 
870         /* 1. Initial fake pass to compute ctx->idx. */
871 
872         /* Fake pass to fill in ctx->offset. */
873         if (build_body(&ctx)) {
874                 prog = orig_prog;
875                 goto out_off;
876         }
877 
878         if (build_prologue(&ctx)) {
879                 prog = orig_prog;
880                 goto out_off;
881         }
882 
883         ctx.epilogue_offset = ctx.idx;
884         build_epilogue(&ctx);
885 
886         /* Now we know the actual image size. */
887         image_size = sizeof(u32) * ctx.idx;
888         header = bpf_jit_binary_alloc(image_size, &image_ptr,
889                                       sizeof(u32), jit_fill_hole);
890         if (header == NULL) {
891                 prog = orig_prog;
892                 goto out_off;
893         }
894 
895         /* 2. Now, the actual pass. */
896 
897         ctx.image = (__le32 *)image_ptr;
898         ctx.idx = 0;
899 
900         build_prologue(&ctx);
901 
902         if (build_body(&ctx)) {
903                 bpf_jit_binary_free(header);
904                 prog = orig_prog;
905                 goto out_off;
906         }
907 
908         build_epilogue(&ctx);
909 
910         /* 3. Extra pass to validate JITed code. */
911         if (validate_code(&ctx)) {
912                 bpf_jit_binary_free(header);
913                 prog = orig_prog;
914                 goto out_off;
915         }
916 
917         /* And we're done. */
918         if (bpf_jit_enable > 1)
919                 bpf_jit_dump(prog->len, image_size, 2, ctx.image);
920 
921         bpf_flush_icache(header, ctx.image + ctx.idx);
922 
923         bpf_jit_binary_lock_ro(header);
924         prog->bpf_func = (void *)ctx.image;
925         prog->jited = 1;
926         prog->jited_len = image_size;
927 
928 out_off:
929         kfree(ctx.offset);
930 out:
931         if (tmp_blinded)
932                 bpf_jit_prog_release_other(prog, prog == orig_prog ?
933                                            tmp : orig_prog);
934         return prog;
935 }
936 

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