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Linux/arch/avr32/boards/atngw100/setup.c

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  1 /*
  2  * Board-specific setup code for the ATNGW100 Network Gateway
  3  *
  4  * Copyright (C) 2005-2006 Atmel Corporation
  5  *
  6  * This program is free software; you can redistribute it and/or modify
  7  * it under the terms of the GNU General Public License version 2 as
  8  * published by the Free Software Foundation.
  9  */
 10 #include <linux/clk.h>
 11 #include <linux/etherdevice.h>
 12 #include <linux/gpio.h>
 13 #include <linux/irq.h>
 14 #include <linux/i2c.h>
 15 #include <linux/i2c-gpio.h>
 16 #include <linux/init.h>
 17 #include <linux/linkage.h>
 18 #include <linux/platform_device.h>
 19 #include <linux/types.h>
 20 #include <linux/leds.h>
 21 #include <linux/spi/spi.h>
 22 #include <linux/atmel-mci.h>
 23 #include <linux/usb/atmel_usba_udc.h>
 24 
 25 #include <asm/io.h>
 26 #include <asm/setup.h>
 27 
 28 #include <mach/at32ap700x.h>
 29 #include <mach/board.h>
 30 #include <mach/init.h>
 31 #include <mach/portmux.h>
 32 
 33 /* Oscillator frequencies. These are board-specific */
 34 unsigned long at32_board_osc_rates[3] = {
 35         [0] = 32768,    /* 32.768 kHz on RTC osc */
 36         [1] = 20000000, /* 20 MHz on osc0 */
 37         [2] = 12000000, /* 12 MHz on osc1 */
 38 };
 39 
 40 /*
 41  * The ATNGW100 mkII is very similar to the ATNGW100. Both have the AT32AP7000
 42  * chip on board; the difference is that the ATNGW100 mkII has 128 MB 32-bit
 43  * SDRAM (the ATNGW100 has 32 MB 16-bit SDRAM) and 256 MB 16-bit NAND flash
 44  * (the ATNGW100 has none.)
 45  *
 46  * The RAM difference is handled by the boot loader, so the only difference we
 47  * end up handling here is the NAND flash, EBI pin reservation and if LCDC or
 48  * MACB1 should be enabled.
 49  */
 50 #ifdef CONFIG_BOARD_ATNGW100_MKII
 51 #include <linux/mtd/partitions.h>
 52 #include <mach/smc.h>
 53 
 54 static struct smc_timing nand_timing __initdata = {
 55         .ncs_read_setup         = 0,
 56         .nrd_setup              = 10,
 57         .ncs_write_setup        = 0,
 58         .nwe_setup              = 10,
 59 
 60         .ncs_read_pulse         = 30,
 61         .nrd_pulse              = 15,
 62         .ncs_write_pulse        = 30,
 63         .nwe_pulse              = 15,
 64 
 65         .read_cycle             = 30,
 66         .write_cycle            = 30,
 67 
 68         .ncs_read_recover       = 0,
 69         .nrd_recover            = 15,
 70         .ncs_write_recover      = 0,
 71         /* WE# high -> RE# low min 60 ns */
 72         .nwe_recover            = 50,
 73 };
 74 
 75 static struct smc_config nand_config __initdata = {
 76         .bus_width              = 2,
 77         .nrd_controlled         = 1,
 78         .nwe_controlled         = 1,
 79         .nwait_mode             = 0,
 80         .byte_write             = 0,
 81         .tdf_cycles             = 2,
 82         .tdf_mode               = 0,
 83 };
 84 
 85 static struct mtd_partition nand_partitions[] = {
 86         {
 87                 .name           = "main",
 88                 .offset         = 0x00000000,
 89                 .size           = MTDPART_SIZ_FULL,
 90         },
 91 };
 92 
 93 
 94 static struct atmel_nand_data atngw100mkii_nand_data __initdata = {
 95         .cle            = 21,
 96         .ale            = 22,
 97         .rdy_pin        = GPIO_PIN_PB(28),
 98         .enable_pin     = GPIO_PIN_PE(23),
 99         .bus_width_16   = true,
100         .ecc_mode       = NAND_ECC_SOFT,
101         .parts          = nand_partitions,
102         .num_parts      = ARRAY_SIZE(nand_partitions),
103 };
104 #endif
105 
106 /* Initialized by bootloader-specific startup code. */
107 struct tag *bootloader_tags __initdata;
108 
109 struct eth_addr {
110         u8 addr[6];
111 };
112 static struct eth_addr __initdata hw_addr[2];
113 static struct macb_platform_data __initdata eth_data[2];
114 
115 static struct spi_board_info spi0_board_info[] __initdata = {
116         {
117                 .modalias       = "mtd_dataflash",
118                 .max_speed_hz   = 8000000,
119                 .chip_select    = 0,
120         },
121 };
122 
123 static struct mci_platform_data __initdata mci0_data = {
124         .slot[0] = {
125                 .bus_width      = 4,
126 #if defined(CONFIG_BOARD_ATNGW100_MKII)
127                 .detect_pin     = GPIO_PIN_PC(25),
128                 .wp_pin         = GPIO_PIN_PE(22),
129 #else
130                 .detect_pin     = GPIO_PIN_PC(25),
131                 .wp_pin         = GPIO_PIN_PE(0),
132 #endif
133         },
134 };
135 
136 static struct usba_platform_data atngw100_usba_data __initdata = {
137 #if defined(CONFIG_BOARD_ATNGW100_MKII)
138         .vbus_pin       = GPIO_PIN_PE(26),
139 #else
140         .vbus_pin       = -ENODEV,
141 #endif
142 };
143 
144 /*
145  * The next two functions should go away as the boot loader is
146  * supposed to initialize the macb address registers with a valid
147  * ethernet address. But we need to keep it around for a while until
148  * we can be reasonably sure the boot loader does this.
149  *
150  * The phy_id is ignored as the driver will probe for it.
151  */
152 static int __init parse_tag_ethernet(struct tag *tag)
153 {
154         int i;
155 
156         i = tag->u.ethernet.mac_index;
157         if (i < ARRAY_SIZE(hw_addr))
158                 memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
159                        sizeof(hw_addr[i].addr));
160 
161         return 0;
162 }
163 __tagtable(ATAG_ETHERNET, parse_tag_ethernet);
164 
165 static void __init set_hw_addr(struct platform_device *pdev)
166 {
167         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
168         const u8 *addr;
169         void __iomem *regs;
170         struct clk *pclk;
171 
172         if (!res)
173                 return;
174         if (pdev->id >= ARRAY_SIZE(hw_addr))
175                 return;
176 
177         addr = hw_addr[pdev->id].addr;
178         if (!is_valid_ether_addr(addr))
179                 return;
180 
181         /*
182          * Since this is board-specific code, we'll cheat and use the
183          * physical address directly as we happen to know that it's
184          * the same as the virtual address.
185          */
186         regs = (void __iomem __force *)res->start;
187         pclk = clk_get(&pdev->dev, "pclk");
188         if (IS_ERR(pclk))
189                 return;
190 
191         clk_enable(pclk);
192         __raw_writel((addr[3] << 24) | (addr[2] << 16)
193                      | (addr[1] << 8) | addr[0], regs + 0x98);
194         __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
195         clk_disable(pclk);
196         clk_put(pclk);
197 }
198 
199 void __init setup_board(void)
200 {
201         at32_map_usart(1, 0, 0);        /* USART 1: /dev/ttyS0, DB9 */
202         at32_setup_serial_console(0);
203 }
204 
205 static const struct gpio_led ngw_leds[] = {
206         { .name = "sys", .gpio = GPIO_PIN_PA(16), .active_low = 1,
207                 .default_trigger = "heartbeat",
208         },
209         { .name = "a", .gpio = GPIO_PIN_PA(19), .active_low = 1, },
210         { .name = "b", .gpio = GPIO_PIN_PE(19), .active_low = 1, },
211 };
212 
213 static const struct gpio_led_platform_data ngw_led_data = {
214         .num_leds =     ARRAY_SIZE(ngw_leds),
215         .leds =         (void *) ngw_leds,
216 };
217 
218 static struct platform_device ngw_gpio_leds = {
219         .name =         "leds-gpio",
220         .id =           -1,
221         .dev = {
222                 .platform_data = (void *) &ngw_led_data,
223         }
224 };
225 
226 static struct i2c_gpio_platform_data i2c_gpio_data = {
227         .sda_pin                = GPIO_PIN_PA(6),
228         .scl_pin                = GPIO_PIN_PA(7),
229         .sda_is_open_drain      = 1,
230         .scl_is_open_drain      = 1,
231         .udelay                 = 2,    /* close to 100 kHz */
232 };
233 
234 static struct platform_device i2c_gpio_device = {
235         .name           = "i2c-gpio",
236         .id             = 0,
237         .dev            = {
238                 .platform_data  = &i2c_gpio_data,
239         },
240 };
241 
242 static struct i2c_board_info __initdata i2c_info[] = {
243         /* NOTE:  original ATtiny24 firmware is at address 0x0b */
244 };
245 
246 static int __init atngw100_init(void)
247 {
248         unsigned        i;
249 
250         /*
251          * ATNGW100 mkII uses 32-bit SDRAM interface. Reserve the
252          * SDRAM-specific pins so that nobody messes with them.
253          */
254 #ifdef CONFIG_BOARD_ATNGW100_MKII
255         at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
256 
257         smc_set_timing(&nand_config, &nand_timing);
258         smc_set_configuration(3, &nand_config);
259         at32_add_device_nand(0, &atngw100mkii_nand_data);
260 #endif
261 
262         at32_add_device_usart(0);
263 
264         set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
265 #ifndef CONFIG_BOARD_ATNGW100_MKII_LCD
266         set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
267 #endif
268 
269         at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
270         at32_add_device_mci(0, &mci0_data);
271         at32_add_device_usba(0, &atngw100_usba_data);
272 
273         for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
274                 at32_select_gpio(ngw_leds[i].gpio,
275                                 AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
276         }
277         platform_device_register(&ngw_gpio_leds);
278 
279         /* all these i2c/smbus pins should have external pullups for
280          * open-drain sharing among all I2C devices.  SDA and SCL do;
281          * PB28/EXTINT3 (ATNGW100) and PE21 (ATNGW100 mkII) doesn't; it should
282          * be SMBALERT# (for PMBus), but it's not available off-board.
283          */
284 #ifdef CONFIG_BOARD_ATNGW100_MKII
285         at32_select_periph(GPIO_PIOE_BASE, 1 << 21, 0, AT32_GPIOF_PULLUP);
286 #else
287         at32_select_periph(GPIO_PIOB_BASE, 1 << 28, 0, AT32_GPIOF_PULLUP);
288 #endif
289         at32_select_gpio(i2c_gpio_data.sda_pin,
290                 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
291         at32_select_gpio(i2c_gpio_data.scl_pin,
292                 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
293         platform_device_register(&i2c_gpio_device);
294         i2c_register_board_info(0, i2c_info, ARRAY_SIZE(i2c_info));
295 
296         return 0;
297 }
298 postcore_initcall(atngw100_init);
299 
300 static int __init atngw100_arch_init(void)
301 {
302         /* PB30 (ATNGW100) and PE30 (ATNGW100 mkII) is the otherwise unused
303          * jumper on the mainboard, with an external pullup; the jumper grounds
304          * it. Use it however you like, including letting U-Boot or Linux tweak
305          * boot sequences.
306          */
307 #ifdef CONFIG_BOARD_ATNGW100_MKII
308         at32_select_gpio(GPIO_PIN_PE(30), 0);
309         gpio_request(GPIO_PIN_PE(30), "j15");
310         gpio_direction_input(GPIO_PIN_PE(30));
311         gpio_export(GPIO_PIN_PE(30), false);
312 #else
313         at32_select_gpio(GPIO_PIN_PB(30), 0);
314         gpio_request(GPIO_PIN_PB(30), "j15");
315         gpio_direction_input(GPIO_PIN_PB(30));
316         gpio_export(GPIO_PIN_PB(30), false);
317 #endif
318 
319         /* set_irq_type() after the arch_initcall for EIC has run, and
320          * before the I2C subsystem could try using this IRQ.
321          */
322         return irq_set_irq_type(AT32_EXTINT(3), IRQ_TYPE_EDGE_FALLING);
323 }
324 arch_initcall(atngw100_arch_init);
325 

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