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Linux/arch/avr32/include/asm/pgtable.h

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  1 /*
  2  * Copyright (C) 2004-2006 Atmel Corporation
  3  *
  4  * This program is free software; you can redistribute it and/or modify
  5  * it under the terms of the GNU General Public License version 2 as
  6  * published by the Free Software Foundation.
  7  */
  8 #ifndef __ASM_AVR32_PGTABLE_H
  9 #define __ASM_AVR32_PGTABLE_H
 10 
 11 #include <asm/addrspace.h>
 12 
 13 #ifndef __ASSEMBLY__
 14 #include <linux/sched.h>
 15 
 16 #endif /* !__ASSEMBLY__ */
 17 
 18 /*
 19  * Use two-level page tables just as the i386 (without PAE)
 20  */
 21 #include <asm/pgtable-2level.h>
 22 
 23 /*
 24  * The following code might need some cleanup when the values are
 25  * final...
 26  */
 27 #define PMD_SIZE        (1UL << PMD_SHIFT)
 28 #define PMD_MASK        (~(PMD_SIZE-1))
 29 #define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
 30 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
 31 
 32 #define USER_PTRS_PER_PGD       (TASK_SIZE / PGDIR_SIZE)
 33 #define FIRST_USER_ADDRESS      0UL
 34 
 35 #ifndef __ASSEMBLY__
 36 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
 37 extern void paging_init(void);
 38 
 39 /*
 40  * ZERO_PAGE is a global shared page that is always zero: used for
 41  * zero-mapped memory areas etc.
 42  */
 43 extern struct page *empty_zero_page;
 44 #define ZERO_PAGE(vaddr) (empty_zero_page)
 45 
 46 /*
 47  * Just any arbitrary offset to the start of the vmalloc VM area: the
 48  * current 8 MiB value just means that there will be a 8 MiB "hole"
 49  * after the uncached physical memory (P2 segment) until the vmalloc
 50  * area starts. That means that any out-of-bounds memory accesses will
 51  * hopefully be caught; we don't know if the end of the P1/P2 segments
 52  * are actually used for anything, but it is anyway safer to let the
 53  * MMU catch these kinds of errors than to rely on the memory bus.
 54  *
 55  * A "hole" of the same size is added to the end of the P3 segment as
 56  * well. It might seem wasteful to use 16 MiB of virtual address space
 57  * on this, but we do have 512 MiB of it...
 58  *
 59  * The vmalloc() routines leave a hole of 4 KiB between each vmalloced
 60  * area for the same reason.
 61  */
 62 #define VMALLOC_OFFSET  (8 * 1024 * 1024)
 63 #define VMALLOC_START   (P3SEG + VMALLOC_OFFSET)
 64 #define VMALLOC_END     (P4SEG - VMALLOC_OFFSET)
 65 #endif /* !__ASSEMBLY__ */
 66 
 67 /*
 68  * Page flags. Some of these flags are not directly supported by
 69  * hardware, so we have to emulate them.
 70  */
 71 #define _TLBEHI_BIT_VALID       9
 72 #define _TLBEHI_VALID           (1 << _TLBEHI_BIT_VALID)
 73 
 74 #define _PAGE_BIT_WT            0  /* W-bit   : write-through */
 75 #define _PAGE_BIT_DIRTY         1  /* D-bit   : page changed */
 76 #define _PAGE_BIT_SZ0           2  /* SZ0-bit : Size of page */
 77 #define _PAGE_BIT_SZ1           3  /* SZ1-bit : Size of page */
 78 #define _PAGE_BIT_EXECUTE       4  /* X-bit   : execute access allowed */
 79 #define _PAGE_BIT_RW            5  /* AP0-bit : write access allowed */
 80 #define _PAGE_BIT_USER          6  /* AP1-bit : user space access allowed */
 81 #define _PAGE_BIT_BUFFER        7  /* B-bit   : bufferable */
 82 #define _PAGE_BIT_GLOBAL        8  /* G-bit   : global (ignore ASID) */
 83 #define _PAGE_BIT_CACHABLE      9  /* C-bit   : cachable */
 84 
 85 /* If we drop support for 1K pages, we get two extra bits */
 86 #define _PAGE_BIT_PRESENT       10
 87 #define _PAGE_BIT_ACCESSED      11 /* software: page was accessed */
 88 
 89 #define _PAGE_WT                (1 << _PAGE_BIT_WT)
 90 #define _PAGE_DIRTY             (1 << _PAGE_BIT_DIRTY)
 91 #define _PAGE_EXECUTE           (1 << _PAGE_BIT_EXECUTE)
 92 #define _PAGE_RW                (1 << _PAGE_BIT_RW)
 93 #define _PAGE_USER              (1 << _PAGE_BIT_USER)
 94 #define _PAGE_BUFFER            (1 << _PAGE_BIT_BUFFER)
 95 #define _PAGE_GLOBAL            (1 << _PAGE_BIT_GLOBAL)
 96 #define _PAGE_CACHABLE          (1 << _PAGE_BIT_CACHABLE)
 97 
 98 /* Software flags */
 99 #define _PAGE_ACCESSED          (1 << _PAGE_BIT_ACCESSED)
100 #define _PAGE_PRESENT           (1 << _PAGE_BIT_PRESENT)
101 
102 /*
103  * Page types, i.e. sizes. _PAGE_TYPE_NONE corresponds to what is
104  * usually called _PAGE_PROTNONE on other architectures.
105  *
106  * XXX: Find out if _PAGE_PROTNONE is equivalent with !_PAGE_USER. If
107  * so, we can encode all possible page sizes (although we can't really
108  * support 1K pages anyway due to the _PAGE_PRESENT and _PAGE_ACCESSED
109  * bits)
110  *
111  */
112 #define _PAGE_TYPE_MASK         ((1 << _PAGE_BIT_SZ0) | (1 << _PAGE_BIT_SZ1))
113 #define _PAGE_TYPE_NONE         (0 << _PAGE_BIT_SZ0)
114 #define _PAGE_TYPE_SMALL        (1 << _PAGE_BIT_SZ0)
115 #define _PAGE_TYPE_MEDIUM       (2 << _PAGE_BIT_SZ0)
116 #define _PAGE_TYPE_LARGE        (3 << _PAGE_BIT_SZ0)
117 
118 /*
119  * Mask which drop software flags. We currently can't handle more than
120  * 512 MiB of physical memory, so we can use bits 29-31 for other
121  * stuff.  With a fixed 4K page size, we can use bits 10-11 as well as
122  * bits 2-3 (SZ)
123  */
124 #define _PAGE_FLAGS_HARDWARE_MASK       0xfffff3ff
125 
126 #define _PAGE_FLAGS_CACHE_MASK  (_PAGE_CACHABLE | _PAGE_BUFFER | _PAGE_WT)
127 
128 /* Flags that may be modified by software */
129 #define _PAGE_CHG_MASK          (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY \
130                                  | _PAGE_FLAGS_CACHE_MASK)
131 
132 #define _PAGE_FLAGS_READ        (_PAGE_CACHABLE | _PAGE_BUFFER)
133 #define _PAGE_FLAGS_WRITE       (_PAGE_FLAGS_READ | _PAGE_RW | _PAGE_DIRTY)
134 
135 #define _PAGE_NORMAL(x) __pgprot((x) | _PAGE_PRESENT | _PAGE_TYPE_SMALL \
136                                  | _PAGE_ACCESSED)
137 
138 #define PAGE_NONE       (_PAGE_ACCESSED | _PAGE_TYPE_NONE)
139 #define PAGE_READ       (_PAGE_FLAGS_READ | _PAGE_USER)
140 #define PAGE_EXEC       (_PAGE_FLAGS_READ | _PAGE_EXECUTE | _PAGE_USER)
141 #define PAGE_WRITE      (_PAGE_FLAGS_WRITE | _PAGE_USER)
142 #define PAGE_KERNEL     _PAGE_NORMAL(_PAGE_FLAGS_WRITE | _PAGE_EXECUTE | _PAGE_GLOBAL)
143 #define PAGE_KERNEL_RO  _PAGE_NORMAL(_PAGE_FLAGS_READ | _PAGE_EXECUTE | _PAGE_GLOBAL)
144 
145 #define _PAGE_P(x)      _PAGE_NORMAL((x) & ~(_PAGE_RW | _PAGE_DIRTY))
146 #define _PAGE_S(x)      _PAGE_NORMAL(x)
147 
148 #define PAGE_COPY       _PAGE_P(PAGE_WRITE | PAGE_READ)
149 #define PAGE_SHARED     _PAGE_S(PAGE_WRITE | PAGE_READ)
150 
151 #ifndef __ASSEMBLY__
152 /*
153  * The hardware supports flags for write- and execute access. Read is
154  * always allowed if the page is loaded into the TLB, so the "-w-",
155  * "--x" and "-wx" mappings are implemented as "rw-", "r-x" and "rwx",
156  * respectively.
157  *
158  * The "---" case is handled by software; the page will simply not be
159  * loaded into the TLB if the page type is _PAGE_TYPE_NONE.
160  */
161 
162 #define __P000  __pgprot(PAGE_NONE)
163 #define __P001  _PAGE_P(PAGE_READ)
164 #define __P010  _PAGE_P(PAGE_WRITE)
165 #define __P011  _PAGE_P(PAGE_WRITE | PAGE_READ)
166 #define __P100  _PAGE_P(PAGE_EXEC)
167 #define __P101  _PAGE_P(PAGE_EXEC | PAGE_READ)
168 #define __P110  _PAGE_P(PAGE_EXEC | PAGE_WRITE)
169 #define __P111  _PAGE_P(PAGE_EXEC | PAGE_WRITE | PAGE_READ)
170 
171 #define __S000  __pgprot(PAGE_NONE)
172 #define __S001  _PAGE_S(PAGE_READ)
173 #define __S010  _PAGE_S(PAGE_WRITE)
174 #define __S011  _PAGE_S(PAGE_WRITE | PAGE_READ)
175 #define __S100  _PAGE_S(PAGE_EXEC)
176 #define __S101  _PAGE_S(PAGE_EXEC | PAGE_READ)
177 #define __S110  _PAGE_S(PAGE_EXEC | PAGE_WRITE)
178 #define __S111  _PAGE_S(PAGE_EXEC | PAGE_WRITE | PAGE_READ)
179 
180 #define pte_none(x)     (!pte_val(x))
181 #define pte_present(x)  (pte_val(x) & _PAGE_PRESENT)
182 
183 #define pte_clear(mm,addr,xp)                                   \
184         do {                                                    \
185                 set_pte_at(mm, addr, xp, __pte(0));             \
186         } while (0)
187 
188 /*
189  * The following only work if pte_present() is true.
190  * Undefined behaviour if not..
191  */
192 static inline int pte_write(pte_t pte)
193 {
194         return pte_val(pte) & _PAGE_RW;
195 }
196 static inline int pte_dirty(pte_t pte)
197 {
198         return pte_val(pte) & _PAGE_DIRTY;
199 }
200 static inline int pte_young(pte_t pte)
201 {
202         return pte_val(pte) & _PAGE_ACCESSED;
203 }
204 static inline int pte_special(pte_t pte)
205 {
206         return 0;
207 }
208 
209 /* Mutator functions for PTE bits */
210 static inline pte_t pte_wrprotect(pte_t pte)
211 {
212         set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW));
213         return pte;
214 }
215 static inline pte_t pte_mkclean(pte_t pte)
216 {
217         set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY));
218         return pte;
219 }
220 static inline pte_t pte_mkold(pte_t pte)
221 {
222         set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED));
223         return pte;
224 }
225 static inline pte_t pte_mkwrite(pte_t pte)
226 {
227         set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW));
228         return pte;
229 }
230 static inline pte_t pte_mkdirty(pte_t pte)
231 {
232         set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY));
233         return pte;
234 }
235 static inline pte_t pte_mkyoung(pte_t pte)
236 {
237         set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED));
238         return pte;
239 }
240 static inline pte_t pte_mkspecial(pte_t pte)
241 {
242         return pte;
243 }
244 
245 #define pmd_none(x)     (!pmd_val(x))
246 #define pmd_present(x)  (pmd_val(x))
247 
248 static inline void pmd_clear(pmd_t *pmdp)
249 {
250         set_pmd(pmdp, __pmd(0));
251 }
252 
253 #define pmd_bad(x)      (pmd_val(x) & ~PAGE_MASK)
254 
255 /*
256  * Permanent address of a page. We don't support highmem, so this is
257  * trivial.
258  */
259 #define pages_to_mb(x)  ((x) >> (20-PAGE_SHIFT))
260 #define pte_page(x)     (pfn_to_page(pte_pfn(x)))
261 
262 /*
263  * Mark the prot value as uncacheable and unbufferable
264  */
265 #define pgprot_noncached(prot)                                          \
266         __pgprot(pgprot_val(prot) & ~(_PAGE_BUFFER | _PAGE_CACHABLE))
267 
268 /*
269  * Mark the prot value as uncacheable but bufferable
270  */
271 #define pgprot_writecombine(prot)                                       \
272         __pgprot((pgprot_val(prot) & ~_PAGE_CACHABLE) | _PAGE_BUFFER)
273 
274 /*
275  * Conversion functions: convert a page and protection to a page entry,
276  * and a page entry and page directory to the page they refer to.
277  *
278  * extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
279  */
280 #define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
281 
282 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
283 {
284         set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK)
285                             | pgprot_val(newprot)));
286         return pte;
287 }
288 
289 #define page_pte(page)  page_pte_prot(page, __pgprot(0))
290 
291 #define pmd_page_vaddr(pmd)     pmd_val(pmd)
292 #define pmd_page(pmd)           (virt_to_page(pmd_val(pmd)))
293 
294 /* to find an entry in a page-table-directory. */
295 #define pgd_index(address)      (((address) >> PGDIR_SHIFT)     \
296                                  & (PTRS_PER_PGD - 1))
297 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
298 
299 /* to find an entry in a kernel page-table-directory */
300 #define pgd_offset_k(address)   pgd_offset(&init_mm, address)
301 
302 /* Find an entry in the third-level page table.. */
303 #define pte_index(address)                              \
304         ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
305 #define pte_offset(dir, address)                                        \
306         ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
307 #define pte_offset_kernel(dir, address)                                 \
308         ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
309 #define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
310 #define pte_unmap(pte)          do { } while (0)
311 
312 struct vm_area_struct;
313 extern void update_mmu_cache(struct vm_area_struct * vma,
314                              unsigned long address, pte_t *ptep);
315 
316 /*
317  * Encode and decode a swap entry
318  *
319  * Constraints:
320  *   _PAGE_TYPE_* at bits 2-3 (for emulating _PAGE_PROTNONE)
321  *   _PAGE_PRESENT at bit 10
322  *
323  * We encode the type into bits 4-9 and offset into bits 11-31. This
324  * gives us a 21 bits offset, or 2**21 * 4K = 8G usable swap space per
325  * device, and 64 possible types.
326  *
327  * NOTE: We should set ZEROs at the position of _PAGE_PRESENT
328  *       and _PAGE_PROTNONE bits
329  */
330 #define __swp_type(x)           (((x).val >> 4) & 0x3f)
331 #define __swp_offset(x)         ((x).val >> 11)
332 #define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 4) | ((offset) << 11) })
333 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
334 #define __swp_entry_to_pte(x)   ((pte_t) { (x).val })
335 
336 typedef pte_t *pte_addr_t;
337 
338 #define kern_addr_valid(addr)   (1)
339 
340 /* No page table caches to initialize (?) */
341 #define pgtable_cache_init()    do { } while(0)
342 
343 #include <asm-generic/pgtable.h>
344 
345 #endif /* !__ASSEMBLY__ */
346 
347 #endif /* __ASM_AVR32_PGTABLE_H */
348 

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