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TOMOYO Linux Cross Reference
Linux/arch/blackfin/mach-bf518/boards/ezbrd.c

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  1 /*
  2  * Copyright 2004-2009 Analog Devices Inc.
  3  *                2005 National ICT Australia (NICTA)
  4  *                      Aidan Williams <aidan@nicta.com.au>
  5  *
  6  * Licensed under the GPL-2 or later.
  7  */
  8 
  9 #include <linux/device.h>
 10 #include <linux/export.h>
 11 #include <linux/platform_device.h>
 12 #include <linux/mtd/mtd.h>
 13 #include <linux/mtd/partitions.h>
 14 #include <linux/mtd/physmap.h>
 15 #include <linux/spi/spi.h>
 16 #include <linux/spi/flash.h>
 17 
 18 #include <linux/i2c.h>
 19 #include <linux/irq.h>
 20 #include <linux/interrupt.h>
 21 #include <asm/dma.h>
 22 #include <asm/bfin5xx_spi.h>
 23 #include <asm/reboot.h>
 24 #include <asm/portmux.h>
 25 #include <asm/dpmc.h>
 26 #include <asm/bfin_sdh.h>
 27 #include <linux/spi/ad7877.h>
 28 #include <net/dsa.h>
 29 
 30 /*
 31  * Name the Board for the /proc/cpuinfo
 32  */
 33 const char bfin_board_name[] = "ADI BF518F-EZBRD";
 34 
 35 /*
 36  *  Driver needs to know address, irq and flag pin.
 37  */
 38 
 39 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 40 static struct mtd_partition ezbrd_partitions[] = {
 41         {
 42                 .name       = "bootloader(nor)",
 43                 .size       = 0x40000,
 44                 .offset     = 0,
 45         }, {
 46                 .name       = "linux kernel(nor)",
 47                 .size       = 0x1C0000,
 48                 .offset     = MTDPART_OFS_APPEND,
 49         }, {
 50                 .name       = "file system(nor)",
 51                 .size       = MTDPART_SIZ_FULL,
 52                 .offset     = MTDPART_OFS_APPEND,
 53         }
 54 };
 55 
 56 static struct physmap_flash_data ezbrd_flash_data = {
 57         .width      = 2,
 58         .parts      = ezbrd_partitions,
 59         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
 60 };
 61 
 62 static struct resource ezbrd_flash_resource = {
 63         .start = 0x20000000,
 64 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
 65         .end   = 0x202fffff,
 66 #else
 67         .end   = 0x203fffff,
 68 #endif
 69         .flags = IORESOURCE_MEM,
 70 };
 71 
 72 static struct platform_device ezbrd_flash_device = {
 73         .name          = "physmap-flash",
 74         .id            = 0,
 75         .dev = {
 76                 .platform_data = &ezbrd_flash_data,
 77         },
 78         .num_resources = 1,
 79         .resource      = &ezbrd_flash_resource,
 80 };
 81 #endif
 82 
 83 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 84 static struct platform_device rtc_device = {
 85         .name = "rtc-bfin",
 86         .id   = -1,
 87 };
 88 #endif
 89 
 90 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 91 #include <linux/bfin_mac.h>
 92 static const unsigned short bfin_mac_peripherals[] = {
 93         P_MII0_ETxD0,
 94         P_MII0_ETxD1,
 95         P_MII0_ETxEN,
 96         P_MII0_ERxD0,
 97         P_MII0_ERxD1,
 98         P_MII0_TxCLK,
 99         P_MII0_PHYINT,
100         P_MII0_CRS,
101         P_MII0_MDC,
102         P_MII0_MDIO,
103         0
104 };
105 
106 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
107         {
108 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
109                 .addr = 3,
110 #else
111                 .addr = 1,
112 #endif
113                 .irq = IRQ_MAC_PHYINT,
114         },
115 };
116 
117 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
118         .phydev_number = 1,
119         .phydev_data = bfin_phydev_data,
120         .phy_mode = PHY_INTERFACE_MODE_MII,
121         .mac_peripherals = bfin_mac_peripherals,
122 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
123         .phy_mask = 0xfff7, /* Only probe the port phy connect to the on chip MAC */
124 #endif
125         .vlan1_mask = 1,
126         .vlan2_mask = 2,
127 };
128 
129 static struct platform_device bfin_mii_bus = {
130         .name = "bfin_mii_bus",
131         .dev = {
132                 .platform_data = &bfin_mii_bus_data,
133         }
134 };
135 
136 static struct platform_device bfin_mac_device = {
137         .name = "bfin_mac",
138         .dev = {
139                 .platform_data = &bfin_mii_bus,
140         }
141 };
142 
143 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
144 static struct dsa_chip_data ksz8893m_switch_chip_data = {
145         .mii_bus = &bfin_mii_bus.dev,
146         .port_names = {
147                 NULL,
148                 "eth%d",
149                 "eth%d",
150                 "cpu",
151         },
152 };
153 static struct dsa_platform_data ksz8893m_switch_data = {
154         .nr_chips = 1,
155         .netdev = &bfin_mac_device.dev,
156         .chip = &ksz8893m_switch_chip_data,
157 };
158 
159 static struct platform_device ksz8893m_switch_device = {
160         .name           = "dsa",
161         .id             = 0,
162         .num_resources  = 0,
163         .dev.platform_data = &ksz8893m_switch_data,
164 };
165 #endif
166 #endif
167 
168 #if defined(CONFIG_MTD_M25P80) \
169         || defined(CONFIG_MTD_M25P80_MODULE)
170 static struct mtd_partition bfin_spi_flash_partitions[] = {
171         {
172                 .name = "bootloader(spi)",
173                 .size = 0x00040000,
174                 .offset = 0,
175                 .mask_flags = MTD_CAP_ROM
176         }, {
177                 .name = "linux kernel(spi)",
178                 .size = MTDPART_SIZ_FULL,
179                 .offset = MTDPART_OFS_APPEND,
180         }
181 };
182 
183 static struct flash_platform_data bfin_spi_flash_data = {
184         .name = "m25p80",
185         .parts = bfin_spi_flash_partitions,
186         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
187         .type = "m25p16",
188 };
189 
190 /* SPI flash chip (m25p64) */
191 static struct bfin5xx_spi_chip spi_flash_chip_info = {
192         .enable_dma = 0,         /* use dma transfer with this chip*/
193 };
194 #endif
195 
196 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
197 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
198         .enable_dma = 0,
199 };
200 #endif
201 
202 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
203 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
204         .model                  = 7877,
205         .vref_delay_usecs       = 50,   /* internal, no capacitor */
206         .x_plate_ohms           = 419,
207         .y_plate_ohms           = 486,
208         .pressure_max           = 1000,
209         .pressure_min           = 0,
210         .stopacq_polarity       = 1,
211         .first_conversion_delay = 3,
212         .acquisition_time       = 1,
213         .averaging              = 1,
214         .pen_down_acc_interval  = 1,
215 };
216 #endif
217 
218 static struct spi_board_info bfin_spi_board_info[] __initdata = {
219 #if defined(CONFIG_MTD_M25P80) \
220         || defined(CONFIG_MTD_M25P80_MODULE)
221         {
222                 /* the modalias must be the same as spi device driver name */
223                 .modalias = "m25p80", /* Name of spi_driver for this device */
224                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
225                 .bus_num = 0, /* Framework bus number */
226                 .chip_select = 2, /* On BF518F-EZBRD it's SPI0_SSEL2 */
227                 .platform_data = &bfin_spi_flash_data,
228                 .controller_data = &spi_flash_chip_info,
229                 .mode = SPI_MODE_3,
230         },
231 #endif
232 
233 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
234 #if defined(CONFIG_NET_DSA_KSZ8893M) \
235         || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
236         {
237                 .modalias = "ksz8893m",
238                 .max_speed_hz = 5000000,
239                 .bus_num = 0,
240                 .chip_select = 1,
241                 .platform_data = NULL,
242                 .mode = SPI_MODE_3,
243         },
244 #endif
245 #endif
246 
247 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
248         {
249                 .modalias = "mmc_spi",
250                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
251                 .bus_num = 0,
252                 .chip_select = 5,
253                 .controller_data = &mmc_spi_chip_info,
254                 .mode = SPI_MODE_3,
255         },
256 #endif
257 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
258         {
259                 .modalias               = "ad7877",
260                 .platform_data          = &bfin_ad7877_ts_info,
261                 .irq                    = IRQ_PF8,
262                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
263                 .bus_num        = 0,
264                 .chip_select  = 2,
265         },
266 #endif
267 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
268          && defined(CONFIG_SND_SOC_WM8731_SPI)
269         {
270                 .modalias       = "wm8731",
271                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
272                 .bus_num        = 0,
273                 .chip_select    = 5,
274                 .mode = SPI_MODE_0,
275         },
276 #endif
277 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
278         {
279                 .modalias = "spidev",
280                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
281                 .bus_num = 0,
282                 .chip_select = 1,
283         },
284 #endif
285 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
286         {
287                 .modalias = "bfin-lq035q1-spi",
288                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
289                 .bus_num = 0,
290                 .chip_select = 1,
291                 .mode = SPI_CPHA | SPI_CPOL,
292         },
293 #endif
294 };
295 
296 /* SPI controller data */
297 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
298 /* SPI (0) */
299 static struct bfin5xx_spi_master bfin_spi0_info = {
300         .num_chipselect = 6,
301         .enable_dma = 1,  /* master has the ability to do dma transfer */
302         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
303 };
304 
305 static struct resource bfin_spi0_resource[] = {
306         [0] = {
307                 .start = SPI0_REGBASE,
308                 .end   = SPI0_REGBASE + 0xFF,
309                 .flags = IORESOURCE_MEM,
310                 },
311         [1] = {
312                 .start = CH_SPI0,
313                 .end   = CH_SPI0,
314                 .flags = IORESOURCE_DMA,
315         },
316         [2] = {
317                 .start = IRQ_SPI0,
318                 .end   = IRQ_SPI0,
319                 .flags = IORESOURCE_IRQ,
320         },
321 };
322 
323 static struct platform_device bfin_spi0_device = {
324         .name = "bfin-spi",
325         .id = 0, /* Bus number */
326         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
327         .resource = bfin_spi0_resource,
328         .dev = {
329                 .platform_data = &bfin_spi0_info, /* Passed to driver */
330         },
331 };
332 
333 /* SPI (1) */
334 static struct bfin5xx_spi_master bfin_spi1_info = {
335         .num_chipselect = 6,
336         .enable_dma = 1,  /* master has the ability to do dma transfer */
337         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
338 };
339 
340 static struct resource bfin_spi1_resource[] = {
341         [0] = {
342                 .start = SPI1_REGBASE,
343                 .end   = SPI1_REGBASE + 0xFF,
344                 .flags = IORESOURCE_MEM,
345                 },
346         [1] = {
347                 .start = CH_SPI1,
348                 .end   = CH_SPI1,
349                 .flags = IORESOURCE_DMA,
350         },
351         [2] = {
352                 .start = IRQ_SPI1,
353                 .end   = IRQ_SPI1,
354                 .flags = IORESOURCE_IRQ,
355         },
356 };
357 
358 static struct platform_device bfin_spi1_device = {
359         .name = "bfin-spi",
360         .id = 1, /* Bus number */
361         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
362         .resource = bfin_spi1_resource,
363         .dev = {
364                 .platform_data = &bfin_spi1_info, /* Passed to driver */
365         },
366 };
367 #endif  /* spi master and devices */
368 
369 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
370 #ifdef CONFIG_SERIAL_BFIN_UART0
371 static struct resource bfin_uart0_resources[] = {
372         {
373                 .start = UART0_THR,
374                 .end = UART0_GCTL+2,
375                 .flags = IORESOURCE_MEM,
376         },
377         {
378                 .start = IRQ_UART0_TX,
379                 .end = IRQ_UART0_TX,
380                 .flags = IORESOURCE_IRQ,
381         },
382         {
383                 .start = IRQ_UART0_RX,
384                 .end = IRQ_UART0_RX,
385                 .flags = IORESOURCE_IRQ,
386         },
387         {
388                 .start = IRQ_UART0_ERROR,
389                 .end = IRQ_UART0_ERROR,
390                 .flags = IORESOURCE_IRQ,
391         },
392         {
393                 .start = CH_UART0_TX,
394                 .end = CH_UART0_TX,
395                 .flags = IORESOURCE_DMA,
396         },
397         {
398                 .start = CH_UART0_RX,
399                 .end = CH_UART0_RX,
400                 .flags = IORESOURCE_DMA,
401         },
402 };
403 
404 static unsigned short bfin_uart0_peripherals[] = {
405         P_UART0_TX, P_UART0_RX, 0
406 };
407 
408 static struct platform_device bfin_uart0_device = {
409         .name = "bfin-uart",
410         .id = 0,
411         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
412         .resource = bfin_uart0_resources,
413         .dev = {
414                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
415         },
416 };
417 #endif
418 #ifdef CONFIG_SERIAL_BFIN_UART1
419 static struct resource bfin_uart1_resources[] = {
420         {
421                 .start = UART1_THR,
422                 .end = UART1_GCTL+2,
423                 .flags = IORESOURCE_MEM,
424         },
425         {
426                 .start = IRQ_UART1_TX,
427                 .end = IRQ_UART1_TX,
428                 .flags = IORESOURCE_IRQ,
429         },
430         {
431                 .start = IRQ_UART1_RX,
432                 .end = IRQ_UART1_RX,
433                 .flags = IORESOURCE_IRQ,
434         },
435         {
436                 .start = IRQ_UART1_ERROR,
437                 .end = IRQ_UART1_ERROR,
438                 .flags = IORESOURCE_IRQ,
439         },
440         {
441                 .start = CH_UART1_TX,
442                 .end = CH_UART1_TX,
443                 .flags = IORESOURCE_DMA,
444         },
445         {
446                 .start = CH_UART1_RX,
447                 .end = CH_UART1_RX,
448                 .flags = IORESOURCE_DMA,
449         },
450 };
451 
452 static unsigned short bfin_uart1_peripherals[] = {
453         P_UART1_TX, P_UART1_RX, 0
454 };
455 
456 static struct platform_device bfin_uart1_device = {
457         .name = "bfin-uart",
458         .id = 1,
459         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
460         .resource = bfin_uart1_resources,
461         .dev = {
462                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
463         },
464 };
465 #endif
466 #endif
467 
468 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
469 #ifdef CONFIG_BFIN_SIR0
470 static struct resource bfin_sir0_resources[] = {
471         {
472                 .start = 0xFFC00400,
473                 .end = 0xFFC004FF,
474                 .flags = IORESOURCE_MEM,
475         },
476         {
477                 .start = IRQ_UART0_RX,
478                 .end = IRQ_UART0_RX+1,
479                 .flags = IORESOURCE_IRQ,
480         },
481         {
482                 .start = CH_UART0_RX,
483                 .end = CH_UART0_RX+1,
484                 .flags = IORESOURCE_DMA,
485         },
486 };
487 
488 static struct platform_device bfin_sir0_device = {
489         .name = "bfin_sir",
490         .id = 0,
491         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
492         .resource = bfin_sir0_resources,
493 };
494 #endif
495 #ifdef CONFIG_BFIN_SIR1
496 static struct resource bfin_sir1_resources[] = {
497         {
498                 .start = 0xFFC02000,
499                 .end = 0xFFC020FF,
500                 .flags = IORESOURCE_MEM,
501         },
502         {
503                 .start = IRQ_UART1_RX,
504                 .end = IRQ_UART1_RX+1,
505                 .flags = IORESOURCE_IRQ,
506         },
507         {
508                 .start = CH_UART1_RX,
509                 .end = CH_UART1_RX+1,
510                 .flags = IORESOURCE_DMA,
511         },
512 };
513 
514 static struct platform_device bfin_sir1_device = {
515         .name = "bfin_sir",
516         .id = 1,
517         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
518         .resource = bfin_sir1_resources,
519 };
520 #endif
521 #endif
522 
523 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
524 static struct platform_device bfin_i2s = {
525         .name = "bfin-i2s",
526         .id = CONFIG_SND_BF5XX_SPORT_NUM,
527         /* TODO: add platform data here */
528 };
529 #endif
530 
531 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
532 static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
533 
534 static struct resource bfin_twi0_resource[] = {
535         [0] = {
536                 .start = TWI0_REGBASE,
537                 .end   = TWI0_REGBASE,
538                 .flags = IORESOURCE_MEM,
539         },
540         [1] = {
541                 .start = IRQ_TWI,
542                 .end   = IRQ_TWI,
543                 .flags = IORESOURCE_IRQ,
544         },
545 };
546 
547 static struct platform_device i2c_bfin_twi_device = {
548         .name = "i2c-bfin-twi",
549         .id = 0,
550         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
551         .resource = bfin_twi0_resource,
552         .dev = {
553                 .platform_data = &bfin_twi0_pins,
554         },
555 };
556 #endif
557 
558 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
559 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
560         {
561                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
562         },
563 #endif
564 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
565         {
566                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
567                 .irq = IRQ_PF8,
568         },
569 #endif
570 #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
571         {
572                 I2C_BOARD_INFO("ssm2602", 0x1b),
573         },
574 #endif
575 };
576 
577 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
578 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
579 static struct resource bfin_sport0_uart_resources[] = {
580         {
581                 .start = SPORT0_TCR1,
582                 .end = SPORT0_MRCS3+4,
583                 .flags = IORESOURCE_MEM,
584         },
585         {
586                 .start = IRQ_SPORT0_RX,
587                 .end = IRQ_SPORT0_RX+1,
588                 .flags = IORESOURCE_IRQ,
589         },
590         {
591                 .start = IRQ_SPORT0_ERROR,
592                 .end = IRQ_SPORT0_ERROR,
593                 .flags = IORESOURCE_IRQ,
594         },
595 };
596 
597 static unsigned short bfin_sport0_peripherals[] = {
598         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
599         P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
600 };
601 
602 static struct platform_device bfin_sport0_uart_device = {
603         .name = "bfin-sport-uart",
604         .id = 0,
605         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
606         .resource = bfin_sport0_uart_resources,
607         .dev = {
608                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
609         },
610 };
611 #endif
612 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
613 static struct resource bfin_sport1_uart_resources[] = {
614         {
615                 .start = SPORT1_TCR1,
616                 .end = SPORT1_MRCS3+4,
617                 .flags = IORESOURCE_MEM,
618         },
619         {
620                 .start = IRQ_SPORT1_RX,
621                 .end = IRQ_SPORT1_RX+1,
622                 .flags = IORESOURCE_IRQ,
623         },
624         {
625                 .start = IRQ_SPORT1_ERROR,
626                 .end = IRQ_SPORT1_ERROR,
627                 .flags = IORESOURCE_IRQ,
628         },
629 };
630 
631 static unsigned short bfin_sport1_peripherals[] = {
632         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
633         P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
634 };
635 
636 static struct platform_device bfin_sport1_uart_device = {
637         .name = "bfin-sport-uart",
638         .id = 1,
639         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
640         .resource = bfin_sport1_uart_resources,
641         .dev = {
642                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
643         },
644 };
645 #endif
646 #endif
647 
648 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
649 #include <linux/input.h>
650 #include <linux/gpio_keys.h>
651 
652 static struct gpio_keys_button bfin_gpio_keys_table[] = {
653         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
654         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
655 };
656 
657 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
658         .buttons        = bfin_gpio_keys_table,
659         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
660 };
661 
662 static struct platform_device bfin_device_gpiokeys = {
663         .name      = "gpio-keys",
664         .dev = {
665                 .platform_data = &bfin_gpio_keys_data,
666         },
667 };
668 #endif
669 
670 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
671 
672 static struct bfin_sd_host bfin_sdh_data = {
673         .dma_chan = CH_RSI,
674         .irq_int0 = IRQ_RSI_INT0,
675         .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
676 };
677 
678 static struct platform_device bf51x_sdh_device = {
679         .name = "bfin-sdh",
680         .id = 0,
681         .dev = {
682                 .platform_data = &bfin_sdh_data,
683         },
684 };
685 #endif
686 
687 static const unsigned int cclk_vlev_datasheet[] =
688 {
689         VRPAIR(VLEV_100, 400000000),
690         VRPAIR(VLEV_105, 426000000),
691         VRPAIR(VLEV_110, 500000000),
692         VRPAIR(VLEV_115, 533000000),
693         VRPAIR(VLEV_120, 600000000),
694 };
695 
696 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
697         .tuple_tab = cclk_vlev_datasheet,
698         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
699         .vr_settling_time = 25 /* us */,
700 };
701 
702 static struct platform_device bfin_dpmc = {
703         .name = "bfin dpmc",
704         .dev = {
705                 .platform_data = &bfin_dmpc_vreg_data,
706         },
707 };
708 
709 static struct platform_device *stamp_devices[] __initdata = {
710 
711         &bfin_dpmc,
712 
713 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
714         &rtc_device,
715 #endif
716 
717 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
718         &bfin_mii_bus,
719         &bfin_mac_device,
720 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
721         &ksz8893m_switch_device,
722 #endif
723 #endif
724 
725 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
726         &bfin_spi0_device,
727         &bfin_spi1_device,
728 #endif
729 
730 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
731 #ifdef CONFIG_SERIAL_BFIN_UART0
732         &bfin_uart0_device,
733 #endif
734 #ifdef CONFIG_SERIAL_BFIN_UART1
735         &bfin_uart1_device,
736 #endif
737 #endif
738 
739 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
740 #ifdef CONFIG_BFIN_SIR0
741         &bfin_sir0_device,
742 #endif
743 #ifdef CONFIG_BFIN_SIR1
744         &bfin_sir1_device,
745 #endif
746 #endif
747 
748 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
749         &i2c_bfin_twi_device,
750 #endif
751 
752 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
753         &bfin_i2s,
754 #endif
755 
756 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
757 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
758         &bfin_sport0_uart_device,
759 #endif
760 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
761         &bfin_sport1_uart_device,
762 #endif
763 #endif
764 
765 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
766         &bfin_device_gpiokeys,
767 #endif
768 
769 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
770         &bf51x_sdh_device,
771 #endif
772 
773 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
774         &ezbrd_flash_device,
775 #endif
776 };
777 
778 static int __init ezbrd_init(void)
779 {
780         printk(KERN_INFO "%s(): registering device resources\n", __func__);
781         i2c_register_board_info(0, bfin_i2c_board_info,
782                                 ARRAY_SIZE(bfin_i2c_board_info));
783         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
784         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
785         /* setup BF518-EZBRD GPIO pin PG11 to AMS2, PG15 to AMS3. */
786         peripheral_request(P_AMS2, "ParaFlash");
787 #if !defined(CONFIG_SPI_BFIN5XX) && !defined(CONFIG_SPI_BFIN5XX_MODULE)
788         peripheral_request(P_AMS3, "ParaFlash");
789 #endif
790         return 0;
791 }
792 
793 arch_initcall(ezbrd_init);
794 
795 static struct platform_device *ezbrd_early_devices[] __initdata = {
796 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
797 #ifdef CONFIG_SERIAL_BFIN_UART0
798         &bfin_uart0_device,
799 #endif
800 #ifdef CONFIG_SERIAL_BFIN_UART1
801         &bfin_uart1_device,
802 #endif
803 #endif
804 
805 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
806 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
807         &bfin_sport0_uart_device,
808 #endif
809 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
810         &bfin_sport1_uart_device,
811 #endif
812 #endif
813 };
814 
815 void __init native_machine_early_platform_add_devices(void)
816 {
817         printk(KERN_INFO "register early platform devices\n");
818         early_platform_add_devices(ezbrd_early_devices,
819                 ARRAY_SIZE(ezbrd_early_devices));
820 }
821 
822 void native_machine_restart(char *cmd)
823 {
824         /* workaround reboot hang when booting from SPI */
825         if ((bfin_read_SYSCR() & 0x7) == 0x3)
826                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
827 }
828 
829 int bfin_get_ether_addr(char *addr)
830 {
831         /* the MAC is stored in OTP memory page 0xDF */
832         u32 ret;
833         u64 otp_mac;
834         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
835 
836         ret = otp_read(0xDF, 0x00, &otp_mac);
837         if (!(ret & 0x1)) {
838                 char *otp_mac_p = (char *)&otp_mac;
839                 for (ret = 0; ret < 6; ++ret)
840                         addr[ret] = otp_mac_p[5 - ret];
841         }
842         return 0;
843 }
844 EXPORT_SYMBOL(bfin_get_ether_addr);
845 

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