1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9 #include <linux/device.h>
10 #include <linux/platform_device.h>
11 #include <linux/mtd/mtd.h>
12 #include <linux/mtd/partitions.h>
13 #include <linux/mtd/physmap.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
16 #include <linux/spi/mmc_spi.h>
17 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
18 #include <linux/usb/isp1362.h>
19 #endif
20 #include <linux/irq.h>
21 #include <linux/i2c.h>
22 #include <asm/dma.h>
23 #include <asm/bfin5xx_spi.h>
24 #include <asm/reboot.h>
25 #include <asm/portmux.h>
26 #include <asm/dpmc.h>
27
28 /*
29 * Name the Board for the /proc/cpuinfo
30 */
31 const char bfin_board_name[] = "ADI BF533-STAMP";
32
33 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
34 static struct platform_device rtc_device = {
35 .name = "rtc-bfin",
36 .id = -1,
37 };
38 #endif
39
40 /*
41 * Driver needs to know address, irq and flag pin.
42 */
43 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
44 #include <linux/smc91x.h>
45
46 static struct smc91x_platdata smc91x_info = {
47 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
48 .leda = RPC_LED_100_10,
49 .ledb = RPC_LED_TX_RX,
50 };
51
52 static struct resource smc91x_resources[] = {
53 {
54 .name = "smc91x-regs",
55 .start = 0x20300300,
56 .end = 0x20300300 + 16,
57 .flags = IORESOURCE_MEM,
58 }, {
59 .start = IRQ_PF7,
60 .end = IRQ_PF7,
61 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
62 },
63 };
64
65 static struct platform_device smc91x_device = {
66 .name = "smc91x",
67 .id = 0,
68 .num_resources = ARRAY_SIZE(smc91x_resources),
69 .resource = smc91x_resources,
70 .dev = {
71 .platform_data = &smc91x_info,
72 },
73 };
74 #endif
75
76 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
77 static struct resource net2272_bfin_resources[] = {
78 {
79 .start = 0x20300000,
80 .end = 0x20300000 + 0x100,
81 .flags = IORESOURCE_MEM,
82 }, {
83 .start = 1,
84 .flags = IORESOURCE_BUS,
85 }, {
86 .start = IRQ_PF10,
87 .end = IRQ_PF10,
88 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
89 },
90 };
91
92 static struct platform_device net2272_bfin_device = {
93 .name = "net2272",
94 .id = -1,
95 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
96 .resource = net2272_bfin_resources,
97 };
98 #endif
99
100 #if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE)
101 static struct mtd_partition stamp_partitions[] = {
102 {
103 .name = "bootloader(nor)",
104 .size = 0x40000,
105 .offset = 0,
106 }, {
107 .name = "linux kernel(nor)",
108 .size = 0x180000,
109 .offset = MTDPART_OFS_APPEND,
110 }, {
111 .name = "file system(nor)",
112 .size = MTDPART_SIZ_FULL,
113 .offset = MTDPART_OFS_APPEND,
114 }
115 };
116
117 static struct physmap_flash_data stamp_flash_data = {
118 .width = 2,
119 .parts = stamp_partitions,
120 .nr_parts = ARRAY_SIZE(stamp_partitions),
121 };
122
123 static struct resource stamp_flash_resource[] = {
124 {
125 .name = "cfi_probe",
126 .start = 0x20000000,
127 .end = 0x203fffff,
128 .flags = IORESOURCE_MEM,
129 }, {
130 .start = 0x7BB07BB0, /* AMBCTL0 setting when accessing flash */
131 .end = 0x7BB07BB0, /* AMBCTL1 setting when accessing flash */
132 .flags = IORESOURCE_MEM,
133 }, {
134 .start = GPIO_PF0,
135 .flags = IORESOURCE_IRQ,
136 }
137 };
138
139 static struct platform_device stamp_flash_device = {
140 .name = "bfin-async-flash",
141 .id = 0,
142 .dev = {
143 .platform_data = &stamp_flash_data,
144 },
145 .num_resources = ARRAY_SIZE(stamp_flash_resource),
146 .resource = stamp_flash_resource,
147 };
148 #endif
149
150 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
151 static struct mtd_partition bfin_spi_flash_partitions[] = {
152 {
153 .name = "bootloader(spi)",
154 .size = 0x00040000,
155 .offset = 0,
156 .mask_flags = MTD_CAP_ROM
157 }, {
158 .name = "linux kernel(spi)",
159 .size = 0x180000,
160 .offset = MTDPART_OFS_APPEND,
161 }, {
162 .name = "file system(spi)",
163 .size = MTDPART_SIZ_FULL,
164 .offset = MTDPART_OFS_APPEND,
165 }
166 };
167
168 static struct flash_platform_data bfin_spi_flash_data = {
169 .name = "m25p80",
170 .parts = bfin_spi_flash_partitions,
171 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
172 .type = "m25p64",
173 };
174
175 /* SPI flash chip (m25p64) */
176 static struct bfin5xx_spi_chip spi_flash_chip_info = {
177 .enable_dma = 0, /* use dma transfer with this chip*/
178 };
179 #endif
180
181 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
182 #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
183 static int bfin_mmc_spi_init(struct device *dev,
184 irqreturn_t (*detect_int)(int, void *), void *data)
185 {
186 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
187 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
188 "mmc-spi-detect", data);
189 }
190
191 static void bfin_mmc_spi_exit(struct device *dev, void *data)
192 {
193 free_irq(MMC_SPI_CARD_DETECT_INT, data);
194 }
195
196 static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
197 .init = bfin_mmc_spi_init,
198 .exit = bfin_mmc_spi_exit,
199 .detect_delay = 100, /* msecs */
200 };
201
202 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
203 .enable_dma = 0,
204 .pio_interrupt = 0,
205 };
206 #endif
207
208 static struct spi_board_info bfin_spi_board_info[] __initdata = {
209 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
210 {
211 /* the modalias must be the same as spi device driver name */
212 .modalias = "m25p80", /* Name of spi_driver for this device */
213 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
214 .bus_num = 0, /* Framework bus number */
215 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
216 .platform_data = &bfin_spi_flash_data,
217 .controller_data = &spi_flash_chip_info,
218 .mode = SPI_MODE_3,
219 },
220 #endif
221
222 #if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
223 defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
224 {
225 .modalias = "ad1836",
226 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
227 .bus_num = 0,
228 .chip_select = 4,
229 .platform_data = "ad1836", /* only includes chip name for the moment */
230 .mode = SPI_MODE_3,
231 },
232 #endif
233
234 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
235 {
236 .modalias = "spidev",
237 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
238 .bus_num = 0,
239 .chip_select = 1,
240 },
241 #endif
242 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
243 {
244 .modalias = "mmc_spi",
245 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
246 .bus_num = 0,
247 .chip_select = 4,
248 .platform_data = &bfin_mmc_spi_pdata,
249 .controller_data = &mmc_spi_chip_info,
250 .mode = SPI_MODE_3,
251 },
252 #endif
253 };
254
255 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
256 /* SPI (0) */
257 static struct resource bfin_spi0_resource[] = {
258 [0] = {
259 .start = SPI0_REGBASE,
260 .end = SPI0_REGBASE + 0xFF,
261 .flags = IORESOURCE_MEM,
262 },
263 [1] = {
264 .start = CH_SPI,
265 .end = CH_SPI,
266 .flags = IORESOURCE_DMA,
267 },
268 [2] = {
269 .start = IRQ_SPI,
270 .end = IRQ_SPI,
271 .flags = IORESOURCE_IRQ,
272 }
273 };
274
275 /* SPI controller data */
276 static struct bfin5xx_spi_master bfin_spi0_info = {
277 .num_chipselect = 8,
278 .enable_dma = 1, /* master has the ability to do dma transfer */
279 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
280 };
281
282 static struct platform_device bfin_spi0_device = {
283 .name = "bfin-spi",
284 .id = 0, /* Bus number */
285 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
286 .resource = bfin_spi0_resource,
287 .dev = {
288 .platform_data = &bfin_spi0_info, /* Passed to driver */
289 },
290 };
291 #endif /* spi master and devices */
292
293 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
294 #ifdef CONFIG_SERIAL_BFIN_UART0
295 static struct resource bfin_uart0_resources[] = {
296 {
297 .start = BFIN_UART_THR,
298 .end = BFIN_UART_GCTL+2,
299 .flags = IORESOURCE_MEM,
300 },
301 {
302 .start = IRQ_UART0_TX,
303 .end = IRQ_UART0_TX,
304 .flags = IORESOURCE_IRQ,
305 },
306 {
307 .start = IRQ_UART0_RX,
308 .end = IRQ_UART0_RX,
309 .flags = IORESOURCE_IRQ,
310 },
311 {
312 .start = IRQ_UART0_ERROR,
313 .end = IRQ_UART0_ERROR,
314 .flags = IORESOURCE_IRQ,
315 },
316 {
317 .start = CH_UART0_TX,
318 .end = CH_UART0_TX,
319 .flags = IORESOURCE_DMA,
320 },
321 {
322 .start = CH_UART0_RX,
323 .end = CH_UART0_RX,
324 .flags = IORESOURCE_DMA,
325 },
326 };
327
328 static unsigned short bfin_uart0_peripherals[] = {
329 P_UART0_TX, P_UART0_RX, 0
330 };
331
332 static struct platform_device bfin_uart0_device = {
333 .name = "bfin-uart",
334 .id = 0,
335 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
336 .resource = bfin_uart0_resources,
337 .dev = {
338 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
339 },
340 };
341 #endif
342 #endif
343
344 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
345 #ifdef CONFIG_BFIN_SIR0
346 static struct resource bfin_sir0_resources[] = {
347 {
348 .start = 0xFFC00400,
349 .end = 0xFFC004FF,
350 .flags = IORESOURCE_MEM,
351 },
352 {
353 .start = IRQ_UART0_RX,
354 .end = IRQ_UART0_RX+1,
355 .flags = IORESOURCE_IRQ,
356 },
357 {
358 .start = CH_UART0_RX,
359 .end = CH_UART0_RX+1,
360 .flags = IORESOURCE_DMA,
361 },
362 };
363
364 static struct platform_device bfin_sir0_device = {
365 .name = "bfin_sir",
366 .id = 0,
367 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
368 .resource = bfin_sir0_resources,
369 };
370 #endif
371 #endif
372
373 #if defined(CONFIG_SERIAL_BFIN_SPORT) || \
374 defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
375 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
376 static struct resource bfin_sport0_uart_resources[] = {
377 {
378 .start = SPORT0_TCR1,
379 .end = SPORT0_MRCS3+4,
380 .flags = IORESOURCE_MEM,
381 },
382 {
383 .start = IRQ_SPORT0_RX,
384 .end = IRQ_SPORT0_RX+1,
385 .flags = IORESOURCE_IRQ,
386 },
387 {
388 .start = IRQ_SPORT0_ERROR,
389 .end = IRQ_SPORT0_ERROR,
390 .flags = IORESOURCE_IRQ,
391 },
392 };
393
394 static unsigned short bfin_sport0_peripherals[] = {
395 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
396 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
397 };
398
399 static struct platform_device bfin_sport0_uart_device = {
400 .name = "bfin-sport-uart",
401 .id = 0,
402 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
403 .resource = bfin_sport0_uart_resources,
404 .dev = {
405 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
406 },
407 };
408 #endif
409 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
410 static struct resource bfin_sport1_uart_resources[] = {
411 {
412 .start = SPORT1_TCR1,
413 .end = SPORT1_MRCS3+4,
414 .flags = IORESOURCE_MEM,
415 },
416 {
417 .start = IRQ_SPORT1_RX,
418 .end = IRQ_SPORT1_RX+1,
419 .flags = IORESOURCE_IRQ,
420 },
421 {
422 .start = IRQ_SPORT1_ERROR,
423 .end = IRQ_SPORT1_ERROR,
424 .flags = IORESOURCE_IRQ,
425 },
426 };
427
428 static unsigned short bfin_sport1_peripherals[] = {
429 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
430 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
431 };
432
433 static struct platform_device bfin_sport1_uart_device = {
434 .name = "bfin-sport-uart",
435 .id = 1,
436 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
437 .resource = bfin_sport1_uart_resources,
438 .dev = {
439 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
440 },
441 };
442 #endif
443 #endif
444
445 #if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
446 static struct resource bfin_sport0_resources[] = {
447 {
448 .start = SPORT0_TCR1,
449 .end = SPORT0_MRCS3+4,
450 .flags = IORESOURCE_MEM,
451 },
452 {
453 .start = IRQ_SPORT0_TX,
454 .end = IRQ_SPORT0_TX+1,
455 .flags = IORESOURCE_IRQ,
456 },
457 {
458 .start = IRQ_SPORT0_RX,
459 .end = IRQ_SPORT0_RX+1,
460 .flags = IORESOURCE_IRQ,
461 },
462 {
463 .start = IRQ_SPORT0_ERROR,
464 .end = IRQ_SPORT0_ERROR,
465 .flags = IORESOURCE_IRQ,
466 },
467 {
468 .start = CH_SPORT0_TX,
469 .end = CH_SPORT0_TX,
470 .flags = IORESOURCE_DMA,
471 },
472 {
473 .start = CH_SPORT0_RX,
474 .end = CH_SPORT0_RX,
475 .flags = IORESOURCE_DMA,
476 },
477 };
478 static struct platform_device bfin_sport0_device = {
479 .name = "bfin_sport_raw",
480 .id = 0,
481 .num_resources = ARRAY_SIZE(bfin_sport0_resources),
482 .resource = bfin_sport0_resources,
483 .dev = {
484 .platform_data = &bfin_sport0_peripherals,
485 },
486 };
487 #endif
488
489 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
490 #include <linux/input.h>
491 #include <linux/gpio_keys.h>
492
493 static struct gpio_keys_button bfin_gpio_keys_table[] = {
494 {BTN_0, GPIO_PF5, 0, "gpio-keys: BTN0"},
495 {BTN_1, GPIO_PF6, 0, "gpio-keys: BTN1"},
496 {BTN_2, GPIO_PF8, 0, "gpio-keys: BTN2"},
497 };
498
499 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
500 .buttons = bfin_gpio_keys_table,
501 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
502 };
503
504 static struct platform_device bfin_device_gpiokeys = {
505 .name = "gpio-keys",
506 .dev = {
507 .platform_data = &bfin_gpio_keys_data,
508 },
509 };
510 #endif
511
512 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
513 #include <linux/i2c-gpio.h>
514
515 static struct i2c_gpio_platform_data i2c_gpio_data = {
516 .sda_pin = GPIO_PF2,
517 .scl_pin = GPIO_PF3,
518 .sda_is_open_drain = 0,
519 .scl_is_open_drain = 0,
520 .udelay = 10,
521 };
522
523 static struct platform_device i2c_gpio_device = {
524 .name = "i2c-gpio",
525 .id = 0,
526 .dev = {
527 .platform_data = &i2c_gpio_data,
528 },
529 };
530 #endif
531
532 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
533 #if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
534 {
535 I2C_BOARD_INFO("ad7142_joystick", 0x2C),
536 .irq = 39,
537 },
538 #endif
539 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
540 {
541 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
542 },
543 #endif
544 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
545 {
546 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
547 .irq = 39,
548 },
549 #endif
550 #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
551 {
552 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
553 },
554 #endif
555 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
556 {
557 I2C_BOARD_INFO("ad5252", 0x2f),
558 },
559 #endif
560 };
561
562 static const unsigned int cclk_vlev_datasheet[] =
563 {
564 VRPAIR(VLEV_085, 250000000),
565 VRPAIR(VLEV_090, 376000000),
566 VRPAIR(VLEV_095, 426000000),
567 VRPAIR(VLEV_100, 426000000),
568 VRPAIR(VLEV_105, 476000000),
569 VRPAIR(VLEV_110, 476000000),
570 VRPAIR(VLEV_115, 476000000),
571 VRPAIR(VLEV_120, 600000000),
572 VRPAIR(VLEV_125, 600000000),
573 VRPAIR(VLEV_130, 600000000),
574 };
575
576 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
577 .tuple_tab = cclk_vlev_datasheet,
578 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
579 .vr_settling_time = 25 /* us */,
580 };
581
582 static struct platform_device bfin_dpmc = {
583 .name = "bfin dpmc",
584 .dev = {
585 .platform_data = &bfin_dmpc_vreg_data,
586 },
587 };
588
589 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
590 defined(CONFIG_SND_BF5XX_AC97) || \
591 defined(CONFIG_SND_BF5XX_AC97_MODULE)
592
593 #include <asm/bfin_sport.h>
594
595 #define SPORT_REQ(x) \
596 [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
597 P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
598
599 static const u16 bfin_snd_pin[][7] = {
600 SPORT_REQ(0),
601 SPORT_REQ(1),
602 };
603
604 static struct bfin_snd_platform_data bfin_snd_data[] = {
605 {
606 .pin_req = &bfin_snd_pin[0][0],
607 },
608 {
609 .pin_req = &bfin_snd_pin[1][0],
610 },
611 };
612
613 #define BFIN_SND_RES(x) \
614 [x] = { \
615 { \
616 .start = SPORT##x##_TCR1, \
617 .end = SPORT##x##_TCR1, \
618 .flags = IORESOURCE_MEM \
619 }, \
620 { \
621 .start = CH_SPORT##x##_RX, \
622 .end = CH_SPORT##x##_RX, \
623 .flags = IORESOURCE_DMA, \
624 }, \
625 { \
626 .start = CH_SPORT##x##_TX, \
627 .end = CH_SPORT##x##_TX, \
628 .flags = IORESOURCE_DMA, \
629 }, \
630 { \
631 .start = IRQ_SPORT##x##_ERROR, \
632 .end = IRQ_SPORT##x##_ERROR, \
633 .flags = IORESOURCE_IRQ, \
634 } \
635 }
636
637 static struct resource bfin_snd_resources[][4] = {
638 BFIN_SND_RES(0),
639 BFIN_SND_RES(1),
640 };
641 #endif
642
643 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
644 static struct platform_device bfin_i2s_pcm = {
645 .name = "bfin-i2s-pcm-audio",
646 .id = -1,
647 };
648 #endif
649
650 #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
651 static struct platform_device bfin_ac97_pcm = {
652 .name = "bfin-ac97-pcm-audio",
653 .id = -1,
654 };
655 #endif
656
657 #if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
658 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
659 static const char * const ad1836_link[] = {
660 "bfin-i2s.0",
661 "spi0.4",
662 };
663 static struct platform_device bfin_ad1836_machine = {
664 .name = "bfin-snd-ad1836",
665 .id = -1,
666 .dev = {
667 .platform_data = (void *)ad1836_link,
668 },
669 };
670 #endif
671
672 #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
673 defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
674 static const unsigned ad73311_gpio[] = {
675 GPIO_PF4,
676 };
677
678 static struct platform_device bfin_ad73311_machine = {
679 .name = "bfin-snd-ad73311",
680 .id = 1,
681 .dev = {
682 .platform_data = (void *)ad73311_gpio,
683 },
684 };
685 #endif
686
687 #if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
688 static struct platform_device bfin_ad73311_codec_device = {
689 .name = "ad73311",
690 .id = -1,
691 };
692 #endif
693
694 #if defined(CONFIG_SND_SOC_AD74111) || defined(CONFIG_SND_SOC_AD74111_MODULE)
695 static struct platform_device bfin_ad74111_codec_device = {
696 .name = "ad74111",
697 .id = -1,
698 };
699 #endif
700
701 #if defined(CONFIG_SND_BF5XX_SOC_I2S) || \
702 defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
703 static struct platform_device bfin_i2s = {
704 .name = "bfin-i2s",
705 .id = CONFIG_SND_BF5XX_SPORT_NUM,
706 .num_resources =
707 ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
708 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
709 .dev = {
710 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
711 },
712 };
713 #endif
714
715 #if defined(CONFIG_SND_BF5XX_SOC_AC97) || \
716 defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
717 static struct platform_device bfin_ac97 = {
718 .name = "bfin-ac97",
719 .id = CONFIG_SND_BF5XX_SPORT_NUM,
720 .num_resources =
721 ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
722 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
723 .dev = {
724 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
725 },
726 };
727 #endif
728
729 static struct platform_device *stamp_devices[] __initdata = {
730
731 &bfin_dpmc,
732
733 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
734 &rtc_device,
735 #endif
736
737 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
738 &smc91x_device,
739 #endif
740
741 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
742 &net2272_bfin_device,
743 #endif
744
745 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
746 &bfin_spi0_device,
747 #endif
748
749 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
750 #ifdef CONFIG_SERIAL_BFIN_UART0
751 &bfin_uart0_device,
752 #endif
753 #endif
754
755 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
756 #ifdef CONFIG_BFIN_SIR0
757 &bfin_sir0_device,
758 #endif
759 #endif
760
761 #if defined(CONFIG_SERIAL_BFIN_SPORT) || \
762 defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
763 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
764 &bfin_sport0_uart_device,
765 #endif
766 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
767 &bfin_sport1_uart_device,
768 #endif
769 #endif
770
771 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
772 &bfin_device_gpiokeys,
773 #endif
774
775 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
776 &i2c_gpio_device,
777 #endif
778
779 #if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE)
780 &stamp_flash_device,
781 #endif
782
783 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
784 &bfin_i2s_pcm,
785 #endif
786
787 #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
788 &bfin_ac97_pcm,
789 #endif
790
791 #if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
792 defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
793 &bfin_ad1836_machine,
794 #endif
795
796 #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
797 defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
798 &bfin_ad73311_machine,
799 #endif
800
801 #if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
802 &bfin_ad73311_codec_device,
803 #endif
804
805 #if defined(CONFIG_SND_SOC_AD74111) || defined(CONFIG_SND_SOC_AD74111_MODULE)
806 &bfin_ad74111_codec_device,
807 #endif
808
809 #if defined(CONFIG_SND_BF5XX_SOC_I2S) || \
810 defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
811 &bfin_i2s,
812 #endif
813
814 #if defined(CONFIG_SND_BF5XX_SOC_AC97) || \
815 defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
816 &bfin_ac97,
817 #endif
818 };
819
820 static int __init net2272_init(void)
821 {
822 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
823 int ret;
824
825 /* Set PF0 to 0, PF1 to 1 make /AMS3 work properly */
826 ret = gpio_request(GPIO_PF0, "net2272");
827 if (ret)
828 return ret;
829
830 ret = gpio_request(GPIO_PF1, "net2272");
831 if (ret) {
832 gpio_free(GPIO_PF0);
833 return ret;
834 }
835
836 ret = gpio_request(GPIO_PF11, "net2272");
837 if (ret) {
838 gpio_free(GPIO_PF0);
839 gpio_free(GPIO_PF1);
840 return ret;
841 }
842
843 gpio_direction_output(GPIO_PF0, 0);
844 gpio_direction_output(GPIO_PF1, 1);
845
846 /* Reset the USB chip */
847 gpio_direction_output(GPIO_PF11, 0);
848 mdelay(2);
849 gpio_set_value(GPIO_PF11, 1);
850 #endif
851
852 return 0;
853 }
854
855 static int __init stamp_init(void)
856 {
857 int ret;
858
859 printk(KERN_INFO "%s(): registering device resources\n", __func__);
860
861 i2c_register_board_info(0, bfin_i2c_board_info,
862 ARRAY_SIZE(bfin_i2c_board_info));
863
864 ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
865 if (ret < 0)
866 return ret;
867
868 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
869 /*
870 * setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC.
871 * the bfin-async-map driver takes care of flipping between
872 * flash and ethernet when necessary.
873 */
874 ret = gpio_request(GPIO_PF0, "enet_cpld");
875 if (!ret) {
876 gpio_direction_output(GPIO_PF0, 1);
877 gpio_free(GPIO_PF0);
878 }
879 #endif
880
881 if (net2272_init())
882 pr_warning("unable to configure net2272; it probably won't work\n");
883
884 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
885 return 0;
886 }
887
888 arch_initcall(stamp_init);
889
890 static struct platform_device *stamp_early_devices[] __initdata = {
891 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
892 #ifdef CONFIG_SERIAL_BFIN_UART0
893 &bfin_uart0_device,
894 #endif
895 #endif
896
897 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
898 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
899 &bfin_sport0_uart_device,
900 #endif
901 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
902 &bfin_sport1_uart_device,
903 #endif
904 #endif
905 };
906
907 void __init native_machine_early_platform_add_devices(void)
908 {
909 printk(KERN_INFO "register early platform devices\n");
910 early_platform_add_devices(stamp_early_devices,
911 ARRAY_SIZE(stamp_early_devices));
912 }
913
914 void native_machine_restart(char *cmd)
915 {
916 /* workaround pull up on cpld / flash pin not being strong enough */
917 gpio_request(GPIO_PF0, "flash_cpld");
918 gpio_direction_output(GPIO_PF0, 0);
919 }
920
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