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TOMOYO Linux Cross Reference
Linux/arch/cris/arch-v32/kernel/kgdb.c

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  1 /*
  2  *  arch/cris/arch-v32/kernel/kgdb.c
  3  *
  4  *  CRIS v32 version by Orjan Friberg, Axis Communications AB.
  5  *
  6  *  S390 version
  7  *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
  8  *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
  9  *
 10  *  Originally written by Glenn Engel, Lake Stevens Instrument Division
 11  *
 12  *  Contributed by HP Systems
 13  *
 14  *  Modified for SPARC by Stu Grossman, Cygnus Support.
 15  *
 16  *  Modified for Linux/MIPS (and MIPS in general) by Andreas Busse
 17  *  Send complaints, suggestions etc. to <andy@waldorf-gmbh.de>
 18  *
 19  *  Copyright (C) 1995 Andreas Busse
 20  */
 21 
 22 /* FIXME: Check the documentation. */
 23 
 24 /*
 25  *  kgdb usage notes:
 26  *  -----------------
 27  *
 28  * If you select CONFIG_ETRAX_KGDB in the configuration, the kernel will be
 29  * built with different gcc flags: "-g" is added to get debug infos, and
 30  * "-fomit-frame-pointer" is omitted to make debugging easier. Since the
 31  * resulting kernel will be quite big (approx. > 7 MB), it will be stripped
 32  * before compresion. Such a kernel will behave just as usually, except if
 33  * given a "debug=<device>" command line option. (Only serial devices are
 34  * allowed for <device>, i.e. no printers or the like; possible values are
 35  * machine depedend and are the same as for the usual debug device, the one
 36  * for logging kernel messages.) If that option is given and the device can be
 37  * initialized, the kernel will connect to the remote gdb in trap_init(). The
 38  * serial parameters are fixed to 8N1 and 115200 bps, for easyness of
 39  * implementation.
 40  *
 41  * To start a debugging session, start that gdb with the debugging kernel
 42  * image (the one with the symbols, vmlinux.debug) named on the command line.
 43  * This file will be used by gdb to get symbol and debugging infos about the
 44  * kernel. Next, select remote debug mode by
 45  *    target remote <device>
 46  * where <device> is the name of the serial device over which the debugged
 47  * machine is connected. Maybe you have to adjust the baud rate by
 48  *    set remotebaud <rate>
 49  * or also other parameters with stty:
 50  *    shell stty ... </dev/...
 51  * If the kernel to debug has already booted, it waited for gdb and now
 52  * connects, and you'll see a breakpoint being reported. If the kernel isn't
 53  * running yet, start it now. The order of gdb and the kernel doesn't matter.
 54  * Another thing worth knowing about in the getting-started phase is how to
 55  * debug the remote protocol itself. This is activated with
 56  *    set remotedebug 1
 57  * gdb will then print out each packet sent or received. You'll also get some
 58  * messages about the gdb stub on the console of the debugged machine.
 59  *
 60  * If all that works, you can use lots of the usual debugging techniques on
 61  * the kernel, e.g. inspecting and changing variables/memory, setting
 62  * breakpoints, single stepping and so on. It's also possible to interrupt the
 63  * debugged kernel by pressing C-c in gdb. Have fun! :-)
 64  *
 65  * The gdb stub is entered (and thus the remote gdb gets control) in the
 66  * following situations:
 67  *
 68  *  - If breakpoint() is called. This is just after kgdb initialization, or if
 69  *    a breakpoint() call has been put somewhere into the kernel source.
 70  *    (Breakpoints can of course also be set the usual way in gdb.)
 71  *    In eLinux, we call breakpoint() in init/main.c after IRQ initialization.
 72  *
 73  *  - If there is a kernel exception, i.e. bad_super_trap() or die_if_kernel()
 74  *    are entered. All the CPU exceptions are mapped to (more or less..., see
 75  *    the hard_trap_info array below) appropriate signal, which are reported
 76  *    to gdb. die_if_kernel() is usually called after some kind of access
 77  *    error and thus is reported as SIGSEGV.
 78  *
 79  *  - When panic() is called. This is reported as SIGABRT.
 80  *
 81  *  - If C-c is received over the serial line, which is treated as
 82  *    SIGINT.
 83  *
 84  * Of course, all these signals are just faked for gdb, since there is no
 85  * signal concept as such for the kernel. It also isn't possible --obviously--
 86  * to set signal handlers from inside gdb, or restart the kernel with a
 87  * signal.
 88  *
 89  * Current limitations:
 90  *
 91  *  - While the kernel is stopped, interrupts are disabled for safety reasons
 92  *    (i.e., variables not changing magically or the like). But this also
 93  *    means that the clock isn't running anymore, and that interrupts from the
 94  *    hardware may get lost/not be served in time. This can cause some device
 95  *    errors...
 96  *
 97  *  - When single-stepping, only one instruction of the current thread is
 98  *    executed, but interrupts are allowed for that time and will be serviced
 99  *    if pending. Be prepared for that.
100  *
101  *  - All debugging happens in kernel virtual address space. There's no way to
102  *    access physical memory not mapped in kernel space, or to access user
103  *    space. A way to work around this is using get_user_long & Co. in gdb
104  *    expressions, but only for the current process.
105  *
106  *  - Interrupting the kernel only works if interrupts are currently allowed,
107  *    and the interrupt of the serial line isn't blocked by some other means
108  *    (IPL too high, disabled, ...)
109  *
110  *  - The gdb stub is currently not reentrant, i.e. errors that happen therein
111  *    (e.g. accessing invalid memory) may not be caught correctly. This could
112  *    be removed in future by introducing a stack of struct registers.
113  *
114  */
115 
116 /*
117  *  To enable debugger support, two things need to happen.  One, a
118  *  call to kgdb_init() is necessary in order to allow any breakpoints
119  *  or error conditions to be properly intercepted and reported to gdb.
120  *  Two, a breakpoint needs to be generated to begin communication.  This
121  *  is most easily accomplished by a call to breakpoint().
122  *
123  *    The following gdb commands are supported:
124  *
125  * command          function                               Return value
126  *
127  *    g             return the value of the CPU registers  hex data or ENN
128  *    G             set the value of the CPU registers     OK or ENN
129  *
130  *    mAA..AA,LLLL  Read LLLL bytes at address AA..AA      hex data or ENN
131  *    MAA..AA,LLLL: Write LLLL bytes at address AA.AA      OK or ENN
132  *
133  *    c             Resume at current address              SNN   ( signal NN)
134  *    cAA..AA       Continue at address AA..AA             SNN
135  *
136  *    s             Step one instruction                   SNN
137  *    sAA..AA       Step one instruction from AA..AA       SNN
138  *
139  *    k             kill
140  *
141  *    ?             What was the last sigval ?             SNN   (signal NN)
142  *
143  *    bBB..BB       Set baud rate to BB..BB                OK or BNN, then sets
144  *                                                         baud rate
145  *
146  * All commands and responses are sent with a packet which includes a
147  * checksum.  A packet consists of
148  *
149  * $<packet info>#<checksum>.
150  *
151  * where
152  * <packet info> :: <characters representing the command or response>
153  * <checksum>    :: < two hex digits computed as modulo 256 sum of <packetinfo>>
154  *
155  * When a packet is received, it is first acknowledged with either '+' or '-'.
156  * '+' indicates a successful transfer.  '-' indicates a failed transfer.
157  *
158  * Example:
159  *
160  * Host:                  Reply:
161  * $m0,10#2a               +$00010203040506070809101112131415#42
162  *
163  */
164 
165 
166 #include <linux/string.h>
167 #include <linux/signal.h>
168 #include <linux/kernel.h>
169 #include <linux/delay.h>
170 #include <linux/linkage.h>
171 #include <linux/reboot.h>
172 
173 #include <asm/setup.h>
174 #include <asm/ptrace.h>
175 
176 #include <asm/irq.h>
177 #include <hwregs/reg_map.h>
178 #include <hwregs/reg_rdwr.h>
179 #include <hwregs/intr_vect_defs.h>
180 #include <hwregs/ser_defs.h>
181 
182 /* From entry.S. */
183 extern void gdb_handle_exception(void);
184 /* From kgdb_asm.S. */
185 extern void kgdb_handle_exception(void);
186 
187 static int kgdb_started = 0;
188 
189 /********************************* Register image ****************************/
190 
191 typedef
192 struct register_image
193 {
194                               /* Offset */
195         unsigned int   r0;    /* 0x00 */
196         unsigned int   r1;    /* 0x04 */
197         unsigned int   r2;    /* 0x08 */
198         unsigned int   r3;    /* 0x0C */
199         unsigned int   r4;    /* 0x10 */
200         unsigned int   r5;    /* 0x14 */
201         unsigned int   r6;    /* 0x18 */
202         unsigned int   r7;    /* 0x1C */
203         unsigned int   r8;    /* 0x20; Frame pointer (if any) */
204         unsigned int   r9;    /* 0x24 */
205         unsigned int   r10;   /* 0x28 */
206         unsigned int   r11;   /* 0x2C */
207         unsigned int   r12;   /* 0x30 */
208         unsigned int   r13;   /* 0x34 */
209         unsigned int   sp;    /* 0x38; R14, Stack pointer */
210         unsigned int   acr;   /* 0x3C; R15, Address calculation register. */
211 
212         unsigned char  bz;    /* 0x40; P0, 8-bit zero register */
213         unsigned char  vr;    /* 0x41; P1, Version register (8-bit) */
214         unsigned int   pid;   /* 0x42; P2, Process ID */
215         unsigned char  srs;   /* 0x46; P3, Support register select (8-bit) */
216         unsigned short wz;    /* 0x47; P4, 16-bit zero register */
217         unsigned int   exs;   /* 0x49; P5, Exception status */
218         unsigned int   eda;   /* 0x4D; P6, Exception data address */
219         unsigned int   mof;   /* 0x51; P7, Multiply overflow register */
220         unsigned int   dz;    /* 0x55; P8, 32-bit zero register */
221         unsigned int   ebp;   /* 0x59; P9, Exception base pointer */
222         unsigned int   erp;   /* 0x5D; P10, Exception return pointer. Contains the PC we are interested in. */
223         unsigned int   srp;   /* 0x61; P11, Subroutine return pointer */
224         unsigned int   nrp;   /* 0x65; P12, NMI return pointer */
225         unsigned int   ccs;   /* 0x69; P13, Condition code stack */
226         unsigned int   usp;   /* 0x6D; P14, User mode stack pointer */
227         unsigned int   spc;   /* 0x71; P15, Single step PC */
228         unsigned int   pc;    /* 0x75; Pseudo register (for the most part set to ERP). */
229 
230 } registers;
231 
232 typedef
233 struct bp_register_image
234 {
235         /* Support register bank 0. */
236         unsigned int   s0_0;
237         unsigned int   s1_0;
238         unsigned int   s2_0;
239         unsigned int   s3_0;
240         unsigned int   s4_0;
241         unsigned int   s5_0;
242         unsigned int   s6_0;
243         unsigned int   s7_0;
244         unsigned int   s8_0;
245         unsigned int   s9_0;
246         unsigned int   s10_0;
247         unsigned int   s11_0;
248         unsigned int   s12_0;
249         unsigned int   s13_0;
250         unsigned int   s14_0;
251         unsigned int   s15_0;
252 
253         /* Support register bank 1. */
254         unsigned int   s0_1;
255         unsigned int   s1_1;
256         unsigned int   s2_1;
257         unsigned int   s3_1;
258         unsigned int   s4_1;
259         unsigned int   s5_1;
260         unsigned int   s6_1;
261         unsigned int   s7_1;
262         unsigned int   s8_1;
263         unsigned int   s9_1;
264         unsigned int   s10_1;
265         unsigned int   s11_1;
266         unsigned int   s12_1;
267         unsigned int   s13_1;
268         unsigned int   s14_1;
269         unsigned int   s15_1;
270 
271         /* Support register bank 2. */
272         unsigned int   s0_2;
273         unsigned int   s1_2;
274         unsigned int   s2_2;
275         unsigned int   s3_2;
276         unsigned int   s4_2;
277         unsigned int   s5_2;
278         unsigned int   s6_2;
279         unsigned int   s7_2;
280         unsigned int   s8_2;
281         unsigned int   s9_2;
282         unsigned int   s10_2;
283         unsigned int   s11_2;
284         unsigned int   s12_2;
285         unsigned int   s13_2;
286         unsigned int   s14_2;
287         unsigned int   s15_2;
288 
289         /* Support register bank 3. */
290         unsigned int   s0_3; /* BP_CTRL */
291         unsigned int   s1_3; /* BP_I0_START */
292         unsigned int   s2_3; /* BP_I0_END */
293         unsigned int   s3_3; /* BP_D0_START */
294         unsigned int   s4_3; /* BP_D0_END */
295         unsigned int   s5_3; /* BP_D1_START */
296         unsigned int   s6_3; /* BP_D1_END */
297         unsigned int   s7_3; /* BP_D2_START */
298         unsigned int   s8_3; /* BP_D2_END */
299         unsigned int   s9_3; /* BP_D3_START */
300         unsigned int   s10_3; /* BP_D3_END */
301         unsigned int   s11_3; /* BP_D4_START */
302         unsigned int   s12_3; /* BP_D4_END */
303         unsigned int   s13_3; /* BP_D5_START */
304         unsigned int   s14_3; /* BP_D5_END */
305         unsigned int   s15_3; /* BP_RESERVED */
306 
307 } support_registers;
308 
309 enum register_name
310 {
311         R0,  R1,  R2,  R3,
312         R4,  R5,  R6,  R7,
313         R8,  R9,  R10, R11,
314         R12, R13, SP,  ACR,
315 
316         BZ,  VR,  PID, SRS,
317         WZ,  EXS, EDA, MOF,
318         DZ,  EBP, ERP, SRP,
319         NRP, CCS, USP, SPC,
320         PC,
321 
322         S0,  S1,  S2,  S3,
323         S4,  S5,  S6,  S7,
324         S8,  S9,  S10, S11,
325         S12, S13, S14, S15
326 
327 };
328 
329 /* The register sizes of the registers in register_name. An unimplemented register
330    is designated by size 0 in this array. */
331 static int register_size[] =
332 {
333         4, 4, 4, 4,
334         4, 4, 4, 4,
335         4, 4, 4, 4,
336         4, 4, 4, 4,
337 
338         1, 1, 4, 1,
339         2, 4, 4, 4,
340         4, 4, 4, 4,
341         4, 4, 4, 4,
342 
343         4,
344 
345         4, 4, 4, 4,
346         4, 4, 4, 4,
347         4, 4, 4, 4,
348         4, 4, 4
349 
350 };
351 
352 /* Contains the register image of the kernel.
353    (Global so that they can be reached from assembler code.) */
354 registers reg;
355 support_registers sreg;
356 
357 /************** Prototypes for local library functions ***********************/
358 
359 /* Copy of strcpy from libc. */
360 static char *gdb_cris_strcpy(char *s1, const char *s2);
361 
362 /* Copy of strlen from libc. */
363 static int gdb_cris_strlen(const char *s);
364 
365 /* Copy of memchr from libc. */
366 static void *gdb_cris_memchr(const void *s, int c, int n);
367 
368 /* Copy of strtol from libc. Does only support base 16. */
369 static int gdb_cris_strtol(const char *s, char **endptr, int base);
370 
371 /********************** Prototypes for local functions. **********************/
372 
373 /* Write a value to a specified register regno in the register image
374    of the current thread. */
375 static int write_register(int regno, char *val);
376 
377 /* Read a value from a specified register in the register image. Returns the
378    status of the read operation. The register value is returned in valptr. */
379 static int read_register(char regno, unsigned int *valptr);
380 
381 /* Serial port, reads one character. ETRAX 100 specific. from debugport.c */
382 int getDebugChar(void);
383 
384 /* Serial port, writes one character. ETRAX 100 specific. from debugport.c */
385 void putDebugChar(int val);
386 
387 /* Returns the integer equivalent of a hexadecimal character. */
388 static int hex(char ch);
389 
390 /* Convert the memory, pointed to by mem into hexadecimal representation.
391    Put the result in buf, and return a pointer to the last character
392    in buf (null). */
393 static char *mem2hex(char *buf, unsigned char *mem, int count);
394 
395 /* Convert the array, in hexadecimal representation, pointed to by buf into
396    binary representation. Put the result in mem, and return a pointer to
397    the character after the last byte written. */
398 static unsigned char *hex2mem(unsigned char *mem, char *buf, int count);
399 
400 /* Put the content of the array, in binary representation, pointed to by buf
401    into memory pointed to by mem, and return a pointer to
402    the character after the last byte written. */
403 static unsigned char *bin2mem(unsigned char *mem, unsigned char *buf, int count);
404 
405 /* Await the sequence $<data>#<checksum> and store <data> in the array buffer
406    returned. */
407 static void getpacket(char *buffer);
408 
409 /* Send $<data>#<checksum> from the <data> in the array buffer. */
410 static void putpacket(char *buffer);
411 
412 /* Build and send a response packet in order to inform the host the
413    stub is stopped. */
414 static void stub_is_stopped(int sigval);
415 
416 /* All expected commands are sent from remote.c. Send a response according
417    to the description in remote.c. Not static since it needs to be reached
418    from assembler code. */
419 void handle_exception(int sigval);
420 
421 /* Performs a complete re-start from scratch. ETRAX specific. */
422 static void kill_restart(void);
423 
424 /******************** Prototypes for global functions. ***********************/
425 
426 /* The string str is prepended with the GDB printout token and sent. */
427 void putDebugString(const unsigned char *str, int len);
428 
429 /* A static breakpoint to be used at startup. */
430 void breakpoint(void);
431 
432 /* Avoid warning as the internal_stack is not used in the C-code. */
433 #define USEDVAR(name)    { if (name) { ; } }
434 #define USEDFUN(name) { void (*pf)(void) = (void *)name; USEDVAR(pf) }
435 
436 /********************************** Packet I/O ******************************/
437 /* BUFMAX defines the maximum number of characters in
438    inbound/outbound buffers */
439 /* FIXME: How do we know it's enough? */
440 #define BUFMAX 512
441 
442 /* Run-length encoding maximum length. Send 64 at most. */
443 #define RUNLENMAX 64
444 
445 /* The inbound/outbound buffers used in packet I/O */
446 static char input_buffer[BUFMAX];
447 static char output_buffer[BUFMAX];
448 
449 /* Error and warning messages. */
450 enum error_type
451 {
452         SUCCESS, E01, E02, E03, E04, E05, E06,
453 };
454 
455 static char *error_message[] =
456 {
457         "",
458         "E01 Set current or general thread - H[c,g] - internal error.",
459         "E02 Change register content - P - cannot change read-only register.",
460         "E03 Thread is not alive.", /* T, not used. */
461         "E04 The command is not supported - [s,C,S,!,R,d,r] - internal error.",
462         "E05 Change register content - P - the register is not implemented..",
463         "E06 Change memory content - M - internal error.",
464 };
465 
466 /********************************** Breakpoint *******************************/
467 /* Use an internal stack in the breakpoint and interrupt response routines.
468    FIXME: How do we know the size of this stack is enough?
469    Global so it can be reached from assembler code. */
470 #define INTERNAL_STACK_SIZE 1024
471 char internal_stack[INTERNAL_STACK_SIZE];
472 
473 /* Due to the breakpoint return pointer, a state variable is needed to keep
474    track of whether it is a static (compiled) or dynamic (gdb-invoked)
475    breakpoint to be handled. A static breakpoint uses the content of register
476    ERP as it is whereas a dynamic breakpoint requires subtraction with 2
477    in order to execute the instruction. The first breakpoint is static; all
478    following are assumed to be dynamic. */
479 static int dynamic_bp = 0;
480 
481 /********************************* String library ****************************/
482 /* Single-step over library functions creates trap loops. */
483 
484 /* Copy char s2[] to s1[]. */
485 static char*
486 gdb_cris_strcpy(char *s1, const char *s2)
487 {
488         char *s = s1;
489 
490         for (s = s1; (*s++ = *s2++) != '\0'; )
491                 ;
492         return s1;
493 }
494 
495 /* Find length of s[]. */
496 static int
497 gdb_cris_strlen(const char *s)
498 {
499         const char *sc;
500 
501         for (sc = s; *sc != '\0'; sc++)
502                 ;
503         return (sc - s);
504 }
505 
506 /* Find first occurrence of c in s[n]. */
507 static void*
508 gdb_cris_memchr(const void *s, int c, int n)
509 {
510         const unsigned char uc = c;
511         const unsigned char *su;
512 
513         for (su = s; 0 < n; ++su, --n)
514                 if (*su == uc)
515                         return (void *)su;
516         return NULL;
517 }
518 /******************************* Standard library ****************************/
519 /* Single-step over library functions creates trap loops. */
520 /* Convert string to long. */
521 static int
522 gdb_cris_strtol(const char *s, char **endptr, int base)
523 {
524         char *s1;
525         char *sd;
526         int x = 0;
527 
528         for (s1 = (char*)s; (sd = gdb_cris_memchr(hex_asc, *s1, base)) != NULL; ++s1)
529                 x = x * base + (sd - hex_asc);
530 
531         if (endptr) {
532                 /* Unconverted suffix is stored in endptr unless endptr is NULL. */
533                 *endptr = s1;
534         }
535 
536         return x;
537 }
538 
539 /********************************* Register image ****************************/
540 
541 /* Write a value to a specified register in the register image of the current
542    thread. Returns status code SUCCESS, E02 or E05. */
543 static int
544 write_register(int regno, char *val)
545 {
546         int status = SUCCESS;
547 
548         if (regno >= R0 && regno <= ACR) {
549                 /* Consecutive 32-bit registers. */
550                 hex2mem((unsigned char *)&reg.r0 + (regno - R0) * sizeof(unsigned int),
551                         val, sizeof(unsigned int));
552 
553         } else if (regno == BZ || regno == VR || regno == WZ || regno == DZ) {
554                 /* Read-only registers. */
555                 status = E02;
556 
557         } else if (regno == PID) {
558                 /* 32-bit register. (Even though we already checked SRS and WZ, we cannot
559                    combine this with the EXS - SPC write since SRS and WZ have different size.) */
560                 hex2mem((unsigned char *)&reg.pid, val, sizeof(unsigned int));
561 
562         } else if (regno == SRS) {
563                 /* 8-bit register. */
564                 hex2mem((unsigned char *)&reg.srs, val, sizeof(unsigned char));
565 
566         } else if (regno >= EXS && regno <= SPC) {
567                 /* Consecutive 32-bit registers. */
568                 hex2mem((unsigned char *)&reg.exs + (regno - EXS) * sizeof(unsigned int),
569                          val, sizeof(unsigned int));
570 
571        } else if (regno == PC) {
572                /* Pseudo-register. Treat as read-only. */
573                status = E02;
574 
575        } else if (regno >= S0 && regno <= S15) {
576                /* 32-bit registers. */
577                hex2mem((unsigned char *)&sreg.s0_0 + (reg.srs * 16 * sizeof(unsigned int)) + (regno - S0) * sizeof(unsigned int), val, sizeof(unsigned int));
578         } else {
579                 /* Non-existing register. */
580                 status = E05;
581         }
582         return status;
583 }
584 
585 /* Read a value from a specified register in the register image. Returns the
586    value in the register or -1 for non-implemented registers. */
587 static int
588 read_register(char regno, unsigned int *valptr)
589 {
590         int status = SUCCESS;
591 
592         /* We read the zero registers from the register struct (instead of just returning 0)
593            to catch errors. */
594 
595         if (regno >= R0 && regno <= ACR) {
596                 /* Consecutive 32-bit registers. */
597                 *valptr = *(unsigned int *)((char *)&reg.r0 + (regno - R0) * sizeof(unsigned int));
598 
599         } else if (regno == BZ || regno == VR) {
600                 /* Consecutive 8-bit registers. */
601                 *valptr = (unsigned int)(*(unsigned char *)
602                                          ((char *)&reg.bz + (regno - BZ) * sizeof(char)));
603 
604         } else if (regno == PID) {
605                 /* 32-bit register. */
606                 *valptr =  *(unsigned int *)((char *)&reg.pid);
607 
608         } else if (regno == SRS) {
609                 /* 8-bit register. */
610                 *valptr = (unsigned int)(*(unsigned char *)((char *)&reg.srs));
611 
612         } else if (regno == WZ) {
613                 /* 16-bit register. */
614                 *valptr = (unsigned int)(*(unsigned short *)(char *)&reg.wz);
615 
616         } else if (regno >= EXS && regno <= PC) {
617                 /* Consecutive 32-bit registers. */
618                 *valptr = *(unsigned int *)((char *)&reg.exs + (regno - EXS) * sizeof(unsigned int));
619 
620         } else if (regno >= S0 && regno <= S15) {
621                 /* Consecutive 32-bit registers, located elsewhere. */
622                 *valptr = *(unsigned int *)((char *)&sreg.s0_0 + (reg.srs * 16 * sizeof(unsigned int)) + (regno - S0) * sizeof(unsigned int));
623 
624         } else {
625                 /* Non-existing register. */
626                 status = E05;
627         }
628         return status;
629 
630 }
631 
632 /********************************** Packet I/O ******************************/
633 /* Returns the integer equivalent of a hexadecimal character. */
634 static int
635 hex(char ch)
636 {
637         if ((ch >= 'a') && (ch <= 'f'))
638                 return (ch - 'a' + 10);
639         if ((ch >= '') && (ch <= '9'))
640                 return (ch - '');
641         if ((ch >= 'A') && (ch <= 'F'))
642                 return (ch - 'A' + 10);
643         return -1;
644 }
645 
646 /* Convert the memory, pointed to by mem into hexadecimal representation.
647    Put the result in buf, and return a pointer to the last character
648    in buf (null). */
649 
650 static char *
651 mem2hex(char *buf, unsigned char *mem, int count)
652 {
653         int i;
654         int ch;
655 
656         if (mem == NULL) {
657                 /* Invalid address, caught by 'm' packet handler. */
658                 for (i = 0; i < count; i++) {
659                         *buf++ = '';
660                         *buf++ = '';
661                 }
662         } else {
663                 /* Valid mem address. */
664                 for (i = 0; i < count; i++) {
665                         ch = *mem++;
666                         buf = hex_byte_pack(buf, ch);
667                 }
668         }
669         /* Terminate properly. */
670         *buf = '\0';
671         return buf;
672 }
673 
674 /* Same as mem2hex, but puts it in network byte order. */
675 static char *
676 mem2hex_nbo(char *buf, unsigned char *mem, int count)
677 {
678         int i;
679         int ch;
680 
681         mem += count - 1;
682         for (i = 0; i < count; i++) {
683                 ch = *mem--;
684                 buf = hex_byte_pack(buf, ch);
685         }
686 
687         /* Terminate properly. */
688         *buf = '\0';
689         return buf;
690 }
691 
692 /* Convert the array, in hexadecimal representation, pointed to by buf into
693    binary representation. Put the result in mem, and return a pointer to
694    the character after the last byte written. */
695 static unsigned char*
696 hex2mem(unsigned char *mem, char *buf, int count)
697 {
698         int i;
699         unsigned char ch;
700         for (i = 0; i < count; i++) {
701                 ch = hex (*buf++) << 4;
702                 ch = ch + hex (*buf++);
703                 *mem++ = ch;
704         }
705         return mem;
706 }
707 
708 /* Put the content of the array, in binary representation, pointed to by buf
709    into memory pointed to by mem, and return a pointer to the character after
710    the last byte written.
711    Gdb will escape $, #, and the escape char (0x7d). */
712 static unsigned char*
713 bin2mem(unsigned char *mem, unsigned char *buf, int count)
714 {
715         int i;
716         unsigned char *next;
717         for (i = 0; i < count; i++) {
718                 /* Check for any escaped characters. Be paranoid and
719                    only unescape chars that should be escaped. */
720                 if (*buf == 0x7d) {
721                         next = buf + 1;
722                         if (*next == 0x3 || *next == 0x4 || *next == 0x5D) {
723                                  /* #, $, ESC */
724                                 buf++;
725                                 *buf += 0x20;
726                         }
727                 }
728                 *mem++ = *buf++;
729         }
730         return mem;
731 }
732 
733 /* Await the sequence $<data>#<checksum> and store <data> in the array buffer
734    returned. */
735 static void
736 getpacket(char *buffer)
737 {
738         unsigned char checksum;
739         unsigned char xmitcsum;
740         int i;
741         int count;
742         char ch;
743 
744         do {
745                 while((ch = getDebugChar ()) != '$')
746                         /* Wait for the start character $ and ignore all other characters */;
747                 checksum = 0;
748                 xmitcsum = -1;
749                 count = 0;
750                 /* Read until a # or the end of the buffer is reached */
751                 while (count < BUFMAX) {
752                         ch = getDebugChar();
753                         if (ch == '#')
754                                 break;
755                         checksum = checksum + ch;
756                         buffer[count] = ch;
757                         count = count + 1;
758                 }
759 
760                 if (count >= BUFMAX)
761                         continue;
762 
763                 buffer[count] = 0;
764 
765                 if (ch == '#') {
766                         xmitcsum = hex(getDebugChar()) << 4;
767                         xmitcsum += hex(getDebugChar());
768                         if (checksum != xmitcsum) {
769                                 /* Wrong checksum */
770                                 putDebugChar('-');
771                         } else {
772                                 /* Correct checksum */
773                                 putDebugChar('+');
774                                 /* If sequence characters are received, reply with them */
775                                 if (buffer[2] == ':') {
776                                         putDebugChar(buffer[0]);
777                                         putDebugChar(buffer[1]);
778                                         /* Remove the sequence characters from the buffer */
779                                         count = gdb_cris_strlen(buffer);
780                                         for (i = 3; i <= count; i++)
781                                                 buffer[i - 3] = buffer[i];
782                                 }
783                         }
784                 }
785         } while (checksum != xmitcsum);
786 }
787 
788 /* Send $<data>#<checksum> from the <data> in the array buffer. */
789 
790 static void
791 putpacket(char *buffer)
792 {
793         int checksum;
794         int runlen;
795         int encode;
796 
797         do {
798                 char *src = buffer;
799                 putDebugChar('$');
800                 checksum = 0;
801                 while (*src) {
802                         /* Do run length encoding */
803                         putDebugChar(*src);
804                         checksum += *src;
805                         runlen = 0;
806                         while (runlen < RUNLENMAX && *src == src[runlen]) {
807                                 runlen++;
808                         }
809                         if (runlen > 3) {
810                                 /* Got a useful amount */
811                                 putDebugChar ('*');
812                                 checksum += '*';
813                                 encode = runlen + ' ' - 4;
814                                 putDebugChar(encode);
815                                 checksum += encode;
816                                 src += runlen;
817                         } else {
818                                 src++;
819                         }
820                 }
821                 putDebugChar('#');
822                 putDebugChar(hex_asc_hi(checksum));
823                 putDebugChar(hex_asc_lo(checksum));
824         } while(kgdb_started && (getDebugChar() != '+'));
825 }
826 
827 /* The string str is prepended with the GDB printout token and sent. Required
828    in traditional implementations. */
829 void
830 putDebugString(const unsigned char *str, int len)
831 {
832         /* Move SPC forward if we are single-stepping. */
833         asm("spchere:");
834         asm("move $spc, $r10");
835         asm("cmp.d spchere, $r10");
836         asm("bne nosstep");
837         asm("nop");
838         asm("move.d spccont, $r10");
839         asm("move $r10, $spc");
840         asm("nosstep:");
841 
842         output_buffer[0] = 'O';
843         mem2hex(&output_buffer[1], (unsigned char *)str, len);
844         putpacket(output_buffer);
845 
846         asm("spccont:");
847 }
848 
849 /********************************** Handle exceptions ************************/
850 /* Build and send a response packet in order to inform the host the
851    stub is stopped. TAAn...:r...;n...:r...;n...:r...;
852                     AA = signal number
853                     n... = register number (hex)
854                     r... = register contents
855                     n... = `thread'
856                     r... = thread process ID.  This is a hex integer.
857                     n... = other string not starting with valid hex digit.
858                     gdb should ignore this n,r pair and go on to the next.
859                     This way we can extend the protocol. */
860 static void
861 stub_is_stopped(int sigval)
862 {
863         char *ptr = output_buffer;
864         unsigned int reg_cont;
865 
866         /* Send trap type (converted to signal) */
867 
868         *ptr++ = 'T';
869         ptr = hex_byte_pack(ptr, sigval);
870 
871         if (((reg.exs & 0xff00) >> 8) == 0xc) {
872 
873                 /* Some kind of hardware watchpoint triggered. Find which one
874                    and determine its type (read/write/access).  */
875                 int S, bp, trig_bits = 0, rw_bits = 0;
876                 int trig_mask = 0;
877                 unsigned int *bp_d_regs = &sreg.s3_3;
878                 /* In a lot of cases, the stopped data address will simply be EDA.
879                    In some cases, we adjust it to match the watched data range.
880                    (We don't want to change the actual EDA though). */
881                 unsigned int stopped_data_address;
882                 /* The S field of EXS. */
883                 S = (reg.exs & 0xffff0000) >> 16;
884 
885                 if (S & 1) {
886                         /* Instruction watchpoint. */
887                         /* FIXME: Check against, and possibly adjust reported EDA. */
888                 } else {
889                         /* Data watchpoint.  Find the one that triggered. */
890                         for (bp = 0; bp < 6; bp++) {
891 
892                                 /* Dx_RD, Dx_WR in the S field of EXS for this BP. */
893                                 int bitpos_trig = 1 + bp * 2;
894                                 /* Dx_BPRD, Dx_BPWR in BP_CTRL for this BP. */
895                                 int bitpos_config = 2 + bp * 4;
896 
897                                 /* Get read/write trig bits for this BP. */
898                                 trig_bits = (S & (3 << bitpos_trig)) >> bitpos_trig;
899 
900                                 /* Read/write config bits for this BP. */
901                                 rw_bits = (sreg.s0_3 & (3 << bitpos_config)) >> bitpos_config;
902                                 if (trig_bits) {
903                                         /* Sanity check: the BP shouldn't trigger for accesses
904                                            that it isn't configured for. */
905                                         if ((rw_bits == 0x1 && trig_bits != 0x1) ||
906                                             (rw_bits == 0x2 && trig_bits != 0x2))
907                                                 panic("Invalid r/w trigging for this BP");
908 
909                                         /* Mark this BP as trigged for future reference. */
910                                         trig_mask |= (1 << bp);
911 
912                                         if (reg.eda >= bp_d_regs[bp * 2] &&
913                                             reg.eda <= bp_d_regs[bp * 2 + 1]) {
914                                                 /* EDA within range for this BP; it must be the one
915                                                    we're looking for. */
916                                                 stopped_data_address = reg.eda;
917                                                 break;
918                                         }
919                                 }
920                         }
921                         if (bp < 6) {
922                                 /* Found a trigged BP with EDA within its configured data range. */
923                         } else if (trig_mask) {
924                                 /* Something triggered, but EDA doesn't match any BP's range. */
925                                 for (bp = 0; bp < 6; bp++) {
926                                         /* Dx_BPRD, Dx_BPWR in BP_CTRL for this BP. */
927                                         int bitpos_config = 2 + bp * 4;
928 
929                                         /* Read/write config bits for this BP (needed later). */
930                                         rw_bits = (sreg.s0_3 & (3 << bitpos_config)) >> bitpos_config;
931 
932                                         if (trig_mask & (1 << bp)) {
933                                                 /* EDA within 31 bytes of the configured start address? */
934                                                 if (reg.eda + 31 >= bp_d_regs[bp * 2]) {
935                                                         /* Changing the reported address to match
936                                                            the start address of the first applicable BP. */
937                                                         stopped_data_address = bp_d_regs[bp * 2];
938                                                         break;
939                                                 } else {
940                                                         /* We continue since we might find another useful BP. */
941                                                         printk("EDA doesn't match trigged BP's range");
942                                                 }
943                                         }
944                                 }
945                         }
946 
947                         /* No match yet? */
948                         BUG_ON(bp >= 6);
949                         /* Note that we report the type according to what the BP is configured
950                            for (otherwise we'd never report an 'awatch'), not according to how
951                            it trigged. We did check that the trigged bits match what the BP is
952                            configured for though. */
953                         if (rw_bits == 0x1) {
954                                 /* read */
955                                 strncpy(ptr, "rwatch", 6);
956                                 ptr += 6;
957                         } else if (rw_bits == 0x2) {
958                                 /* write */
959                                 strncpy(ptr, "watch", 5);
960                                 ptr += 5;
961                         } else if (rw_bits == 0x3) {
962                                 /* access */
963                                 strncpy(ptr, "awatch", 6);
964                                 ptr += 6;
965                         } else {
966                                 panic("Invalid r/w bits for this BP.");
967                         }
968 
969                         *ptr++ = ':';
970                         /* Note that we don't read_register(EDA, ...) */
971                         ptr = mem2hex_nbo(ptr, (unsigned char *)&stopped_data_address, register_size[EDA]);
972                         *ptr++ = ';';
973                 }
974         }
975         /* Only send PC, frame and stack pointer. */
976         read_register(PC, &reg_cont);
977         ptr = hex_byte_pack(ptr, PC);
978         *ptr++ = ':';
979         ptr = mem2hex(ptr, (unsigned char *)&reg_cont, register_size[PC]);
980         *ptr++ = ';';
981 
982         read_register(R8, &reg_cont);
983         ptr = hex_byte_pack(ptr, R8);
984         *ptr++ = ':';
985         ptr = mem2hex(ptr, (unsigned char *)&reg_cont, register_size[R8]);
986         *ptr++ = ';';
987 
988         read_register(SP, &reg_cont);
989         ptr = hex_byte_pack(ptr, SP);
990         *ptr++ = ':';
991         ptr = mem2hex(ptr, (unsigned char *)&reg_cont, register_size[SP]);
992         *ptr++ = ';';
993 
994         /* Send ERP as well; this will save us an entire register fetch in some cases. */
995         read_register(ERP, &reg_cont);
996         ptr = hex_byte_pack(ptr, ERP);
997         *ptr++ = ':';
998         ptr = mem2hex(ptr, (unsigned char *)&reg_cont, register_size[ERP]);
999         *ptr++ = ';';
1000 
1001         /* null-terminate and send it off */
1002         *ptr = 0;
1003         putpacket(output_buffer);
1004 }
1005 
1006 /* Returns the size of an instruction that has a delay slot. */
1007 
1008 int insn_size(unsigned long pc)
1009 {
1010         unsigned short opcode = *(unsigned short *)pc;
1011         int size = 0;
1012 
1013         switch ((opcode & 0x0f00) >> 8) {
1014         case 0x0:
1015         case 0x9:
1016         case 0xb:
1017                 size = 2;
1018                 break;
1019         case 0xe:
1020         case 0xf:
1021                 size = 6;
1022                 break;
1023         case 0xd:
1024                 /* Could be 4 or 6; check more bits. */
1025                 if ((opcode & 0xff) == 0xff)
1026                         size = 4;
1027                 else
1028                         size = 6;
1029                 break;
1030         default:
1031                 panic("Couldn't find size of opcode 0x%x at 0x%lx\n", opcode, pc);
1032         }
1033 
1034         return size;
1035 }
1036 
1037 void register_fixup(int sigval)
1038 {
1039         /* Compensate for ACR push at the beginning of exception handler. */
1040         reg.sp += 4;
1041 
1042         /* Standard case. */
1043         reg.pc = reg.erp;
1044         if (reg.erp & 0x1) {
1045                 /* Delay slot bit set.  Report as stopped on proper instruction.  */
1046                 if (reg.spc) {
1047                         /* Rely on SPC if set. */
1048                         reg.pc = reg.spc;
1049                 } else {
1050                         /* Calculate the PC from the size of the instruction
1051                            that the delay slot we're in belongs to. */
1052                         reg.pc += insn_size(reg.erp & ~1) - 1 ;
1053                 }
1054         }
1055 
1056         if ((reg.exs & 0x3) == 0x0) {
1057                 /* Bits 1 - 0 indicate the type of memory operation performed
1058                    by the interrupted instruction. 0 means no memory operation,
1059                    and EDA is undefined in that case. We zero it to avoid confusion. */
1060                 reg.eda = 0;
1061         }
1062 
1063         if (sigval == SIGTRAP) {
1064                 /* Break 8, single step or hardware breakpoint exception. */
1065 
1066                 /* Check IDX field of EXS. */
1067                 if (((reg.exs & 0xff00) >> 8) == 0x18) {
1068 
1069                         /* Break 8. */
1070 
1071                         /* Static (compiled) breakpoints must return to the next instruction
1072                            in order to avoid infinite loops (default value of ERP). Dynamic
1073                            (gdb-invoked) must subtract the size of the break instruction from
1074                            the ERP so that the instruction that was originally in the break
1075                            instruction's place will be run when we return from the exception. */
1076                         if (!dynamic_bp) {
1077                                 /* Assuming that all breakpoints are dynamic from now on. */
1078                                 dynamic_bp = 1;
1079                         } else {
1080 
1081                                 /* Only if not in a delay slot. */
1082                                 if (!(reg.erp & 0x1)) {
1083                                         reg.erp -= 2;
1084                                         reg.pc -= 2;
1085                                 }
1086                         }
1087 
1088                 } else if (((reg.exs & 0xff00) >> 8) == 0x3) {
1089                         /* Single step. */
1090                         /* Don't fiddle with S1. */
1091 
1092                 } else if (((reg.exs & 0xff00) >> 8) == 0xc) {
1093 
1094                         /* Hardware watchpoint exception. */
1095 
1096                         /* SPC has been updated so that we will get a single step exception
1097                            when we return, but we don't want that. */
1098                         reg.spc = 0;
1099 
1100                         /* Don't fiddle with S1. */
1101                 }
1102 
1103         } else if (sigval == SIGINT) {
1104                 /* Nothing special. */
1105         }
1106 }
1107 
1108 static void insert_watchpoint(char type, int addr, int len)
1109 {
1110         /* Breakpoint/watchpoint types (GDB terminology):
1111            0 = memory breakpoint for instructions
1112            (not supported; done via memory write instead)
1113            1 = hardware breakpoint for instructions (supported)
1114            2 = write watchpoint (supported)
1115            3 = read watchpoint (supported)
1116            4 = access watchpoint (supported) */
1117 
1118         if (type < '1' || type > '4') {
1119                 output_buffer[0] = 0;
1120                 return;
1121         }
1122 
1123         /* Read watchpoints are set as access watchpoints, because of GDB's
1124            inability to deal with pure read watchpoints. */
1125         if (type == '3')
1126                 type = '4';
1127 
1128         if (type == '1') {
1129                 /* Hardware (instruction) breakpoint. */
1130                 /* Bit 0 in BP_CTRL holds the configuration for I0. */
1131                 if (sreg.s0_3 & 0x1) {
1132                         /* Already in use. */
1133                         gdb_cris_strcpy(output_buffer, error_message[E04]);
1134                         return;
1135                 }
1136                 /* Configure. */
1137                 sreg.s1_3 = addr;
1138                 sreg.s2_3 = (addr + len - 1);
1139                 sreg.s0_3 |= 1;
1140         } else {
1141                 int bp;
1142                 unsigned int *bp_d_regs = &sreg.s3_3;
1143 
1144                 /* The watchpoint allocation scheme is the simplest possible.
1145                    For example, if a region is watched for read and
1146                    a write watch is requested, a new watchpoint will
1147                    be used. Also, if a watch for a region that is already
1148                    covered by one or more existing watchpoints, a new
1149                    watchpoint will be used. */
1150 
1151                 /* First, find a free data watchpoint. */
1152                 for (bp = 0; bp < 6; bp++) {
1153                         /* Each data watchpoint's control registers occupy 2 bits
1154                            (hence the 3), starting at bit 2 for D0 (hence the 2)
1155                            with 4 bits between for each watchpoint (yes, the 4). */
1156                         if (!(sreg.s0_3 & (0x3 << (2 + (bp * 4))))) {
1157                                 break;
1158                         }
1159                 }
1160 
1161                 if (bp > 5) {
1162                         /* We're out of watchpoints. */
1163                         gdb_cris_strcpy(output_buffer, error_message[E04]);
1164                         return;
1165                 }
1166 
1167                 /* Configure the control register first. */
1168                 if (type == '3' || type == '4') {
1169                         /* Trigger on read. */
1170                         sreg.s0_3 |= (1 << (2 + bp * 4));
1171                 }
1172                 if (type == '2' || type == '4') {
1173                         /* Trigger on write. */
1174                         sreg.s0_3 |= (2 << (2 + bp * 4));
1175                 }
1176 
1177                 /* Ugly pointer arithmetics to configure the watched range. */
1178                 bp_d_regs[bp * 2] = addr;
1179                 bp_d_regs[bp * 2 + 1] = (addr + len - 1);
1180         }
1181 
1182         /* Set the S1 flag to enable watchpoints. */
1183         reg.ccs |= (1 << (S_CCS_BITNR + CCS_SHIFT));
1184         gdb_cris_strcpy(output_buffer, "OK");
1185 }
1186 
1187 static void remove_watchpoint(char type, int addr, int len)
1188 {
1189         /* Breakpoint/watchpoint types:
1190            0 = memory breakpoint for instructions
1191            (not supported; done via memory write instead)
1192            1 = hardware breakpoint for instructions (supported)
1193            2 = write watchpoint (supported)
1194            3 = read watchpoint (supported)
1195            4 = access watchpoint (supported) */
1196         if (type < '1' || type > '4') {
1197                 output_buffer[0] = 0;
1198                 return;
1199         }
1200 
1201         /* Read watchpoints are set as access watchpoints, because of GDB's
1202            inability to deal with pure read watchpoints. */
1203         if (type == '3')
1204                 type = '4';
1205 
1206         if (type == '1') {
1207                 /* Hardware breakpoint. */
1208                 /* Bit 0 in BP_CTRL holds the configuration for I0. */
1209                 if (!(sreg.s0_3 & 0x1)) {
1210                         /* Not in use. */
1211                         gdb_cris_strcpy(output_buffer, error_message[E04]);
1212                         return;
1213                 }
1214                 /* Deconfigure. */
1215                 sreg.s1_3 = 0;
1216                 sreg.s2_3 = 0;
1217                 sreg.s0_3 &= ~1;
1218         } else {
1219                 int bp;
1220                 unsigned int *bp_d_regs = &sreg.s3_3;
1221                 /* Try to find a watchpoint that is configured for the
1222                    specified range, then check that read/write also matches. */
1223 
1224                 /* Ugly pointer arithmetic, since I cannot rely on a
1225                    single switch (addr) as there may be several watchpoints with
1226                    the same start address for example. */
1227 
1228                 for (bp = 0; bp < 6; bp++) {
1229                         if (bp_d_regs[bp * 2] == addr &&
1230                             bp_d_regs[bp * 2 + 1] == (addr + len - 1)) {
1231                                 /* Matching range. */
1232                                 int bitpos = 2 + bp * 4;
1233                                 int rw_bits;
1234 
1235                                 /* Read/write bits for this BP. */
1236                                 rw_bits = (sreg.s0_3 & (0x3 << bitpos)) >> bitpos;
1237 
1238                                 if ((type == '3' && rw_bits == 0x1) ||
1239                                     (type == '2' && rw_bits == 0x2) ||
1240                                     (type == '4' && rw_bits == 0x3)) {
1241                                         /* Read/write matched. */
1242                                         break;
1243                                 }
1244                         }
1245                 }
1246 
1247                 if (bp > 5) {
1248                         /* No watchpoint matched. */
1249                         gdb_cris_strcpy(output_buffer, error_message[E04]);
1250                         return;
1251                 }
1252 
1253                 /* Found a matching watchpoint. Now, deconfigure it by
1254                    both disabling read/write in bp_ctrl and zeroing its
1255                    start/end addresses. */
1256                 sreg.s0_3 &= ~(3 << (2 + (bp * 4)));
1257                 bp_d_regs[bp * 2] = 0;
1258                 bp_d_regs[bp * 2 + 1] = 0;
1259         }
1260 
1261         /* Note that we don't clear the S1 flag here. It's done when continuing.  */
1262         gdb_cris_strcpy(output_buffer, "OK");
1263 }
1264 
1265 
1266 
1267 /* All expected commands are sent from remote.c. Send a response according
1268    to the description in remote.c. */
1269 void
1270 handle_exception(int sigval)
1271 {
1272         /* Avoid warning of not used. */
1273 
1274         USEDFUN(handle_exception);
1275         USEDVAR(internal_stack[0]);
1276 
1277         register_fixup(sigval);
1278 
1279         /* Send response. */
1280         stub_is_stopped(sigval);
1281 
1282         for (;;) {
1283                 output_buffer[0] = '\0';
1284                 getpacket(input_buffer);
1285                 switch (input_buffer[0]) {
1286                         case 'g':
1287                                 /* Read registers: g
1288                                    Success: Each byte of register data is described by two hex digits.
1289                                    Registers are in the internal order for GDB, and the bytes
1290                                    in a register  are in the same order the machine uses.
1291                                    Failure: void. */
1292                         {
1293                                 char *buf;
1294                                 /* General and special registers. */
1295                                 buf = mem2hex(output_buffer, (char *)&reg, sizeof(registers));
1296                                 /* Support registers. */
1297                                 /* -1 because of the null termination that mem2hex adds. */
1298                                 mem2hex(buf,
1299                                         (char *)&sreg + (reg.srs * 16 * sizeof(unsigned int)),
1300                                         16 * sizeof(unsigned int));
1301                                 break;
1302                         }
1303                         case 'G':
1304                                 /* Write registers. GXX..XX
1305                                    Each byte of register data  is described by two hex digits.
1306                                    Success: OK
1307                                    Failure: void. */
1308                                 /* General and special registers. */
1309                                 hex2mem((char *)&reg, &input_buffer[1], sizeof(registers));
1310                                 /* Support registers. */
1311                                 hex2mem((char *)&sreg + (reg.srs * 16 * sizeof(unsigned int)),
1312                                         &input_buffer[1] + sizeof(registers),
1313                                         16 * sizeof(unsigned int));
1314                                 gdb_cris_strcpy(output_buffer, "OK");
1315                                 break;
1316 
1317                         case 'P':
1318                                 /* Write register. Pn...=r...
1319                                    Write register n..., hex value without 0x, with value r...,
1320                                    which contains a hex value without 0x and two hex digits
1321                                    for each byte in the register (target byte order). P1f=11223344 means
1322                                    set register 31 to 44332211.
1323                                    Success: OK
1324                                    Failure: E02, E05 */
1325                                 {
1326                                         char *suffix;
1327                                         int regno = gdb_cris_strtol(&input_buffer[1], &suffix, 16);
1328                                         int status;
1329 
1330                                         status = write_register(regno, suffix+1);
1331 
1332                                         switch (status) {
1333                                                 case E02:
1334                                                         /* Do not support read-only registers. */
1335                                                         gdb_cris_strcpy(output_buffer, error_message[E02]);
1336                                                         break;
1337                                                 case E05:
1338                                                         /* Do not support non-existing registers. */
1339                                                         gdb_cris_strcpy(output_buffer, error_message[E05]);
1340                                                         break;
1341                                                 default:
1342                                                         /* Valid register number. */
1343                                                         gdb_cris_strcpy(output_buffer, "OK");
1344                                                         break;
1345                                         }
1346                                 }
1347                                 break;
1348 
1349                         case 'm':
1350                                 /* Read from memory. mAA..AA,LLLL
1351                                    AA..AA is the address and LLLL is the length.
1352                                    Success: XX..XX is the memory content.  Can be fewer bytes than
1353                                    requested if only part of the data may be read. m6000120a,6c means
1354                                    retrieve 108 byte from base address 6000120a.
1355                                    Failure: void. */
1356                                 {
1357                                         char *suffix;
1358                                         unsigned char *addr = (unsigned char *)gdb_cris_strtol(&input_buffer[1],
1359                                                                                                &suffix, 16);
1360                                         int len = gdb_cris_strtol(suffix+1, 0, 16);
1361 
1362                                         /* Bogus read (i.e. outside the kernel's
1363                                            segment)? . */
1364                                         if (!((unsigned int)addr >= 0xc0000000 &&
1365                                               (unsigned int)addr < 0xd0000000))
1366                                                 addr = NULL;
1367 
1368                                         mem2hex(output_buffer, addr, len);
1369                                 }
1370                                 break;
1371 
1372                         case 'X':
1373                                 /* Write to memory. XAA..AA,LLLL:XX..XX
1374                                    AA..AA is the start address,  LLLL is the number of bytes, and
1375                                    XX..XX is the binary data.
1376                                    Success: OK
1377                                    Failure: void. */
1378                         case 'M':
1379                                 /* Write to memory. MAA..AA,LLLL:XX..XX
1380                                    AA..AA is the start address,  LLLL is the number of bytes, and
1381                                    XX..XX is the hexadecimal data.
1382                                    Success: OK
1383                                    Failure: void. */
1384                                 {
1385                                         char *lenptr;
1386                                         char *dataptr;
1387                                         unsigned char *addr = (unsigned char *)gdb_cris_strtol(&input_buffer[1],
1388                                                                                       &lenptr, 16);
1389                                         int len = gdb_cris_strtol(lenptr+1, &dataptr, 16);
1390                                         if (*lenptr == ',' && *dataptr == ':') {
1391                                                 if (input_buffer[0] == 'M') {
1392                                                         hex2mem(addr, dataptr + 1, len);
1393                                                 } else /* X */ {
1394                                                         bin2mem(addr, dataptr + 1, len);
1395                                                 }
1396                                                 gdb_cris_strcpy(output_buffer, "OK");
1397                                         }
1398                                         else {
1399                                                 gdb_cris_strcpy(output_buffer, error_message[E06]);
1400                                         }
1401                                 }
1402                                 break;
1403 
1404                         case 'c':
1405                                 /* Continue execution. cAA..AA
1406                                    AA..AA is the address where execution is resumed. If AA..AA is
1407                                    omitted, resume at the present address.
1408                                    Success: return to the executing thread.
1409                                    Failure: will never know. */
1410 
1411                                 if (input_buffer[1] != '\0') {
1412                                         /* FIXME: Doesn't handle address argument. */
1413                                         gdb_cris_strcpy(output_buffer, error_message[E04]);
1414                                         break;
1415                                 }
1416 
1417                                 /* Before continuing, make sure everything is set up correctly. */
1418 
1419                                 /* Set the SPC to some unlikely value.  */
1420                                 reg.spc = 0;
1421                                 /* Set the S1 flag to 0 unless some watchpoint is enabled (since setting
1422                                    S1 to 0 would also disable watchpoints). (Note that bits 26-31 in BP_CTRL
1423                                    are reserved, so don't check against those). */
1424                                 if ((sreg.s0_3 & 0x3fff) == 0) {
1425                                         reg.ccs &= ~(1 << (S_CCS_BITNR + CCS_SHIFT));
1426                                 }
1427 
1428                                 return;
1429 
1430                         case 's':
1431                                 /* Step. sAA..AA
1432                                    AA..AA is the address where execution is resumed. If AA..AA is
1433                                    omitted, resume at the present address. Success: return to the
1434                                    executing thread. Failure: will never know. */
1435 
1436                                 if (input_buffer[1] != '\0') {
1437                                         /* FIXME: Doesn't handle address argument. */
1438                                         gdb_cris_strcpy(output_buffer, error_message[E04]);
1439                                         break;
1440                                 }
1441 
1442                                 /* Set the SPC to PC, which is where we'll return
1443                                    (deduced previously). */
1444                                 reg.spc = reg.pc;
1445 
1446                                 /* Set the S1 (first stacked, not current) flag, which will
1447                                    kick into action when we rfe. */
1448                                 reg.ccs |= (1 << (S_CCS_BITNR + CCS_SHIFT));
1449                                 return;
1450 
1451                        case 'Z':
1452 
1453                                /* Insert breakpoint or watchpoint, Ztype,addr,length.
1454                                   Remote protocol says: A remote target shall return an empty string
1455                                   for an unrecognized breakpoint or watchpoint packet type. */
1456                                {
1457                                        char *lenptr;
1458                                        char *dataptr;
1459                                        int addr = gdb_cris_strtol(&input_buffer[3], &lenptr, 16);
1460                                        int len = gdb_cris_strtol(lenptr + 1, &dataptr, 16);
1461                                        char type = input_buffer[1];
1462 
1463                                        insert_watchpoint(type, addr, len);
1464                                        break;
1465                                }
1466 
1467                        case 'z':
1468                                /* Remove breakpoint or watchpoint, Ztype,addr,length.
1469                                   Remote protocol says: A remote target shall return an empty string
1470                                   for an unrecognized breakpoint or watchpoint packet type. */
1471                                {
1472                                        char *lenptr;
1473                                        char *dataptr;
1474                                        int addr = gdb_cris_strtol(&input_buffer[3], &lenptr, 16);
1475                                        int len = gdb_cris_strtol(lenptr + 1, &dataptr, 16);
1476                                        char type = input_buffer[1];
1477 
1478                                        remove_watchpoint(type, addr, len);
1479                                        break;
1480                                }
1481 
1482 
1483                         case '?':
1484                                 /* The last signal which caused a stop. ?
1485                                    Success: SAA, where AA is the signal number.
1486                                    Failure: void. */
1487                                 output_buffer[0] = 'S';
1488                                 output_buffer[1] = hex_asc_hi(sigval);
1489                                 output_buffer[2] = hex_asc_lo(sigval);
1490                                 output_buffer[3] = 0;
1491                                 break;
1492 
1493                         case 'D':
1494                                 /* Detach from host. D
1495                                    Success: OK, and return to the executing thread.
1496                                    Failure: will never know */
1497                                 putpacket("OK");
1498                                 return;
1499 
1500                         case 'k':
1501                         case 'r':
1502                                 /* kill request or reset request.
1503                                    Success: restart of target.
1504                                    Failure: will never know. */
1505                                 kill_restart();
1506                                 break;
1507 
1508                         case 'C':
1509                         case 'S':
1510                         case '!':
1511                         case 'R':
1512                         case 'd':
1513                                 /* Continue with signal sig. Csig;AA..AA
1514                                    Step with signal sig. Ssig;AA..AA
1515                                    Use the extended remote protocol. !
1516                                    Restart the target system. R0
1517                                    Toggle debug flag. d
1518                                    Search backwards. tAA:PP,MM
1519                                    Not supported: E04 */
1520 
1521                                 /* FIXME: What's the difference between not supported
1522                                    and ignored (below)? */
1523                                 gdb_cris_strcpy(output_buffer, error_message[E04]);
1524                                 break;
1525 
1526                         default:
1527                                 /* The stub should ignore other request and send an empty
1528                                    response ($#<checksum>). This way we can extend the protocol and GDB
1529                                    can tell whether the stub it is talking to uses the old or the new. */
1530                                 output_buffer[0] = 0;
1531                                 break;
1532                 }
1533                 putpacket(output_buffer);
1534         }
1535 }
1536 
1537 void
1538 kgdb_init(void)
1539 {
1540         reg_intr_vect_rw_mask intr_mask;
1541         reg_ser_rw_intr_mask ser_intr_mask;
1542 
1543         /* Configure the kgdb serial port. */
1544 #if defined(CONFIG_ETRAX_KGDB_PORT0)
1545         /* Note: no shortcut registered (not handled by multiple_interrupt).
1546            See entry.S.  */
1547         set_exception_vector(SER0_INTR_VECT, kgdb_handle_exception);
1548         /* Enable the ser irq in the global config. */
1549         intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
1550         intr_mask.ser0 = 1;
1551         REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
1552 
1553         ser_intr_mask = REG_RD(ser, regi_ser0, rw_intr_mask);
1554         ser_intr_mask.dav = regk_ser_yes;
1555         REG_WR(ser, regi_ser0, rw_intr_mask, ser_intr_mask);
1556 #elif defined(CONFIG_ETRAX_KGDB_PORT1)
1557         /* Note: no shortcut registered (not handled by multiple_interrupt).
1558            See entry.S.  */
1559         set_exception_vector(SER1_INTR_VECT, kgdb_handle_exception);
1560         /* Enable the ser irq in the global config. */
1561         intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
1562         intr_mask.ser1 = 1;
1563         REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
1564 
1565         ser_intr_mask = REG_RD(ser, regi_ser1, rw_intr_mask);
1566         ser_intr_mask.dav = regk_ser_yes;
1567         REG_WR(ser, regi_ser1, rw_intr_mask, ser_intr_mask);
1568 #elif defined(CONFIG_ETRAX_KGDB_PORT2)
1569         /* Note: no shortcut registered (not handled by multiple_interrupt).
1570            See entry.S.  */
1571         set_exception_vector(SER2_INTR_VECT, kgdb_handle_exception);
1572         /* Enable the ser irq in the global config. */
1573         intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
1574         intr_mask.ser2 = 1;
1575         REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
1576 
1577         ser_intr_mask = REG_RD(ser, regi_ser2, rw_intr_mask);
1578         ser_intr_mask.dav = regk_ser_yes;
1579         REG_WR(ser, regi_ser2, rw_intr_mask, ser_intr_mask);
1580 #elif defined(CONFIG_ETRAX_KGDB_PORT3)
1581         /* Note: no shortcut registered (not handled by multiple_interrupt).
1582            See entry.S.  */
1583         set_exception_vector(SER3_INTR_VECT, kgdb_handle_exception);
1584         /* Enable the ser irq in the global config. */
1585         intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
1586         intr_mask.ser3 = 1;
1587         REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
1588 
1589         ser_intr_mask = REG_RD(ser, regi_ser3, rw_intr_mask);
1590         ser_intr_mask.dav = regk_ser_yes;
1591         REG_WR(ser, regi_ser3, rw_intr_mask, ser_intr_mask);
1592 #endif
1593 
1594 }
1595 /* Performs a complete re-start from scratch. */
1596 static void
1597 kill_restart(void)
1598 {
1599         machine_restart("");
1600 }
1601 
1602 /* Use this static breakpoint in the start-up only. */
1603 
1604 void
1605 breakpoint(void)
1606 {
1607         kgdb_started = 1;
1608         dynamic_bp = 0;     /* This is a static, not a dynamic breakpoint. */
1609         __asm__ volatile ("break 8"); /* Jump to kgdb_handle_breakpoint. */
1610 }
1611 
1612 /****************************** End of file **********************************/
1613 

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