1 /*
2 * CRIS pgtable.h - macros and functions to manipulate page tables.
3 */
4
5 #ifndef _CRIS_PGTABLE_H
6 #define _CRIS_PGTABLE_H
7
8 #include <asm/page.h>
9 #include <asm-generic/pgtable-nopmd.h>
10
11 #ifndef __ASSEMBLY__
12 #include <linux/sched.h>
13 #include <asm/mmu.h>
14 #endif
15 #include <arch/pgtable.h>
16
17 /*
18 * The Linux memory management assumes a three-level page table setup. On
19 * CRIS, we use that, but "fold" the mid level into the top-level page
20 * table. Since the MMU TLB is software loaded through an interrupt, it
21 * supports any page table structure, so we could have used a three-level
22 * setup, but for the amounts of memory we normally use, a two-level is
23 * probably more efficient.
24 *
25 * This file contains the functions and defines necessary to modify and use
26 * the CRIS page table tree.
27 */
28 #ifndef __ASSEMBLY__
29 extern void paging_init(void);
30 #endif
31
32 /* Certain architectures need to do special things when pte's
33 * within a page table are directly modified. Thus, the following
34 * hook is made available.
35 */
36 #define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval))
37 #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
38
39 /*
40 * (pmds are folded into pgds so this doesn't get actually called,
41 * but the define is needed for a generic inline function.)
42 */
43 #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
44 #define set_pgu(pudptr, pudval) (*(pudptr) = pudval)
45
46 /* PGDIR_SHIFT determines the size of the area a second-level page table can
47 * map. It is equal to the page size times the number of PTE's that fit in
48 * a PMD page. A PTE is 4-bytes in CRIS. Hence the following number.
49 */
50
51 #define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-2))
52 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
53 #define PGDIR_MASK (~(PGDIR_SIZE-1))
54
55 /*
56 * entries per page directory level: we use a two-level, so
57 * we don't really have any PMD directory physically.
58 * pointers are 4 bytes so we can use the page size and
59 * divide it by 4 (shift by 2).
60 */
61 #define PTRS_PER_PTE (1UL << (PAGE_SHIFT-2))
62 #define PTRS_PER_PGD (1UL << (PAGE_SHIFT-2))
63
64 /* calculate how many PGD entries a user-level program can use
65 * the first mappable virtual address is 0
66 * (TASK_SIZE is the maximum virtual address space)
67 */
68
69 #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
70 #define FIRST_USER_ADDRESS 0UL
71
72 /* zero page used for uninitialized stuff */
73 #ifndef __ASSEMBLY__
74 extern unsigned long empty_zero_page;
75 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
76 #endif
77
78 /* number of bits that fit into a memory pointer */
79 #define BITS_PER_PTR (8*sizeof(unsigned long))
80
81 /* to align the pointer to a pointer address */
82 #define PTR_MASK (~(sizeof(void*)-1))
83
84 /* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */
85 /* 64-bit machines, beware! SRB. */
86 #define SIZEOF_PTR_LOG2 2
87
88 /* to find an entry in a page-table */
89 #define PAGE_PTR(address) \
90 ((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK)
91
92 /* to set the page-dir */
93 #define SET_PAGE_DIR(tsk,pgdir)
94
95 #define pte_none(x) (!pte_val(x))
96 #define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
97 #define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0)
98
99 #define pmd_none(x) (!pmd_val(x))
100 /* by removing the _PAGE_KERNEL bit from the comparison, the same pmd_bad
101 * works for both _PAGE_TABLE and _KERNPG_TABLE pmd entries.
102 */
103 #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_KERNEL)) != _PAGE_TABLE)
104 #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
105 #define pmd_clear(xp) do { pmd_val(*(xp)) = 0; } while (0)
106
107 #ifndef __ASSEMBLY__
108
109 /*
110 * The following only work if pte_present() is true.
111 * Undefined behaviour if not..
112 */
113
114 static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
115 static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; }
116 static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
117 static inline int pte_special(pte_t pte) { return 0; }
118
119 static inline pte_t pte_wrprotect(pte_t pte)
120 {
121 pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
122 return pte;
123 }
124
125 static inline pte_t pte_mkclean(pte_t pte)
126 {
127 pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
128 return pte;
129 }
130
131 static inline pte_t pte_mkold(pte_t pte)
132 {
133 pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
134 return pte;
135 }
136
137 static inline pte_t pte_mkwrite(pte_t pte)
138 {
139 pte_val(pte) |= _PAGE_WRITE;
140 if (pte_val(pte) & _PAGE_MODIFIED)
141 pte_val(pte) |= _PAGE_SILENT_WRITE;
142 return pte;
143 }
144
145 static inline pte_t pte_mkdirty(pte_t pte)
146 {
147 pte_val(pte) |= _PAGE_MODIFIED;
148 if (pte_val(pte) & _PAGE_WRITE)
149 pte_val(pte) |= _PAGE_SILENT_WRITE;
150 return pte;
151 }
152
153 static inline pte_t pte_mkyoung(pte_t pte)
154 {
155 pte_val(pte) |= _PAGE_ACCESSED;
156 if (pte_val(pte) & _PAGE_READ)
157 {
158 pte_val(pte) |= _PAGE_SILENT_READ;
159 if ((pte_val(pte) & (_PAGE_WRITE | _PAGE_MODIFIED)) ==
160 (_PAGE_WRITE | _PAGE_MODIFIED))
161 pte_val(pte) |= _PAGE_SILENT_WRITE;
162 }
163 return pte;
164 }
165 static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
166
167 /*
168 * Conversion functions: convert a page and protection to a page entry,
169 * and a page entry and page directory to the page they refer to.
170 */
171
172 /* What actually goes as arguments to the various functions is less than
173 * obvious, but a rule of thumb is that struct page's goes as struct page *,
174 * really physical DRAM addresses are unsigned long's, and DRAM "virtual"
175 * addresses (the 0xc0xxxxxx's) goes as void *'s.
176 */
177
178 static inline pte_t __mk_pte(void * page, pgprot_t pgprot)
179 {
180 pte_t pte;
181 /* the PTE needs a physical address */
182 pte_val(pte) = __pa(page) | pgprot_val(pgprot);
183 return pte;
184 }
185
186 #define mk_pte(page, pgprot) __mk_pte(page_address(page), (pgprot))
187
188 #define mk_pte_phys(physpage, pgprot) \
189 ({ \
190 pte_t __pte; \
191 \
192 pte_val(__pte) = (physpage) + pgprot_val(pgprot); \
193 __pte; \
194 })
195
196 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
197 { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
198
199 #define pgprot_noncached(prot) __pgprot((pgprot_val(prot) | _PAGE_NO_CACHE))
200
201
202 /* pte_val refers to a page in the 0x4xxxxxxx physical DRAM interval
203 * __pte_page(pte_val) refers to the "virtual" DRAM interval
204 * pte_pagenr refers to the page-number counted starting from the virtual DRAM start
205 */
206
207 static inline unsigned long __pte_page(pte_t pte)
208 {
209 /* the PTE contains a physical address */
210 return (unsigned long)__va(pte_val(pte) & PAGE_MASK);
211 }
212
213 #define pte_pagenr(pte) ((__pte_page(pte) - PAGE_OFFSET) >> PAGE_SHIFT)
214
215 /* permanent address of a page */
216
217 #define __page_address(page) (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT))
218 #define pte_page(pte) (mem_map+pte_pagenr(pte))
219
220 /* only the pte's themselves need to point to physical DRAM (see above)
221 * the pagetable links are purely handled within the kernel SW and thus
222 * don't need the __pa and __va transformations.
223 */
224
225 static inline void pmd_set(pmd_t * pmdp, pte_t * ptep)
226 { pmd_val(*pmdp) = _PAGE_TABLE | (unsigned long) ptep; }
227
228 #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
229 #define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
230
231 /* to find an entry in a page-table-directory. */
232 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
233
234 /* to find an entry in a page-table-directory */
235 static inline pgd_t * pgd_offset(const struct mm_struct *mm, unsigned long address)
236 {
237 return mm->pgd + pgd_index(address);
238 }
239
240 /* to find an entry in a kernel page-table-directory */
241 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
242
243 /* Find an entry in the third-level page table.. */
244 #define __pte_offset(address) \
245 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
246 #define pte_offset_kernel(dir, address) \
247 ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address))
248 #define pte_offset_map(dir, address) \
249 ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
250
251 #define pte_unmap(pte) do { } while (0)
252 #define pte_pfn(x) ((unsigned long)(__va((x).pte)) >> PAGE_SHIFT)
253 #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
254
255 #define pte_ERROR(e) \
256 printk("%s:%d: bad pte %p(%08lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
257 #define pgd_ERROR(e) \
258 printk("%s:%d: bad pgd %p(%08lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
259
260
261 extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; /* defined in head.S */
262
263 /*
264 * CRIS doesn't have any external MMU info: the kernel page
265 * tables contain all the necessary information.
266 *
267 * Actually I am not sure on what this could be used for.
268 */
269 static inline void update_mmu_cache(struct vm_area_struct * vma,
270 unsigned long address, pte_t *ptep)
271 {
272 }
273
274 /* Encode and de-code a swap entry (must be !pte_none(e) && !pte_present(e)) */
275 /* Since the PAGE_PRESENT bit is bit 4, we can use the bits above */
276
277 #define __swp_type(x) (((x).val >> 5) & 0x7f)
278 #define __swp_offset(x) ((x).val >> 12)
279 #define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 5) | ((offset) << 12) })
280 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
281 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
282
283 #define kern_addr_valid(addr) (1)
284
285 #include <asm-generic/pgtable.h>
286
287 /*
288 * No page table caches to initialise
289 */
290 #define pgtable_cache_init() do { } while (0)
291
292 typedef pte_t *pte_addr_t;
293
294 #endif /* __ASSEMBLY__ */
295 #endif /* _CRIS_PGTABLE_H */
296
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