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Linux/arch/frv/mb93090-mb00/pci-frv.c

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  1 /* pci-frv.c: low-level PCI access routines
  2  *
  3  * Copyright (C) 2003-5 Red Hat, Inc. All Rights Reserved.
  4  * Written by David Howells (dhowells@redhat.com)
  5  * - Derived from the i386 equivalent stuff
  6  *
  7  * This program is free software; you can redistribute it and/or
  8  * modify it under the terms of the GNU General Public License
  9  * as published by the Free Software Foundation; either version
 10  * 2 of the License, or (at your option) any later version.
 11  */
 12 
 13 #include <linux/types.h>
 14 #include <linux/kernel.h>
 15 #include <linux/pci.h>
 16 #include <linux/init.h>
 17 #include <linux/ioport.h>
 18 #include <linux/errno.h>
 19 
 20 #include "pci-frv.h"
 21 
 22 /*
 23  * We need to avoid collisions with `mirrored' VGA ports
 24  * and other strange ISA hardware, so we always want the
 25  * addresses to be allocated in the 0x000-0x0ff region
 26  * modulo 0x400.
 27  *
 28  * Why? Because some silly external IO cards only decode
 29  * the low 10 bits of the IO address. The 0x00-0xff region
 30  * is reserved for motherboard devices that decode all 16
 31  * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
 32  * but we want to try to avoid allocating at 0x2900-0x2bff
 33  * which might have be mirrored at 0x0100-0x03ff..
 34  */
 35 resource_size_t
 36 pcibios_align_resource(void *data, const struct resource *res,
 37                        resource_size_t size, resource_size_t align)
 38 {
 39         resource_size_t start = res->start;
 40 
 41         if ((res->flags & IORESOURCE_IO) && (start & 0x300))
 42                 start = (start + 0x3ff) & ~0x3ff;
 43 
 44         return start;
 45 }
 46 
 47 
 48 /*
 49  *  Handle resources of PCI devices.  If the world were perfect, we could
 50  *  just allocate all the resource regions and do nothing more.  It isn't.
 51  *  On the other hand, we cannot just re-allocate all devices, as it would
 52  *  require us to know lots of host bridge internals.  So we attempt to
 53  *  keep as much of the original configuration as possible, but tweak it
 54  *  when it's found to be wrong.
 55  *
 56  *  Known BIOS problems we have to work around:
 57  *      - I/O or memory regions not configured
 58  *      - regions configured, but not enabled in the command register
 59  *      - bogus I/O addresses above 64K used
 60  *      - expansion ROMs left enabled (this may sound harmless, but given
 61  *        the fact the PCI specs explicitly allow address decoders to be
 62  *        shared between expansion ROMs and other resource regions, it's
 63  *        at least dangerous)
 64  *
 65  *  Our solution:
 66  *      (1) Allocate resources for all buses behind PCI-to-PCI bridges.
 67  *          This gives us fixed barriers on where we can allocate.
 68  *      (2) Allocate resources for all enabled devices.  If there is
 69  *          a collision, just mark the resource as unallocated. Also
 70  *          disable expansion ROMs during this step.
 71  *      (3) Try to allocate resources for disabled devices.  If the
 72  *          resources were assigned correctly, everything goes well,
 73  *          if they weren't, they won't disturb allocation of other
 74  *          resources.
 75  *      (4) Assign new addresses to resources which were either
 76  *          not configured at all or misconfigured.  If explicitly
 77  *          requested by the user, configure expansion ROM address
 78  *          as well.
 79  */
 80 
 81 static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
 82 {
 83         struct list_head *ln;
 84         struct pci_bus *bus;
 85         struct pci_dev *dev;
 86         int idx;
 87         struct resource *r;
 88 
 89         /* Depth-First Search on bus tree */
 90         for (ln=bus_list->next; ln != bus_list; ln=ln->next) {
 91                 bus = list_entry(ln, struct pci_bus, node);
 92                 if ((dev = bus->self)) {
 93                         for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) {
 94                                 r = &dev->resource[idx];
 95                                 if (!r->start)
 96                                         continue;
 97                                 pci_claim_bridge_resource(dev, idx);
 98                         }
 99                 }
100                 pcibios_allocate_bus_resources(&bus->children);
101         }
102 }
103 
104 static void __init pcibios_allocate_resources(int pass)
105 {
106         struct pci_dev *dev = NULL;
107         int idx, disabled;
108         u16 command;
109         struct resource *r;
110 
111         for_each_pci_dev(dev) {
112                 pci_read_config_word(dev, PCI_COMMAND, &command);
113                 for(idx = 0; idx < 6; idx++) {
114                         r = &dev->resource[idx];
115                         if (r->parent)          /* Already allocated */
116                                 continue;
117                         if (!r->start)          /* Address not assigned at all */
118                                 continue;
119                         if (r->flags & IORESOURCE_IO)
120                                 disabled = !(command & PCI_COMMAND_IO);
121                         else
122                                 disabled = !(command & PCI_COMMAND_MEMORY);
123                         if (pass == disabled) {
124                                 DBG("PCI: Resource %08lx-%08lx (f=%lx, d=%d, p=%d)\n",
125                                     r->start, r->end, r->flags, disabled, pass);
126                                 if (pci_claim_resource(dev, idx) < 0) {
127                                         /* We'll assign a new address later */
128                                         r->end -= r->start;
129                                         r->start = 0;
130                                 }
131                         }
132                 }
133                 if (!pass) {
134                         r = &dev->resource[PCI_ROM_RESOURCE];
135                         if (r->flags & IORESOURCE_ROM_ENABLE) {
136                                 /* Turn the ROM off, leave the resource region, but keep it unregistered. */
137                                 u32 reg;
138                                 DBG("PCI: Switching off ROM of %s\n", pci_name(dev));
139                                 r->flags &= ~IORESOURCE_ROM_ENABLE;
140                                 pci_read_config_dword(dev, dev->rom_base_reg, &reg);
141                                 pci_write_config_dword(dev, dev->rom_base_reg, reg & ~PCI_ROM_ADDRESS_ENABLE);
142                         }
143                 }
144         }
145 }
146 
147 static void __init pcibios_assign_resources(void)
148 {
149         struct pci_dev *dev = NULL;
150         int idx;
151         struct resource *r;
152 
153         for_each_pci_dev(dev) {
154                 int class = dev->class >> 8;
155 
156                 /* Don't touch classless devices and host bridges */
157                 if (!class || class == PCI_CLASS_BRIDGE_HOST)
158                         continue;
159 
160                 for(idx=0; idx<6; idx++) {
161                         r = &dev->resource[idx];
162 
163                         /*
164                          *  Don't touch IDE controllers and I/O ports of video cards!
165                          */
166                         if ((class == PCI_CLASS_STORAGE_IDE && idx < 4) ||
167                             (class == PCI_CLASS_DISPLAY_VGA && (r->flags & IORESOURCE_IO)))
168                                 continue;
169 
170                         /*
171                          *  We shall assign a new address to this resource, either because
172                          *  the BIOS forgot to do so or because we have decided the old
173                          *  address was unusable for some reason.
174                          */
175                         if (!r->start && r->end)
176                                 pci_assign_resource(dev, idx);
177                 }
178         }
179 }
180 
181 void __init pcibios_resource_survey(void)
182 {
183         DBG("PCI: Allocating resources\n");
184         pcibios_allocate_bus_resources(&pci_root_buses);
185         pcibios_allocate_resources(0);
186         pcibios_allocate_resources(1);
187         pcibios_assign_resources();
188 }
189 

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