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Linux/arch/ia64/include/asm/sal.h

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Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 #ifndef _ASM_IA64_SAL_H
  2 #define _ASM_IA64_SAL_H
  3 
  4 /*
  5  * System Abstraction Layer definitions.
  6  *
  7  * This is based on version 2.5 of the manual "IA-64 System
  8  * Abstraction Layer".
  9  *
 10  * Copyright (C) 2001 Intel
 11  * Copyright (C) 2002 Jenna Hall <jenna.s.hall@intel.com>
 12  * Copyright (C) 2001 Fred Lewis <frederick.v.lewis@intel.com>
 13  * Copyright (C) 1998, 1999, 2001, 2003 Hewlett-Packard Co
 14  *      David Mosberger-Tang <davidm@hpl.hp.com>
 15  * Copyright (C) 1999 Srinivasa Prasad Thirumalachar <sprasad@sprasad.engr.sgi.com>
 16  *
 17  * 02/01/04 J. Hall Updated Error Record Structures to conform to July 2001
 18  *                  revision of the SAL spec.
 19  * 01/01/03 fvlewis Updated Error Record Structures to conform with Nov. 2000
 20  *                  revision of the SAL spec.
 21  * 99/09/29 davidm      Updated for SAL 2.6.
 22  * 00/03/29 cfleck      Updated SAL Error Logging info for processor (SAL 2.6)
 23  *                      (plus examples of platform error info structures from smariset @ Intel)
 24  */
 25 
 26 #define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT          0
 27 #define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT    1
 28 #define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT    2
 29 #define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT         3
 30 
 31 #define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK        (1<<IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT)
 32 #define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT)
 33 #define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT)
 34 #define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT       (1<<IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT)
 35 
 36 #ifndef __ASSEMBLY__
 37 
 38 #include <linux/bcd.h>
 39 #include <linux/spinlock.h>
 40 #include <linux/efi.h>
 41 
 42 #include <asm/pal.h>
 43 #include <asm/fpu.h>
 44 
 45 extern spinlock_t sal_lock;
 46 
 47 /* SAL spec _requires_ eight args for each call. */
 48 #define __IA64_FW_CALL(entry,result,a0,a1,a2,a3,a4,a5,a6,a7)    \
 49         result = (*entry)(a0,a1,a2,a3,a4,a5,a6,a7)
 50 
 51 # define IA64_FW_CALL(entry,result,args...) do {                \
 52         unsigned long __ia64_sc_flags;                          \
 53         struct ia64_fpreg __ia64_sc_fr[6];                      \
 54         ia64_save_scratch_fpregs(__ia64_sc_fr);                 \
 55         spin_lock_irqsave(&sal_lock, __ia64_sc_flags);          \
 56         __IA64_FW_CALL(entry, result, args);                    \
 57         spin_unlock_irqrestore(&sal_lock, __ia64_sc_flags);     \
 58         ia64_load_scratch_fpregs(__ia64_sc_fr);                 \
 59 } while (0)
 60 
 61 # define SAL_CALL(result,args...)                       \
 62         IA64_FW_CALL(ia64_sal, result, args);
 63 
 64 # define SAL_CALL_NOLOCK(result,args...) do {           \
 65         unsigned long __ia64_scn_flags;                 \
 66         struct ia64_fpreg __ia64_scn_fr[6];             \
 67         ia64_save_scratch_fpregs(__ia64_scn_fr);        \
 68         local_irq_save(__ia64_scn_flags);               \
 69         __IA64_FW_CALL(ia64_sal, result, args);         \
 70         local_irq_restore(__ia64_scn_flags);            \
 71         ia64_load_scratch_fpregs(__ia64_scn_fr);        \
 72 } while (0)
 73 
 74 # define SAL_CALL_REENTRANT(result,args...) do {        \
 75         struct ia64_fpreg __ia64_scs_fr[6];             \
 76         ia64_save_scratch_fpregs(__ia64_scs_fr);        \
 77         preempt_disable();                              \
 78         __IA64_FW_CALL(ia64_sal, result, args);         \
 79         preempt_enable();                               \
 80         ia64_load_scratch_fpregs(__ia64_scs_fr);        \
 81 } while (0)
 82 
 83 #define SAL_SET_VECTORS                 0x01000000
 84 #define SAL_GET_STATE_INFO              0x01000001
 85 #define SAL_GET_STATE_INFO_SIZE         0x01000002
 86 #define SAL_CLEAR_STATE_INFO            0x01000003
 87 #define SAL_MC_RENDEZ                   0x01000004
 88 #define SAL_MC_SET_PARAMS               0x01000005
 89 #define SAL_REGISTER_PHYSICAL_ADDR      0x01000006
 90 
 91 #define SAL_CACHE_FLUSH                 0x01000008
 92 #define SAL_CACHE_INIT                  0x01000009
 93 #define SAL_PCI_CONFIG_READ             0x01000010
 94 #define SAL_PCI_CONFIG_WRITE            0x01000011
 95 #define SAL_FREQ_BASE                   0x01000012
 96 #define SAL_PHYSICAL_ID_INFO            0x01000013
 97 
 98 #define SAL_UPDATE_PAL                  0x01000020
 99 
100 struct ia64_sal_retval {
101         /*
102          * A zero status value indicates call completed without error.
103          * A negative status value indicates reason of call failure.
104          * A positive status value indicates success but an
105          * informational value should be printed (e.g., "reboot for
106          * change to take effect").
107          */
108         long status;
109         unsigned long v0;
110         unsigned long v1;
111         unsigned long v2;
112 };
113 
114 typedef struct ia64_sal_retval (*ia64_sal_handler) (u64, ...);
115 
116 enum {
117         SAL_FREQ_BASE_PLATFORM = 0,
118         SAL_FREQ_BASE_INTERVAL_TIMER = 1,
119         SAL_FREQ_BASE_REALTIME_CLOCK = 2
120 };
121 
122 /*
123  * The SAL system table is followed by a variable number of variable
124  * length descriptors.  The structure of these descriptors follows
125  * below.
126  * The defininition follows SAL specs from July 2000
127  */
128 struct ia64_sal_systab {
129         u8 signature[4];        /* should be "SST_" */
130         u32 size;               /* size of this table in bytes */
131         u8 sal_rev_minor;
132         u8 sal_rev_major;
133         u16 entry_count;        /* # of entries in variable portion */
134         u8 checksum;
135         u8 reserved1[7];
136         u8 sal_a_rev_minor;
137         u8 sal_a_rev_major;
138         u8 sal_b_rev_minor;
139         u8 sal_b_rev_major;
140         /* oem_id & product_id: terminating NUL is missing if string is exactly 32 bytes long. */
141         u8 oem_id[32];
142         u8 product_id[32];      /* ASCII product id  */
143         u8 reserved2[8];
144 };
145 
146 enum sal_systab_entry_type {
147         SAL_DESC_ENTRY_POINT = 0,
148         SAL_DESC_MEMORY = 1,
149         SAL_DESC_PLATFORM_FEATURE = 2,
150         SAL_DESC_TR = 3,
151         SAL_DESC_PTC = 4,
152         SAL_DESC_AP_WAKEUP = 5
153 };
154 
155 /*
156  * Entry type:  Size:
157  *      0       48
158  *      1       32
159  *      2       16
160  *      3       32
161  *      4       16
162  *      5       16
163  */
164 #define SAL_DESC_SIZE(type)     "\060\040\020\040\020\020"[(unsigned) type]
165 
166 typedef struct ia64_sal_desc_entry_point {
167         u8 type;
168         u8 reserved1[7];
169         u64 pal_proc;
170         u64 sal_proc;
171         u64 gp;
172         u8 reserved2[16];
173 }ia64_sal_desc_entry_point_t;
174 
175 typedef struct ia64_sal_desc_memory {
176         u8 type;
177         u8 used_by_sal; /* needs to be mapped for SAL? */
178         u8 mem_attr;            /* current memory attribute setting */
179         u8 access_rights;       /* access rights set up by SAL */
180         u8 mem_attr_mask;       /* mask of supported memory attributes */
181         u8 reserved1;
182         u8 mem_type;            /* memory type */
183         u8 mem_usage;           /* memory usage */
184         u64 addr;               /* physical address of memory */
185         u32 length;     /* length (multiple of 4KB pages) */
186         u32 reserved2;
187         u8 oem_reserved[8];
188 } ia64_sal_desc_memory_t;
189 
190 typedef struct ia64_sal_desc_platform_feature {
191         u8 type;
192         u8 feature_mask;
193         u8 reserved1[14];
194 } ia64_sal_desc_platform_feature_t;
195 
196 typedef struct ia64_sal_desc_tr {
197         u8 type;
198         u8 tr_type;             /* 0 == instruction, 1 == data */
199         u8 regnum;              /* translation register number */
200         u8 reserved1[5];
201         u64 addr;               /* virtual address of area covered */
202         u64 page_size;          /* encoded page size */
203         u8 reserved2[8];
204 } ia64_sal_desc_tr_t;
205 
206 typedef struct ia64_sal_desc_ptc {
207         u8 type;
208         u8 reserved1[3];
209         u32 num_domains;        /* # of coherence domains */
210         u64 domain_info;        /* physical address of domain info table */
211 } ia64_sal_desc_ptc_t;
212 
213 typedef struct ia64_sal_ptc_domain_info {
214         u64 proc_count;         /* number of processors in domain */
215         u64 proc_list;          /* physical address of LID array */
216 } ia64_sal_ptc_domain_info_t;
217 
218 typedef struct ia64_sal_ptc_domain_proc_entry {
219         u64 id  : 8;            /* id of processor */
220         u64 eid : 8;            /* eid of processor */
221 } ia64_sal_ptc_domain_proc_entry_t;
222 
223 
224 #define IA64_SAL_AP_EXTERNAL_INT 0
225 
226 typedef struct ia64_sal_desc_ap_wakeup {
227         u8 type;
228         u8 mechanism;           /* 0 == external interrupt */
229         u8 reserved1[6];
230         u64 vector;             /* interrupt vector in range 0x10-0xff */
231 } ia64_sal_desc_ap_wakeup_t ;
232 
233 extern ia64_sal_handler ia64_sal;
234 extern struct ia64_sal_desc_ptc *ia64_ptc_domain_info;
235 
236 extern unsigned short sal_revision;     /* supported SAL spec revision */
237 extern unsigned short sal_version;      /* SAL version; OEM dependent */
238 #define SAL_VERSION_CODE(major, minor) ((bin2bcd(major) << 8) | bin2bcd(minor))
239 
240 extern const char *ia64_sal_strerror (long status);
241 extern void ia64_sal_init (struct ia64_sal_systab *sal_systab);
242 
243 /* SAL information type encodings */
244 enum {
245         SAL_INFO_TYPE_MCA  = 0,         /* Machine check abort information */
246         SAL_INFO_TYPE_INIT = 1,         /* Init information */
247         SAL_INFO_TYPE_CMC  = 2,         /* Corrected machine check information */
248         SAL_INFO_TYPE_CPE  = 3          /* Corrected platform error information */
249 };
250 
251 /* Encodings for machine check parameter types */
252 enum {
253         SAL_MC_PARAM_RENDEZ_INT    = 1, /* Rendezvous interrupt */
254         SAL_MC_PARAM_RENDEZ_WAKEUP = 2, /* Wakeup */
255         SAL_MC_PARAM_CPE_INT       = 3  /* Corrected Platform Error Int */
256 };
257 
258 /* Encodings for rendezvous mechanisms */
259 enum {
260         SAL_MC_PARAM_MECHANISM_INT = 1, /* Use interrupt */
261         SAL_MC_PARAM_MECHANISM_MEM = 2  /* Use memory synchronization variable*/
262 };
263 
264 /* Encodings for vectors which can be registered by the OS with SAL */
265 enum {
266         SAL_VECTOR_OS_MCA         = 0,
267         SAL_VECTOR_OS_INIT        = 1,
268         SAL_VECTOR_OS_BOOT_RENDEZ = 2
269 };
270 
271 /* Encodings for mca_opt parameter sent to SAL_MC_SET_PARAMS */
272 #define SAL_MC_PARAM_RZ_ALWAYS          0x1
273 #define SAL_MC_PARAM_BINIT_ESCALATE     0x10
274 
275 /*
276  * Definition of the SAL Error Log from the SAL spec
277  */
278 
279 /* SAL Error Record Section GUID Definitions */
280 #define SAL_PROC_DEV_ERR_SECT_GUID  \
281     EFI_GUID(0xe429faf1, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
282 #define SAL_PLAT_MEM_DEV_ERR_SECT_GUID  \
283     EFI_GUID(0xe429faf2, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
284 #define SAL_PLAT_SEL_DEV_ERR_SECT_GUID  \
285     EFI_GUID(0xe429faf3, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
286 #define SAL_PLAT_PCI_BUS_ERR_SECT_GUID  \
287     EFI_GUID(0xe429faf4, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
288 #define SAL_PLAT_SMBIOS_DEV_ERR_SECT_GUID  \
289     EFI_GUID(0xe429faf5, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
290 #define SAL_PLAT_PCI_COMP_ERR_SECT_GUID  \
291     EFI_GUID(0xe429faf6, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
292 #define SAL_PLAT_SPECIFIC_ERR_SECT_GUID  \
293     EFI_GUID(0xe429faf7, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
294 #define SAL_PLAT_HOST_CTLR_ERR_SECT_GUID  \
295     EFI_GUID(0xe429faf8, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
296 #define SAL_PLAT_BUS_ERR_SECT_GUID  \
297     EFI_GUID(0xe429faf9, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
298 #define PROCESSOR_ABSTRACTION_LAYER_OVERWRITE_GUID \
299     EFI_GUID(0x6cb0a200, 0x893a, 0x11da, 0x96, 0xd2, 0x0, 0x10, 0x83, 0xff, \
300                 0xca, 0x4d)
301 
302 #define MAX_CACHE_ERRORS        6
303 #define MAX_TLB_ERRORS          6
304 #define MAX_BUS_ERRORS          1
305 
306 /* Definition of version  according to SAL spec for logging purposes */
307 typedef struct sal_log_revision {
308         u8 minor;               /* BCD (0..99) */
309         u8 major;               /* BCD (0..99) */
310 } sal_log_revision_t;
311 
312 /* Definition of timestamp according to SAL spec for logging purposes */
313 typedef struct sal_log_timestamp {
314         u8 slh_second;          /* Second (0..59) */
315         u8 slh_minute;          /* Minute (0..59) */
316         u8 slh_hour;            /* Hour (0..23) */
317         u8 slh_reserved;
318         u8 slh_day;             /* Day (1..31) */
319         u8 slh_month;           /* Month (1..12) */
320         u8 slh_year;            /* Year (00..99) */
321         u8 slh_century;         /* Century (19, 20, 21, ...) */
322 } sal_log_timestamp_t;
323 
324 /* Definition of log record  header structures */
325 typedef struct sal_log_record_header {
326         u64 id;                         /* Unique monotonically increasing ID */
327         sal_log_revision_t revision;    /* Major and Minor revision of header */
328         u8 severity;                    /* Error Severity */
329         u8 validation_bits;             /* 0: platform_guid, 1: !timestamp */
330         u32 len;                        /* Length of this error log in bytes */
331         sal_log_timestamp_t timestamp;  /* Timestamp */
332         efi_guid_t platform_guid;       /* Unique OEM Platform ID */
333 } sal_log_record_header_t;
334 
335 #define sal_log_severity_recoverable    0
336 #define sal_log_severity_fatal          1
337 #define sal_log_severity_corrected      2
338 
339 /*
340  * Error Recovery Info (ERI) bit decode.  From SAL Spec section B.2.2 Table B-3
341  * Error Section Error_Recovery_Info Field Definition.
342  */
343 #define ERI_NOT_VALID           0x0     /* Error Recovery Field is not valid */
344 #define ERI_NOT_ACCESSIBLE      0x30    /* Resource not accessible */
345 #define ERI_CONTAINMENT_WARN    0x22    /* Corrupt data propagated */
346 #define ERI_UNCORRECTED_ERROR   0x20    /* Uncorrected error */
347 #define ERI_COMPONENT_RESET     0x24    /* Component must be reset */
348 #define ERI_CORR_ERROR_LOG      0x21    /* Corrected error, needs logging */
349 #define ERI_CORR_ERROR_THRESH   0x29    /* Corrected error threshold exceeded */
350 
351 /* Definition of log section header structures */
352 typedef struct sal_log_sec_header {
353     efi_guid_t guid;                    /* Unique Section ID */
354     sal_log_revision_t revision;        /* Major and Minor revision of Section */
355     u8 error_recovery_info;             /* Platform error recovery status */
356     u8 reserved;
357     u32 len;                            /* Section length */
358 } sal_log_section_hdr_t;
359 
360 typedef struct sal_log_mod_error_info {
361         struct {
362                 u64 check_info              : 1,
363                     requestor_identifier    : 1,
364                     responder_identifier    : 1,
365                     target_identifier       : 1,
366                     precise_ip              : 1,
367                     reserved                : 59;
368         } valid;
369         u64 check_info;
370         u64 requestor_identifier;
371         u64 responder_identifier;
372         u64 target_identifier;
373         u64 precise_ip;
374 } sal_log_mod_error_info_t;
375 
376 typedef struct sal_processor_static_info {
377         struct {
378                 u64 minstate        : 1,
379                     br              : 1,
380                     cr              : 1,
381                     ar              : 1,
382                     rr              : 1,
383                     fr              : 1,
384                     reserved        : 58;
385         } valid;
386         pal_min_state_area_t min_state_area;
387         u64 br[8];
388         u64 cr[128];
389         u64 ar[128];
390         u64 rr[8];
391         struct ia64_fpreg __attribute__ ((packed)) fr[128];
392 } sal_processor_static_info_t;
393 
394 struct sal_cpuid_info {
395         u64 regs[5];
396         u64 reserved;
397 };
398 
399 typedef struct sal_log_processor_info {
400         sal_log_section_hdr_t header;
401         struct {
402                 u64 proc_error_map      : 1,
403                     proc_state_param    : 1,
404                     proc_cr_lid         : 1,
405                     psi_static_struct   : 1,
406                     num_cache_check     : 4,
407                     num_tlb_check       : 4,
408                     num_bus_check       : 4,
409                     num_reg_file_check  : 4,
410                     num_ms_check        : 4,
411                     cpuid_info          : 1,
412                     reserved1           : 39;
413         } valid;
414         u64 proc_error_map;
415         u64 proc_state_parameter;
416         u64 proc_cr_lid;
417         /*
418          * The rest of this structure consists of variable-length arrays, which can't be
419          * expressed in C.
420          */
421         sal_log_mod_error_info_t info[0];
422         /*
423          * This is what the rest looked like if C supported variable-length arrays:
424          *
425          * sal_log_mod_error_info_t cache_check_info[.valid.num_cache_check];
426          * sal_log_mod_error_info_t tlb_check_info[.valid.num_tlb_check];
427          * sal_log_mod_error_info_t bus_check_info[.valid.num_bus_check];
428          * sal_log_mod_error_info_t reg_file_check_info[.valid.num_reg_file_check];
429          * sal_log_mod_error_info_t ms_check_info[.valid.num_ms_check];
430          * struct sal_cpuid_info cpuid_info;
431          * sal_processor_static_info_t processor_static_info;
432          */
433 } sal_log_processor_info_t;
434 
435 /* Given a sal_log_processor_info_t pointer, return a pointer to the processor_static_info: */
436 #define SAL_LPI_PSI_INFO(l)                                                                     \
437 ({      sal_log_processor_info_t *_l = (l);                                                     \
438         ((sal_processor_static_info_t *)                                                        \
439          ((char *) _l->info + ((_l->valid.num_cache_check + _l->valid.num_tlb_check             \
440                                 + _l->valid.num_bus_check + _l->valid.num_reg_file_check        \
441                                 + _l->valid.num_ms_check) * sizeof(sal_log_mod_error_info_t)    \
442                                + sizeof(struct sal_cpuid_info))));                              \
443 })
444 
445 /* platform error log structures */
446 
447 typedef struct sal_log_mem_dev_err_info {
448         sal_log_section_hdr_t header;
449         struct {
450                 u64 error_status    : 1,
451                     physical_addr   : 1,
452                     addr_mask       : 1,
453                     node            : 1,
454                     card            : 1,
455                     module          : 1,
456                     bank            : 1,
457                     device          : 1,
458                     row             : 1,
459                     column          : 1,
460                     bit_position    : 1,
461                     requestor_id    : 1,
462                     responder_id    : 1,
463                     target_id       : 1,
464                     bus_spec_data   : 1,
465                     oem_id          : 1,
466                     oem_data        : 1,
467                     reserved        : 47;
468         } valid;
469         u64 error_status;
470         u64 physical_addr;
471         u64 addr_mask;
472         u16 node;
473         u16 card;
474         u16 module;
475         u16 bank;
476         u16 device;
477         u16 row;
478         u16 column;
479         u16 bit_position;
480         u64 requestor_id;
481         u64 responder_id;
482         u64 target_id;
483         u64 bus_spec_data;
484         u8 oem_id[16];
485         u8 oem_data[1];                 /* Variable length data */
486 } sal_log_mem_dev_err_info_t;
487 
488 typedef struct sal_log_sel_dev_err_info {
489         sal_log_section_hdr_t header;
490         struct {
491                 u64 record_id       : 1,
492                     record_type     : 1,
493                     generator_id    : 1,
494                     evm_rev         : 1,
495                     sensor_type     : 1,
496                     sensor_num      : 1,
497                     event_dir       : 1,
498                     event_data1     : 1,
499                     event_data2     : 1,
500                     event_data3     : 1,
501                     reserved        : 54;
502         } valid;
503         u16 record_id;
504         u8 record_type;
505         u8 timestamp[4];
506         u16 generator_id;
507         u8 evm_rev;
508         u8 sensor_type;
509         u8 sensor_num;
510         u8 event_dir;
511         u8 event_data1;
512         u8 event_data2;
513         u8 event_data3;
514 } sal_log_sel_dev_err_info_t;
515 
516 typedef struct sal_log_pci_bus_err_info {
517         sal_log_section_hdr_t header;
518         struct {
519                 u64 err_status      : 1,
520                     err_type        : 1,
521                     bus_id          : 1,
522                     bus_address     : 1,
523                     bus_data        : 1,
524                     bus_cmd         : 1,
525                     requestor_id    : 1,
526                     responder_id    : 1,
527                     target_id       : 1,
528                     oem_data        : 1,
529                     reserved        : 54;
530         } valid;
531         u64 err_status;
532         u16 err_type;
533         u16 bus_id;
534         u32 reserved;
535         u64 bus_address;
536         u64 bus_data;
537         u64 bus_cmd;
538         u64 requestor_id;
539         u64 responder_id;
540         u64 target_id;
541         u8 oem_data[1];                 /* Variable length data */
542 } sal_log_pci_bus_err_info_t;
543 
544 typedef struct sal_log_smbios_dev_err_info {
545         sal_log_section_hdr_t header;
546         struct {
547                 u64 event_type      : 1,
548                     length          : 1,
549                     time_stamp      : 1,
550                     data            : 1,
551                     reserved1       : 60;
552         } valid;
553         u8 event_type;
554         u8 length;
555         u8 time_stamp[6];
556         u8 data[1];                     /* data of variable length, length == slsmb_length */
557 } sal_log_smbios_dev_err_info_t;
558 
559 typedef struct sal_log_pci_comp_err_info {
560         sal_log_section_hdr_t header;
561         struct {
562                 u64 err_status      : 1,
563                     comp_info       : 1,
564                     num_mem_regs    : 1,
565                     num_io_regs     : 1,
566                     reg_data_pairs  : 1,
567                     oem_data        : 1,
568                     reserved        : 58;
569         } valid;
570         u64 err_status;
571         struct {
572                 u16 vendor_id;
573                 u16 device_id;
574                 u8 class_code[3];
575                 u8 func_num;
576                 u8 dev_num;
577                 u8 bus_num;
578                 u8 seg_num;
579                 u8 reserved[5];
580         } comp_info;
581         u32 num_mem_regs;
582         u32 num_io_regs;
583         u64 reg_data_pairs[1];
584         /*
585          * array of address/data register pairs is num_mem_regs + num_io_regs elements
586          * long.  Each array element consists of a u64 address followed by a u64 data
587          * value.  The oem_data array immediately follows the reg_data_pairs array
588          */
589         u8 oem_data[1];                 /* Variable length data */
590 } sal_log_pci_comp_err_info_t;
591 
592 typedef struct sal_log_plat_specific_err_info {
593         sal_log_section_hdr_t header;
594         struct {
595                 u64 err_status      : 1,
596                     guid            : 1,
597                     oem_data        : 1,
598                     reserved        : 61;
599         } valid;
600         u64 err_status;
601         efi_guid_t guid;
602         u8 oem_data[1];                 /* platform specific variable length data */
603 } sal_log_plat_specific_err_info_t;
604 
605 typedef struct sal_log_host_ctlr_err_info {
606         sal_log_section_hdr_t header;
607         struct {
608                 u64 err_status      : 1,
609                     requestor_id    : 1,
610                     responder_id    : 1,
611                     target_id       : 1,
612                     bus_spec_data   : 1,
613                     oem_data        : 1,
614                     reserved        : 58;
615         } valid;
616         u64 err_status;
617         u64 requestor_id;
618         u64 responder_id;
619         u64 target_id;
620         u64 bus_spec_data;
621         u8 oem_data[1];                 /* Variable length OEM data */
622 } sal_log_host_ctlr_err_info_t;
623 
624 typedef struct sal_log_plat_bus_err_info {
625         sal_log_section_hdr_t header;
626         struct {
627                 u64 err_status      : 1,
628                     requestor_id    : 1,
629                     responder_id    : 1,
630                     target_id       : 1,
631                     bus_spec_data   : 1,
632                     oem_data        : 1,
633                     reserved        : 58;
634         } valid;
635         u64 err_status;
636         u64 requestor_id;
637         u64 responder_id;
638         u64 target_id;
639         u64 bus_spec_data;
640         u8 oem_data[1];                 /* Variable length OEM data */
641 } sal_log_plat_bus_err_info_t;
642 
643 /* Overall platform error section structure */
644 typedef union sal_log_platform_err_info {
645         sal_log_mem_dev_err_info_t mem_dev_err;
646         sal_log_sel_dev_err_info_t sel_dev_err;
647         sal_log_pci_bus_err_info_t pci_bus_err;
648         sal_log_smbios_dev_err_info_t smbios_dev_err;
649         sal_log_pci_comp_err_info_t pci_comp_err;
650         sal_log_plat_specific_err_info_t plat_specific_err;
651         sal_log_host_ctlr_err_info_t host_ctlr_err;
652         sal_log_plat_bus_err_info_t plat_bus_err;
653 } sal_log_platform_err_info_t;
654 
655 /* SAL log over-all, multi-section error record structure (processor+platform) */
656 typedef struct err_rec {
657         sal_log_record_header_t sal_elog_header;
658         sal_log_processor_info_t proc_err;
659         sal_log_platform_err_info_t plat_err;
660         u8 oem_data_pad[1024];
661 } ia64_err_rec_t;
662 
663 /*
664  * Now define a couple of inline functions for improved type checking
665  * and convenience.
666  */
667 
668 extern s64 ia64_sal_cache_flush (u64 cache_type);
669 extern void __init check_sal_cache_flush (void);
670 
671 /* Initialize all the processor and platform level instruction and data caches */
672 static inline s64
673 ia64_sal_cache_init (void)
674 {
675         struct ia64_sal_retval isrv;
676         SAL_CALL(isrv, SAL_CACHE_INIT, 0, 0, 0, 0, 0, 0, 0);
677         return isrv.status;
678 }
679 
680 /*
681  * Clear the processor and platform information logged by SAL with respect to the machine
682  * state at the time of MCA's, INITs, CMCs, or CPEs.
683  */
684 static inline s64
685 ia64_sal_clear_state_info (u64 sal_info_type)
686 {
687         struct ia64_sal_retval isrv;
688         SAL_CALL_REENTRANT(isrv, SAL_CLEAR_STATE_INFO, sal_info_type, 0,
689                       0, 0, 0, 0, 0);
690         return isrv.status;
691 }
692 
693 
694 /* Get the processor and platform information logged by SAL with respect to the machine
695  * state at the time of the MCAs, INITs, CMCs, or CPEs.
696  */
697 static inline u64
698 ia64_sal_get_state_info (u64 sal_info_type, u64 *sal_info)
699 {
700         struct ia64_sal_retval isrv;
701         SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO, sal_info_type, 0,
702                       sal_info, 0, 0, 0, 0);
703         if (isrv.status)
704                 return 0;
705 
706         return isrv.v0;
707 }
708 
709 /*
710  * Get the maximum size of the information logged by SAL with respect to the machine state
711  * at the time of MCAs, INITs, CMCs, or CPEs.
712  */
713 static inline u64
714 ia64_sal_get_state_info_size (u64 sal_info_type)
715 {
716         struct ia64_sal_retval isrv;
717         SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO_SIZE, sal_info_type, 0,
718                       0, 0, 0, 0, 0);
719         if (isrv.status)
720                 return 0;
721         return isrv.v0;
722 }
723 
724 /*
725  * Causes the processor to go into a spin loop within SAL where SAL awaits a wakeup from
726  * the monarch processor.  Must not lock, because it will not return on any cpu until the
727  * monarch processor sends a wake up.
728  */
729 static inline s64
730 ia64_sal_mc_rendez (void)
731 {
732         struct ia64_sal_retval isrv;
733         SAL_CALL_NOLOCK(isrv, SAL_MC_RENDEZ, 0, 0, 0, 0, 0, 0, 0);
734         return isrv.status;
735 }
736 
737 /*
738  * Allow the OS to specify the interrupt number to be used by SAL to interrupt OS during
739  * the machine check rendezvous sequence as well as the mechanism to wake up the
740  * non-monarch processor at the end of machine check processing.
741  * Returns the complete ia64_sal_retval because some calls return more than just a status
742  * value.
743  */
744 static inline struct ia64_sal_retval
745 ia64_sal_mc_set_params (u64 param_type, u64 i_or_m, u64 i_or_m_val, u64 timeout, u64 rz_always)
746 {
747         struct ia64_sal_retval isrv;
748         SAL_CALL(isrv, SAL_MC_SET_PARAMS, param_type, i_or_m, i_or_m_val,
749                  timeout, rz_always, 0, 0);
750         return isrv;
751 }
752 
753 /* Read from PCI configuration space */
754 static inline s64
755 ia64_sal_pci_config_read (u64 pci_config_addr, int type, u64 size, u64 *value)
756 {
757         struct ia64_sal_retval isrv;
758         SAL_CALL(isrv, SAL_PCI_CONFIG_READ, pci_config_addr, size, type, 0, 0, 0, 0);
759         if (value)
760                 *value = isrv.v0;
761         return isrv.status;
762 }
763 
764 /* Write to PCI configuration space */
765 static inline s64
766 ia64_sal_pci_config_write (u64 pci_config_addr, int type, u64 size, u64 value)
767 {
768         struct ia64_sal_retval isrv;
769         SAL_CALL(isrv, SAL_PCI_CONFIG_WRITE, pci_config_addr, size, value,
770                  type, 0, 0, 0);
771         return isrv.status;
772 }
773 
774 /*
775  * Register physical addresses of locations needed by SAL when SAL procedures are invoked
776  * in virtual mode.
777  */
778 static inline s64
779 ia64_sal_register_physical_addr (u64 phys_entry, u64 phys_addr)
780 {
781         struct ia64_sal_retval isrv;
782         SAL_CALL(isrv, SAL_REGISTER_PHYSICAL_ADDR, phys_entry, phys_addr,
783                  0, 0, 0, 0, 0);
784         return isrv.status;
785 }
786 
787 /*
788  * Register software dependent code locations within SAL. These locations are handlers or
789  * entry points where SAL will pass control for the specified event. These event handlers
790  * are for the bott rendezvous, MCAs and INIT scenarios.
791  */
792 static inline s64
793 ia64_sal_set_vectors (u64 vector_type,
794                       u64 handler_addr1, u64 gp1, u64 handler_len1,
795                       u64 handler_addr2, u64 gp2, u64 handler_len2)
796 {
797         struct ia64_sal_retval isrv;
798         SAL_CALL(isrv, SAL_SET_VECTORS, vector_type,
799                         handler_addr1, gp1, handler_len1,
800                         handler_addr2, gp2, handler_len2);
801 
802         return isrv.status;
803 }
804 
805 /* Update the contents of PAL block in the non-volatile storage device */
806 static inline s64
807 ia64_sal_update_pal (u64 param_buf, u64 scratch_buf, u64 scratch_buf_size,
808                      u64 *error_code, u64 *scratch_buf_size_needed)
809 {
810         struct ia64_sal_retval isrv;
811         SAL_CALL(isrv, SAL_UPDATE_PAL, param_buf, scratch_buf, scratch_buf_size,
812                  0, 0, 0, 0);
813         if (error_code)
814                 *error_code = isrv.v0;
815         if (scratch_buf_size_needed)
816                 *scratch_buf_size_needed = isrv.v1;
817         return isrv.status;
818 }
819 
820 /* Get physical processor die mapping in the platform. */
821 static inline s64
822 ia64_sal_physical_id_info(u16 *splid)
823 {
824         struct ia64_sal_retval isrv;
825 
826         if (sal_revision < SAL_VERSION_CODE(3,2))
827                 return -1;
828 
829         SAL_CALL(isrv, SAL_PHYSICAL_ID_INFO, 0, 0, 0, 0, 0, 0, 0);
830         if (splid)
831                 *splid = isrv.v0;
832         return isrv.status;
833 }
834 
835 extern unsigned long sal_platform_features;
836 
837 extern int (*salinfo_platform_oemdata)(const u8 *, u8 **, u64 *);
838 
839 struct sal_ret_values {
840         long r8; long r9; long r10; long r11;
841 };
842 
843 #define IA64_SAL_OEMFUNC_MIN            0x02000000
844 #define IA64_SAL_OEMFUNC_MAX            0x03ffffff
845 
846 extern int ia64_sal_oemcall(struct ia64_sal_retval *, u64, u64, u64, u64, u64,
847                             u64, u64, u64);
848 extern int ia64_sal_oemcall_nolock(struct ia64_sal_retval *, u64, u64, u64,
849                                    u64, u64, u64, u64, u64);
850 extern int ia64_sal_oemcall_reentrant(struct ia64_sal_retval *, u64, u64, u64,
851                                       u64, u64, u64, u64, u64);
852 extern long
853 ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
854                     unsigned long *drift_info);
855 #ifdef CONFIG_HOTPLUG_CPU
856 /*
857  * System Abstraction Layer Specification
858  * Section 3.2.5.1: OS_BOOT_RENDEZ to SAL return State.
859  * Note: region regs are stored first in head.S _start. Hence they must
860  * stay up front.
861  */
862 struct sal_to_os_boot {
863         u64 rr[8];              /* Region Registers */
864         u64 br[6];              /* br0:
865                                  * return addr into SAL boot rendez routine */
866         u64 gr1;                /* SAL:GP */
867         u64 gr12;               /* SAL:SP */
868         u64 gr13;               /* SAL: Task Pointer */
869         u64 fpsr;
870         u64 pfs;
871         u64 rnat;
872         u64 unat;
873         u64 bspstore;
874         u64 dcr;                /* Default Control Register */
875         u64 iva;
876         u64 pta;
877         u64 itv;
878         u64 pmv;
879         u64 cmcv;
880         u64 lrr[2];
881         u64 gr[4];
882         u64 pr;                 /* Predicate registers */
883         u64 lc;                 /* Loop Count */
884         struct ia64_fpreg fp[20];
885 };
886 
887 /*
888  * Global array allocated for NR_CPUS at boot time
889  */
890 extern struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS];
891 
892 extern void ia64_jump_to_sal(struct sal_to_os_boot *);
893 #endif
894 
895 extern void ia64_sal_handler_init(void *entry_point, void *gpval);
896 
897 #define PALO_MAX_TLB_PURGES     0xFFFF
898 #define PALO_SIG        "PALO"
899 
900 struct palo_table {
901         u8  signature[4];       /* Should be "PALO" */
902         u32 length;
903         u8  minor_revision;
904         u8  major_revision;
905         u8  checksum;
906         u8  reserved1[5];
907         u16 max_tlb_purges;
908         u8  reserved2[6];
909 };
910 
911 #define NPTCG_FROM_PAL                  0
912 #define NPTCG_FROM_PALO                 1
913 #define NPTCG_FROM_KERNEL_PARAMETER     2
914 
915 #endif /* __ASSEMBLY__ */
916 
917 #endif /* _ASM_IA64_SAL_H */
918 

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