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TOMOYO Linux Cross Reference
Linux/arch/ia64/include/asm/sal.h

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  1 /* SPDX-License-Identifier: GPL-2.0 */
  2 #ifndef _ASM_IA64_SAL_H
  3 #define _ASM_IA64_SAL_H
  4 
  5 /*
  6  * System Abstraction Layer definitions.
  7  *
  8  * This is based on version 2.5 of the manual "IA-64 System
  9  * Abstraction Layer".
 10  *
 11  * Copyright (C) 2001 Intel
 12  * Copyright (C) 2002 Jenna Hall <jenna.s.hall@intel.com>
 13  * Copyright (C) 2001 Fred Lewis <frederick.v.lewis@intel.com>
 14  * Copyright (C) 1998, 1999, 2001, 2003 Hewlett-Packard Co
 15  *      David Mosberger-Tang <davidm@hpl.hp.com>
 16  * Copyright (C) 1999 Srinivasa Prasad Thirumalachar <sprasad@sprasad.engr.sgi.com>
 17  *
 18  * 02/01/04 J. Hall Updated Error Record Structures to conform to July 2001
 19  *                  revision of the SAL spec.
 20  * 01/01/03 fvlewis Updated Error Record Structures to conform with Nov. 2000
 21  *                  revision of the SAL spec.
 22  * 99/09/29 davidm      Updated for SAL 2.6.
 23  * 00/03/29 cfleck      Updated SAL Error Logging info for processor (SAL 2.6)
 24  *                      (plus examples of platform error info structures from smariset @ Intel)
 25  */
 26 
 27 #define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT          0
 28 #define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT    1
 29 #define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT    2
 30 #define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT         3
 31 
 32 #define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK        (1<<IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT)
 33 #define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT)
 34 #define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT)
 35 #define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT       (1<<IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT)
 36 
 37 #ifndef __ASSEMBLY__
 38 
 39 #include <linux/bcd.h>
 40 #include <linux/spinlock.h>
 41 #include <linux/efi.h>
 42 
 43 #include <asm/pal.h>
 44 #include <asm/fpu.h>
 45 
 46 extern spinlock_t sal_lock;
 47 
 48 /* SAL spec _requires_ eight args for each call. */
 49 #define __IA64_FW_CALL(entry,result,a0,a1,a2,a3,a4,a5,a6,a7)    \
 50         result = (*entry)(a0,a1,a2,a3,a4,a5,a6,a7)
 51 
 52 # define IA64_FW_CALL(entry,result,args...) do {                \
 53         unsigned long __ia64_sc_flags;                          \
 54         struct ia64_fpreg __ia64_sc_fr[6];                      \
 55         ia64_save_scratch_fpregs(__ia64_sc_fr);                 \
 56         spin_lock_irqsave(&sal_lock, __ia64_sc_flags);          \
 57         __IA64_FW_CALL(entry, result, args);                    \
 58         spin_unlock_irqrestore(&sal_lock, __ia64_sc_flags);     \
 59         ia64_load_scratch_fpregs(__ia64_sc_fr);                 \
 60 } while (0)
 61 
 62 # define SAL_CALL(result,args...)                       \
 63         IA64_FW_CALL(ia64_sal, result, args);
 64 
 65 # define SAL_CALL_NOLOCK(result,args...) do {           \
 66         unsigned long __ia64_scn_flags;                 \
 67         struct ia64_fpreg __ia64_scn_fr[6];             \
 68         ia64_save_scratch_fpregs(__ia64_scn_fr);        \
 69         local_irq_save(__ia64_scn_flags);               \
 70         __IA64_FW_CALL(ia64_sal, result, args);         \
 71         local_irq_restore(__ia64_scn_flags);            \
 72         ia64_load_scratch_fpregs(__ia64_scn_fr);        \
 73 } while (0)
 74 
 75 # define SAL_CALL_REENTRANT(result,args...) do {        \
 76         struct ia64_fpreg __ia64_scs_fr[6];             \
 77         ia64_save_scratch_fpregs(__ia64_scs_fr);        \
 78         preempt_disable();                              \
 79         __IA64_FW_CALL(ia64_sal, result, args);         \
 80         preempt_enable();                               \
 81         ia64_load_scratch_fpregs(__ia64_scs_fr);        \
 82 } while (0)
 83 
 84 #define SAL_SET_VECTORS                 0x01000000
 85 #define SAL_GET_STATE_INFO              0x01000001
 86 #define SAL_GET_STATE_INFO_SIZE         0x01000002
 87 #define SAL_CLEAR_STATE_INFO            0x01000003
 88 #define SAL_MC_RENDEZ                   0x01000004
 89 #define SAL_MC_SET_PARAMS               0x01000005
 90 #define SAL_REGISTER_PHYSICAL_ADDR      0x01000006
 91 
 92 #define SAL_CACHE_FLUSH                 0x01000008
 93 #define SAL_CACHE_INIT                  0x01000009
 94 #define SAL_PCI_CONFIG_READ             0x01000010
 95 #define SAL_PCI_CONFIG_WRITE            0x01000011
 96 #define SAL_FREQ_BASE                   0x01000012
 97 #define SAL_PHYSICAL_ID_INFO            0x01000013
 98 
 99 #define SAL_UPDATE_PAL                  0x01000020
100 
101 struct ia64_sal_retval {
102         /*
103          * A zero status value indicates call completed without error.
104          * A negative status value indicates reason of call failure.
105          * A positive status value indicates success but an
106          * informational value should be printed (e.g., "reboot for
107          * change to take effect").
108          */
109         long status;
110         unsigned long v0;
111         unsigned long v1;
112         unsigned long v2;
113 };
114 
115 typedef struct ia64_sal_retval (*ia64_sal_handler) (u64, ...);
116 
117 enum {
118         SAL_FREQ_BASE_PLATFORM = 0,
119         SAL_FREQ_BASE_INTERVAL_TIMER = 1,
120         SAL_FREQ_BASE_REALTIME_CLOCK = 2
121 };
122 
123 /*
124  * The SAL system table is followed by a variable number of variable
125  * length descriptors.  The structure of these descriptors follows
126  * below.
127  * The defininition follows SAL specs from July 2000
128  */
129 struct ia64_sal_systab {
130         u8 signature[4];        /* should be "SST_" */
131         u32 size;               /* size of this table in bytes */
132         u8 sal_rev_minor;
133         u8 sal_rev_major;
134         u16 entry_count;        /* # of entries in variable portion */
135         u8 checksum;
136         u8 reserved1[7];
137         u8 sal_a_rev_minor;
138         u8 sal_a_rev_major;
139         u8 sal_b_rev_minor;
140         u8 sal_b_rev_major;
141         /* oem_id & product_id: terminating NUL is missing if string is exactly 32 bytes long. */
142         u8 oem_id[32];
143         u8 product_id[32];      /* ASCII product id  */
144         u8 reserved2[8];
145 };
146 
147 enum sal_systab_entry_type {
148         SAL_DESC_ENTRY_POINT = 0,
149         SAL_DESC_MEMORY = 1,
150         SAL_DESC_PLATFORM_FEATURE = 2,
151         SAL_DESC_TR = 3,
152         SAL_DESC_PTC = 4,
153         SAL_DESC_AP_WAKEUP = 5
154 };
155 
156 /*
157  * Entry type:  Size:
158  *      0       48
159  *      1       32
160  *      2       16
161  *      3       32
162  *      4       16
163  *      5       16
164  */
165 #define SAL_DESC_SIZE(type)     "\060\040\020\040\020\020"[(unsigned) type]
166 
167 typedef struct ia64_sal_desc_entry_point {
168         u8 type;
169         u8 reserved1[7];
170         u64 pal_proc;
171         u64 sal_proc;
172         u64 gp;
173         u8 reserved2[16];
174 }ia64_sal_desc_entry_point_t;
175 
176 typedef struct ia64_sal_desc_memory {
177         u8 type;
178         u8 used_by_sal; /* needs to be mapped for SAL? */
179         u8 mem_attr;            /* current memory attribute setting */
180         u8 access_rights;       /* access rights set up by SAL */
181         u8 mem_attr_mask;       /* mask of supported memory attributes */
182         u8 reserved1;
183         u8 mem_type;            /* memory type */
184         u8 mem_usage;           /* memory usage */
185         u64 addr;               /* physical address of memory */
186         u32 length;     /* length (multiple of 4KB pages) */
187         u32 reserved2;
188         u8 oem_reserved[8];
189 } ia64_sal_desc_memory_t;
190 
191 typedef struct ia64_sal_desc_platform_feature {
192         u8 type;
193         u8 feature_mask;
194         u8 reserved1[14];
195 } ia64_sal_desc_platform_feature_t;
196 
197 typedef struct ia64_sal_desc_tr {
198         u8 type;
199         u8 tr_type;             /* 0 == instruction, 1 == data */
200         u8 regnum;              /* translation register number */
201         u8 reserved1[5];
202         u64 addr;               /* virtual address of area covered */
203         u64 page_size;          /* encoded page size */
204         u8 reserved2[8];
205 } ia64_sal_desc_tr_t;
206 
207 typedef struct ia64_sal_desc_ptc {
208         u8 type;
209         u8 reserved1[3];
210         u32 num_domains;        /* # of coherence domains */
211         u64 domain_info;        /* physical address of domain info table */
212 } ia64_sal_desc_ptc_t;
213 
214 typedef struct ia64_sal_ptc_domain_info {
215         u64 proc_count;         /* number of processors in domain */
216         u64 proc_list;          /* physical address of LID array */
217 } ia64_sal_ptc_domain_info_t;
218 
219 typedef struct ia64_sal_ptc_domain_proc_entry {
220         u64 id  : 8;            /* id of processor */
221         u64 eid : 8;            /* eid of processor */
222 } ia64_sal_ptc_domain_proc_entry_t;
223 
224 
225 #define IA64_SAL_AP_EXTERNAL_INT 0
226 
227 typedef struct ia64_sal_desc_ap_wakeup {
228         u8 type;
229         u8 mechanism;           /* 0 == external interrupt */
230         u8 reserved1[6];
231         u64 vector;             /* interrupt vector in range 0x10-0xff */
232 } ia64_sal_desc_ap_wakeup_t ;
233 
234 extern ia64_sal_handler ia64_sal;
235 extern struct ia64_sal_desc_ptc *ia64_ptc_domain_info;
236 
237 extern unsigned short sal_revision;     /* supported SAL spec revision */
238 extern unsigned short sal_version;      /* SAL version; OEM dependent */
239 #define SAL_VERSION_CODE(major, minor) ((bin2bcd(major) << 8) | bin2bcd(minor))
240 
241 extern const char *ia64_sal_strerror (long status);
242 extern void ia64_sal_init (struct ia64_sal_systab *sal_systab);
243 
244 /* SAL information type encodings */
245 enum {
246         SAL_INFO_TYPE_MCA  = 0,         /* Machine check abort information */
247         SAL_INFO_TYPE_INIT = 1,         /* Init information */
248         SAL_INFO_TYPE_CMC  = 2,         /* Corrected machine check information */
249         SAL_INFO_TYPE_CPE  = 3          /* Corrected platform error information */
250 };
251 
252 /* Encodings for machine check parameter types */
253 enum {
254         SAL_MC_PARAM_RENDEZ_INT    = 1, /* Rendezvous interrupt */
255         SAL_MC_PARAM_RENDEZ_WAKEUP = 2, /* Wakeup */
256         SAL_MC_PARAM_CPE_INT       = 3  /* Corrected Platform Error Int */
257 };
258 
259 /* Encodings for rendezvous mechanisms */
260 enum {
261         SAL_MC_PARAM_MECHANISM_INT = 1, /* Use interrupt */
262         SAL_MC_PARAM_MECHANISM_MEM = 2  /* Use memory synchronization variable*/
263 };
264 
265 /* Encodings for vectors which can be registered by the OS with SAL */
266 enum {
267         SAL_VECTOR_OS_MCA         = 0,
268         SAL_VECTOR_OS_INIT        = 1,
269         SAL_VECTOR_OS_BOOT_RENDEZ = 2
270 };
271 
272 /* Encodings for mca_opt parameter sent to SAL_MC_SET_PARAMS */
273 #define SAL_MC_PARAM_RZ_ALWAYS          0x1
274 #define SAL_MC_PARAM_BINIT_ESCALATE     0x10
275 
276 /*
277  * Definition of the SAL Error Log from the SAL spec
278  */
279 
280 /* SAL Error Record Section GUID Definitions */
281 #define SAL_PROC_DEV_ERR_SECT_GUID  \
282     EFI_GUID(0xe429faf1, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
283 #define SAL_PLAT_MEM_DEV_ERR_SECT_GUID  \
284     EFI_GUID(0xe429faf2, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
285 #define SAL_PLAT_SEL_DEV_ERR_SECT_GUID  \
286     EFI_GUID(0xe429faf3, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
287 #define SAL_PLAT_PCI_BUS_ERR_SECT_GUID  \
288     EFI_GUID(0xe429faf4, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
289 #define SAL_PLAT_SMBIOS_DEV_ERR_SECT_GUID  \
290     EFI_GUID(0xe429faf5, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
291 #define SAL_PLAT_PCI_COMP_ERR_SECT_GUID  \
292     EFI_GUID(0xe429faf6, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
293 #define SAL_PLAT_SPECIFIC_ERR_SECT_GUID  \
294     EFI_GUID(0xe429faf7, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
295 #define SAL_PLAT_HOST_CTLR_ERR_SECT_GUID  \
296     EFI_GUID(0xe429faf8, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
297 #define SAL_PLAT_BUS_ERR_SECT_GUID  \
298     EFI_GUID(0xe429faf9, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
299 #define PROCESSOR_ABSTRACTION_LAYER_OVERWRITE_GUID \
300     EFI_GUID(0x6cb0a200, 0x893a, 0x11da, 0x96, 0xd2, 0x0, 0x10, 0x83, 0xff, \
301                 0xca, 0x4d)
302 
303 #define MAX_CACHE_ERRORS        6
304 #define MAX_TLB_ERRORS          6
305 #define MAX_BUS_ERRORS          1
306 
307 /* Definition of version  according to SAL spec for logging purposes */
308 typedef struct sal_log_revision {
309         u8 minor;               /* BCD (0..99) */
310         u8 major;               /* BCD (0..99) */
311 } sal_log_revision_t;
312 
313 /* Definition of timestamp according to SAL spec for logging purposes */
314 typedef struct sal_log_timestamp {
315         u8 slh_second;          /* Second (0..59) */
316         u8 slh_minute;          /* Minute (0..59) */
317         u8 slh_hour;            /* Hour (0..23) */
318         u8 slh_reserved;
319         u8 slh_day;             /* Day (1..31) */
320         u8 slh_month;           /* Month (1..12) */
321         u8 slh_year;            /* Year (00..99) */
322         u8 slh_century;         /* Century (19, 20, 21, ...) */
323 } sal_log_timestamp_t;
324 
325 /* Definition of log record  header structures */
326 typedef struct sal_log_record_header {
327         u64 id;                         /* Unique monotonically increasing ID */
328         sal_log_revision_t revision;    /* Major and Minor revision of header */
329         u8 severity;                    /* Error Severity */
330         u8 validation_bits;             /* 0: platform_guid, 1: !timestamp */
331         u32 len;                        /* Length of this error log in bytes */
332         sal_log_timestamp_t timestamp;  /* Timestamp */
333         efi_guid_t platform_guid;       /* Unique OEM Platform ID */
334 } sal_log_record_header_t;
335 
336 #define sal_log_severity_recoverable    0
337 #define sal_log_severity_fatal          1
338 #define sal_log_severity_corrected      2
339 
340 /*
341  * Error Recovery Info (ERI) bit decode.  From SAL Spec section B.2.2 Table B-3
342  * Error Section Error_Recovery_Info Field Definition.
343  */
344 #define ERI_NOT_VALID           0x0     /* Error Recovery Field is not valid */
345 #define ERI_NOT_ACCESSIBLE      0x30    /* Resource not accessible */
346 #define ERI_CONTAINMENT_WARN    0x22    /* Corrupt data propagated */
347 #define ERI_UNCORRECTED_ERROR   0x20    /* Uncorrected error */
348 #define ERI_COMPONENT_RESET     0x24    /* Component must be reset */
349 #define ERI_CORR_ERROR_LOG      0x21    /* Corrected error, needs logging */
350 #define ERI_CORR_ERROR_THRESH   0x29    /* Corrected error threshold exceeded */
351 
352 /* Definition of log section header structures */
353 typedef struct sal_log_sec_header {
354     efi_guid_t guid;                    /* Unique Section ID */
355     sal_log_revision_t revision;        /* Major and Minor revision of Section */
356     u8 error_recovery_info;             /* Platform error recovery status */
357     u8 reserved;
358     u32 len;                            /* Section length */
359 } sal_log_section_hdr_t;
360 
361 typedef struct sal_log_mod_error_info {
362         struct {
363                 u64 check_info              : 1,
364                     requestor_identifier    : 1,
365                     responder_identifier    : 1,
366                     target_identifier       : 1,
367                     precise_ip              : 1,
368                     reserved                : 59;
369         } valid;
370         u64 check_info;
371         u64 requestor_identifier;
372         u64 responder_identifier;
373         u64 target_identifier;
374         u64 precise_ip;
375 } sal_log_mod_error_info_t;
376 
377 typedef struct sal_processor_static_info {
378         struct {
379                 u64 minstate        : 1,
380                     br              : 1,
381                     cr              : 1,
382                     ar              : 1,
383                     rr              : 1,
384                     fr              : 1,
385                     reserved        : 58;
386         } valid;
387         pal_min_state_area_t min_state_area;
388         u64 br[8];
389         u64 cr[128];
390         u64 ar[128];
391         u64 rr[8];
392         struct ia64_fpreg __attribute__ ((packed)) fr[128];
393 } sal_processor_static_info_t;
394 
395 struct sal_cpuid_info {
396         u64 regs[5];
397         u64 reserved;
398 };
399 
400 typedef struct sal_log_processor_info {
401         sal_log_section_hdr_t header;
402         struct {
403                 u64 proc_error_map      : 1,
404                     proc_state_param    : 1,
405                     proc_cr_lid         : 1,
406                     psi_static_struct   : 1,
407                     num_cache_check     : 4,
408                     num_tlb_check       : 4,
409                     num_bus_check       : 4,
410                     num_reg_file_check  : 4,
411                     num_ms_check        : 4,
412                     cpuid_info          : 1,
413                     reserved1           : 39;
414         } valid;
415         u64 proc_error_map;
416         u64 proc_state_parameter;
417         u64 proc_cr_lid;
418         /*
419          * The rest of this structure consists of variable-length arrays, which can't be
420          * expressed in C.
421          */
422         sal_log_mod_error_info_t info[0];
423         /*
424          * This is what the rest looked like if C supported variable-length arrays:
425          *
426          * sal_log_mod_error_info_t cache_check_info[.valid.num_cache_check];
427          * sal_log_mod_error_info_t tlb_check_info[.valid.num_tlb_check];
428          * sal_log_mod_error_info_t bus_check_info[.valid.num_bus_check];
429          * sal_log_mod_error_info_t reg_file_check_info[.valid.num_reg_file_check];
430          * sal_log_mod_error_info_t ms_check_info[.valid.num_ms_check];
431          * struct sal_cpuid_info cpuid_info;
432          * sal_processor_static_info_t processor_static_info;
433          */
434 } sal_log_processor_info_t;
435 
436 /* Given a sal_log_processor_info_t pointer, return a pointer to the processor_static_info: */
437 #define SAL_LPI_PSI_INFO(l)                                                                     \
438 ({      sal_log_processor_info_t *_l = (l);                                                     \
439         ((sal_processor_static_info_t *)                                                        \
440          ((char *) _l->info + ((_l->valid.num_cache_check + _l->valid.num_tlb_check             \
441                                 + _l->valid.num_bus_check + _l->valid.num_reg_file_check        \
442                                 + _l->valid.num_ms_check) * sizeof(sal_log_mod_error_info_t)    \
443                                + sizeof(struct sal_cpuid_info))));                              \
444 })
445 
446 /* platform error log structures */
447 
448 typedef struct sal_log_mem_dev_err_info {
449         sal_log_section_hdr_t header;
450         struct {
451                 u64 error_status    : 1,
452                     physical_addr   : 1,
453                     addr_mask       : 1,
454                     node            : 1,
455                     card            : 1,
456                     module          : 1,
457                     bank            : 1,
458                     device          : 1,
459                     row             : 1,
460                     column          : 1,
461                     bit_position    : 1,
462                     requestor_id    : 1,
463                     responder_id    : 1,
464                     target_id       : 1,
465                     bus_spec_data   : 1,
466                     oem_id          : 1,
467                     oem_data        : 1,
468                     reserved        : 47;
469         } valid;
470         u64 error_status;
471         u64 physical_addr;
472         u64 addr_mask;
473         u16 node;
474         u16 card;
475         u16 module;
476         u16 bank;
477         u16 device;
478         u16 row;
479         u16 column;
480         u16 bit_position;
481         u64 requestor_id;
482         u64 responder_id;
483         u64 target_id;
484         u64 bus_spec_data;
485         u8 oem_id[16];
486         u8 oem_data[1];                 /* Variable length data */
487 } sal_log_mem_dev_err_info_t;
488 
489 typedef struct sal_log_sel_dev_err_info {
490         sal_log_section_hdr_t header;
491         struct {
492                 u64 record_id       : 1,
493                     record_type     : 1,
494                     generator_id    : 1,
495                     evm_rev         : 1,
496                     sensor_type     : 1,
497                     sensor_num      : 1,
498                     event_dir       : 1,
499                     event_data1     : 1,
500                     event_data2     : 1,
501                     event_data3     : 1,
502                     reserved        : 54;
503         } valid;
504         u16 record_id;
505         u8 record_type;
506         u8 timestamp[4];
507         u16 generator_id;
508         u8 evm_rev;
509         u8 sensor_type;
510         u8 sensor_num;
511         u8 event_dir;
512         u8 event_data1;
513         u8 event_data2;
514         u8 event_data3;
515 } sal_log_sel_dev_err_info_t;
516 
517 typedef struct sal_log_pci_bus_err_info {
518         sal_log_section_hdr_t header;
519         struct {
520                 u64 err_status      : 1,
521                     err_type        : 1,
522                     bus_id          : 1,
523                     bus_address     : 1,
524                     bus_data        : 1,
525                     bus_cmd         : 1,
526                     requestor_id    : 1,
527                     responder_id    : 1,
528                     target_id       : 1,
529                     oem_data        : 1,
530                     reserved        : 54;
531         } valid;
532         u64 err_status;
533         u16 err_type;
534         u16 bus_id;
535         u32 reserved;
536         u64 bus_address;
537         u64 bus_data;
538         u64 bus_cmd;
539         u64 requestor_id;
540         u64 responder_id;
541         u64 target_id;
542         u8 oem_data[1];                 /* Variable length data */
543 } sal_log_pci_bus_err_info_t;
544 
545 typedef struct sal_log_smbios_dev_err_info {
546         sal_log_section_hdr_t header;
547         struct {
548                 u64 event_type      : 1,
549                     length          : 1,
550                     time_stamp      : 1,
551                     data            : 1,
552                     reserved1       : 60;
553         } valid;
554         u8 event_type;
555         u8 length;
556         u8 time_stamp[6];
557         u8 data[1];                     /* data of variable length, length == slsmb_length */
558 } sal_log_smbios_dev_err_info_t;
559 
560 typedef struct sal_log_pci_comp_err_info {
561         sal_log_section_hdr_t header;
562         struct {
563                 u64 err_status      : 1,
564                     comp_info       : 1,
565                     num_mem_regs    : 1,
566                     num_io_regs     : 1,
567                     reg_data_pairs  : 1,
568                     oem_data        : 1,
569                     reserved        : 58;
570         } valid;
571         u64 err_status;
572         struct {
573                 u16 vendor_id;
574                 u16 device_id;
575                 u8 class_code[3];
576                 u8 func_num;
577                 u8 dev_num;
578                 u8 bus_num;
579                 u8 seg_num;
580                 u8 reserved[5];
581         } comp_info;
582         u32 num_mem_regs;
583         u32 num_io_regs;
584         u64 reg_data_pairs[1];
585         /*
586          * array of address/data register pairs is num_mem_regs + num_io_regs elements
587          * long.  Each array element consists of a u64 address followed by a u64 data
588          * value.  The oem_data array immediately follows the reg_data_pairs array
589          */
590         u8 oem_data[1];                 /* Variable length data */
591 } sal_log_pci_comp_err_info_t;
592 
593 typedef struct sal_log_plat_specific_err_info {
594         sal_log_section_hdr_t header;
595         struct {
596                 u64 err_status      : 1,
597                     guid            : 1,
598                     oem_data        : 1,
599                     reserved        : 61;
600         } valid;
601         u64 err_status;
602         efi_guid_t guid;
603         u8 oem_data[1];                 /* platform specific variable length data */
604 } sal_log_plat_specific_err_info_t;
605 
606 typedef struct sal_log_host_ctlr_err_info {
607         sal_log_section_hdr_t header;
608         struct {
609                 u64 err_status      : 1,
610                     requestor_id    : 1,
611                     responder_id    : 1,
612                     target_id       : 1,
613                     bus_spec_data   : 1,
614                     oem_data        : 1,
615                     reserved        : 58;
616         } valid;
617         u64 err_status;
618         u64 requestor_id;
619         u64 responder_id;
620         u64 target_id;
621         u64 bus_spec_data;
622         u8 oem_data[1];                 /* Variable length OEM data */
623 } sal_log_host_ctlr_err_info_t;
624 
625 typedef struct sal_log_plat_bus_err_info {
626         sal_log_section_hdr_t header;
627         struct {
628                 u64 err_status      : 1,
629                     requestor_id    : 1,
630                     responder_id    : 1,
631                     target_id       : 1,
632                     bus_spec_data   : 1,
633                     oem_data        : 1,
634                     reserved        : 58;
635         } valid;
636         u64 err_status;
637         u64 requestor_id;
638         u64 responder_id;
639         u64 target_id;
640         u64 bus_spec_data;
641         u8 oem_data[1];                 /* Variable length OEM data */
642 } sal_log_plat_bus_err_info_t;
643 
644 /* Overall platform error section structure */
645 typedef union sal_log_platform_err_info {
646         sal_log_mem_dev_err_info_t mem_dev_err;
647         sal_log_sel_dev_err_info_t sel_dev_err;
648         sal_log_pci_bus_err_info_t pci_bus_err;
649         sal_log_smbios_dev_err_info_t smbios_dev_err;
650         sal_log_pci_comp_err_info_t pci_comp_err;
651         sal_log_plat_specific_err_info_t plat_specific_err;
652         sal_log_host_ctlr_err_info_t host_ctlr_err;
653         sal_log_plat_bus_err_info_t plat_bus_err;
654 } sal_log_platform_err_info_t;
655 
656 /* SAL log over-all, multi-section error record structure (processor+platform) */
657 typedef struct err_rec {
658         sal_log_record_header_t sal_elog_header;
659         sal_log_processor_info_t proc_err;
660         sal_log_platform_err_info_t plat_err;
661         u8 oem_data_pad[1024];
662 } ia64_err_rec_t;
663 
664 /*
665  * Now define a couple of inline functions for improved type checking
666  * and convenience.
667  */
668 
669 extern s64 ia64_sal_cache_flush (u64 cache_type);
670 extern void __init check_sal_cache_flush (void);
671 
672 /* Initialize all the processor and platform level instruction and data caches */
673 static inline s64
674 ia64_sal_cache_init (void)
675 {
676         struct ia64_sal_retval isrv;
677         SAL_CALL(isrv, SAL_CACHE_INIT, 0, 0, 0, 0, 0, 0, 0);
678         return isrv.status;
679 }
680 
681 /*
682  * Clear the processor and platform information logged by SAL with respect to the machine
683  * state at the time of MCA's, INITs, CMCs, or CPEs.
684  */
685 static inline s64
686 ia64_sal_clear_state_info (u64 sal_info_type)
687 {
688         struct ia64_sal_retval isrv;
689         SAL_CALL_REENTRANT(isrv, SAL_CLEAR_STATE_INFO, sal_info_type, 0,
690                       0, 0, 0, 0, 0);
691         return isrv.status;
692 }
693 
694 
695 /* Get the processor and platform information logged by SAL with respect to the machine
696  * state at the time of the MCAs, INITs, CMCs, or CPEs.
697  */
698 static inline u64
699 ia64_sal_get_state_info (u64 sal_info_type, u64 *sal_info)
700 {
701         struct ia64_sal_retval isrv;
702         SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO, sal_info_type, 0,
703                       sal_info, 0, 0, 0, 0);
704         if (isrv.status)
705                 return 0;
706 
707         return isrv.v0;
708 }
709 
710 /*
711  * Get the maximum size of the information logged by SAL with respect to the machine state
712  * at the time of MCAs, INITs, CMCs, or CPEs.
713  */
714 static inline u64
715 ia64_sal_get_state_info_size (u64 sal_info_type)
716 {
717         struct ia64_sal_retval isrv;
718         SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO_SIZE, sal_info_type, 0,
719                       0, 0, 0, 0, 0);
720         if (isrv.status)
721                 return 0;
722         return isrv.v0;
723 }
724 
725 /*
726  * Causes the processor to go into a spin loop within SAL where SAL awaits a wakeup from
727  * the monarch processor.  Must not lock, because it will not return on any cpu until the
728  * monarch processor sends a wake up.
729  */
730 static inline s64
731 ia64_sal_mc_rendez (void)
732 {
733         struct ia64_sal_retval isrv;
734         SAL_CALL_NOLOCK(isrv, SAL_MC_RENDEZ, 0, 0, 0, 0, 0, 0, 0);
735         return isrv.status;
736 }
737 
738 /*
739  * Allow the OS to specify the interrupt number to be used by SAL to interrupt OS during
740  * the machine check rendezvous sequence as well as the mechanism to wake up the
741  * non-monarch processor at the end of machine check processing.
742  * Returns the complete ia64_sal_retval because some calls return more than just a status
743  * value.
744  */
745 static inline struct ia64_sal_retval
746 ia64_sal_mc_set_params (u64 param_type, u64 i_or_m, u64 i_or_m_val, u64 timeout, u64 rz_always)
747 {
748         struct ia64_sal_retval isrv;
749         SAL_CALL(isrv, SAL_MC_SET_PARAMS, param_type, i_or_m, i_or_m_val,
750                  timeout, rz_always, 0, 0);
751         return isrv;
752 }
753 
754 /* Read from PCI configuration space */
755 static inline s64
756 ia64_sal_pci_config_read (u64 pci_config_addr, int type, u64 size, u64 *value)
757 {
758         struct ia64_sal_retval isrv;
759         SAL_CALL(isrv, SAL_PCI_CONFIG_READ, pci_config_addr, size, type, 0, 0, 0, 0);
760         if (value)
761                 *value = isrv.v0;
762         return isrv.status;
763 }
764 
765 /* Write to PCI configuration space */
766 static inline s64
767 ia64_sal_pci_config_write (u64 pci_config_addr, int type, u64 size, u64 value)
768 {
769         struct ia64_sal_retval isrv;
770         SAL_CALL(isrv, SAL_PCI_CONFIG_WRITE, pci_config_addr, size, value,
771                  type, 0, 0, 0);
772         return isrv.status;
773 }
774 
775 /*
776  * Register physical addresses of locations needed by SAL when SAL procedures are invoked
777  * in virtual mode.
778  */
779 static inline s64
780 ia64_sal_register_physical_addr (u64 phys_entry, u64 phys_addr)
781 {
782         struct ia64_sal_retval isrv;
783         SAL_CALL(isrv, SAL_REGISTER_PHYSICAL_ADDR, phys_entry, phys_addr,
784                  0, 0, 0, 0, 0);
785         return isrv.status;
786 }
787 
788 /*
789  * Register software dependent code locations within SAL. These locations are handlers or
790  * entry points where SAL will pass control for the specified event. These event handlers
791  * are for the bott rendezvous, MCAs and INIT scenarios.
792  */
793 static inline s64
794 ia64_sal_set_vectors (u64 vector_type,
795                       u64 handler_addr1, u64 gp1, u64 handler_len1,
796                       u64 handler_addr2, u64 gp2, u64 handler_len2)
797 {
798         struct ia64_sal_retval isrv;
799         SAL_CALL(isrv, SAL_SET_VECTORS, vector_type,
800                         handler_addr1, gp1, handler_len1,
801                         handler_addr2, gp2, handler_len2);
802 
803         return isrv.status;
804 }
805 
806 /* Update the contents of PAL block in the non-volatile storage device */
807 static inline s64
808 ia64_sal_update_pal (u64 param_buf, u64 scratch_buf, u64 scratch_buf_size,
809                      u64 *error_code, u64 *scratch_buf_size_needed)
810 {
811         struct ia64_sal_retval isrv;
812         SAL_CALL(isrv, SAL_UPDATE_PAL, param_buf, scratch_buf, scratch_buf_size,
813                  0, 0, 0, 0);
814         if (error_code)
815                 *error_code = isrv.v0;
816         if (scratch_buf_size_needed)
817                 *scratch_buf_size_needed = isrv.v1;
818         return isrv.status;
819 }
820 
821 /* Get physical processor die mapping in the platform. */
822 static inline s64
823 ia64_sal_physical_id_info(u16 *splid)
824 {
825         struct ia64_sal_retval isrv;
826 
827         if (sal_revision < SAL_VERSION_CODE(3,2))
828                 return -1;
829 
830         SAL_CALL(isrv, SAL_PHYSICAL_ID_INFO, 0, 0, 0, 0, 0, 0, 0);
831         if (splid)
832                 *splid = isrv.v0;
833         return isrv.status;
834 }
835 
836 extern unsigned long sal_platform_features;
837 
838 extern int (*salinfo_platform_oemdata)(const u8 *, u8 **, u64 *);
839 
840 struct sal_ret_values {
841         long r8; long r9; long r10; long r11;
842 };
843 
844 #define IA64_SAL_OEMFUNC_MIN            0x02000000
845 #define IA64_SAL_OEMFUNC_MAX            0x03ffffff
846 
847 extern int ia64_sal_oemcall(struct ia64_sal_retval *, u64, u64, u64, u64, u64,
848                             u64, u64, u64);
849 extern int ia64_sal_oemcall_nolock(struct ia64_sal_retval *, u64, u64, u64,
850                                    u64, u64, u64, u64, u64);
851 extern int ia64_sal_oemcall_reentrant(struct ia64_sal_retval *, u64, u64, u64,
852                                       u64, u64, u64, u64, u64);
853 extern long
854 ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
855                     unsigned long *drift_info);
856 #ifdef CONFIG_HOTPLUG_CPU
857 /*
858  * System Abstraction Layer Specification
859  * Section 3.2.5.1: OS_BOOT_RENDEZ to SAL return State.
860  * Note: region regs are stored first in head.S _start. Hence they must
861  * stay up front.
862  */
863 struct sal_to_os_boot {
864         u64 rr[8];              /* Region Registers */
865         u64 br[6];              /* br0:
866                                  * return addr into SAL boot rendez routine */
867         u64 gr1;                /* SAL:GP */
868         u64 gr12;               /* SAL:SP */
869         u64 gr13;               /* SAL: Task Pointer */
870         u64 fpsr;
871         u64 pfs;
872         u64 rnat;
873         u64 unat;
874         u64 bspstore;
875         u64 dcr;                /* Default Control Register */
876         u64 iva;
877         u64 pta;
878         u64 itv;
879         u64 pmv;
880         u64 cmcv;
881         u64 lrr[2];
882         u64 gr[4];
883         u64 pr;                 /* Predicate registers */
884         u64 lc;                 /* Loop Count */
885         struct ia64_fpreg fp[20];
886 };
887 
888 /*
889  * Global array allocated for NR_CPUS at boot time
890  */
891 extern struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS];
892 
893 extern void ia64_jump_to_sal(struct sal_to_os_boot *);
894 #endif
895 
896 extern void ia64_sal_handler_init(void *entry_point, void *gpval);
897 
898 #define PALO_MAX_TLB_PURGES     0xFFFF
899 #define PALO_SIG        "PALO"
900 
901 struct palo_table {
902         u8  signature[4];       /* Should be "PALO" */
903         u32 length;
904         u8  minor_revision;
905         u8  major_revision;
906         u8  checksum;
907         u8  reserved1[5];
908         u16 max_tlb_purges;
909         u8  reserved2[6];
910 };
911 
912 #define NPTCG_FROM_PAL                  0
913 #define NPTCG_FROM_PALO                 1
914 #define NPTCG_FROM_KERNEL_PARAMETER     2
915 
916 #endif /* __ASSEMBLY__ */
917 
918 #endif /* _ASM_IA64_SAL_H */
919 

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