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TOMOYO Linux Cross Reference
Linux/arch/ia64/kernel/setup.c

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  1 /*
  2  * Architecture-specific setup.
  3  *
  4  * Copyright (C) 1998-2001, 2003 Hewlett-Packard Co
  5  *      David Mosberger-Tang <davidm@hpl.hp.com>
  6  *      Stephane Eranian <eranian@hpl.hp.com>
  7  * Copyright (C) 2000, Rohit Seth <rohit.seth@intel.com>
  8  * Copyright (C) 1999 VA Linux Systems
  9  * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
 10  *
 11  * 11/12/01 D.Mosberger Convert get_cpuinfo() to seq_file based show_cpuinfo().
 12  * 04/04/00 D.Mosberger renamed cpu_initialized to cpu_online_map
 13  * 03/31/00 R.Seth      cpu_initialized and current->processor fixes
 14  * 02/04/00 D.Mosberger some more get_cpuinfo fixes...
 15  * 02/01/00 R.Seth      fixed get_cpuinfo for SMP
 16  * 01/07/99 S.Eranian   added the support for command line argument
 17  * 06/24/99 W.Drummond  added boot_cpu_data.
 18  */
 19 #include <linux/config.h>
 20 #include <linux/init.h>
 21 
 22 #include <linux/acpi.h>
 23 #include <linux/bootmem.h>
 24 #include <linux/console.h>
 25 #include <linux/delay.h>
 26 #include <linux/kernel.h>
 27 #include <linux/reboot.h>
 28 #include <linux/sched.h>
 29 #include <linux/seq_file.h>
 30 #include <linux/string.h>
 31 #include <linux/threads.h>
 32 #include <linux/tty.h>
 33 #include <linux/serial.h>
 34 #include <linux/serial_core.h>
 35 #include <linux/efi.h>
 36 #include <linux/initrd.h>
 37 
 38 #include <asm/ia32.h>
 39 #include <asm/machvec.h>
 40 #include <asm/mca.h>
 41 #include <asm/meminit.h>
 42 #include <asm/page.h>
 43 #include <asm/patch.h>
 44 #include <asm/pgtable.h>
 45 #include <asm/processor.h>
 46 #include <asm/sal.h>
 47 #include <asm/sections.h>
 48 #include <asm/serial.h>
 49 #include <asm/smp.h>
 50 #include <asm/system.h>
 51 #include <asm/unistd.h>
 52 
 53 #if defined(CONFIG_SMP) && (IA64_CPU_SIZE > PAGE_SIZE)
 54 # error "struct cpuinfo_ia64 too big!"
 55 #endif
 56 
 57 #ifdef CONFIG_SMP
 58 unsigned long __per_cpu_offset[NR_CPUS];
 59 #endif
 60 
 61 DEFINE_PER_CPU(struct cpuinfo_ia64, cpu_info);
 62 DEFINE_PER_CPU(unsigned long, local_per_cpu_offset);
 63 DEFINE_PER_CPU(unsigned long, ia64_phys_stacked_size_p8);
 64 unsigned long ia64_cycles_per_usec;
 65 struct ia64_boot_param *ia64_boot_param;
 66 struct screen_info screen_info;
 67 
 68 unsigned long ia64_max_cacheline_size;
 69 unsigned long ia64_iobase;      /* virtual address for I/O accesses */
 70 struct io_space io_space[MAX_IO_SPACES];
 71 unsigned int num_io_spaces;
 72 
 73 unsigned char aux_device_present = 0xaa;        /* XXX remove this when legacy I/O is gone */
 74 
 75 /*
 76  * The merge_mask variable needs to be set to (max(iommu_page_size(iommu)) - 1).  This
 77  * mask specifies a mask of address bits that must be 0 in order for two buffers to be
 78  * mergeable by the I/O MMU (i.e., the end address of the first buffer and the start
 79  * address of the second buffer must be aligned to (merge_mask+1) in order to be
 80  * mergeable).  By default, we assume there is no I/O MMU which can merge physically
 81  * discontiguous buffers, so we set the merge_mask to ~0UL, which corresponds to a iommu
 82  * page-size of 2^64.
 83  */
 84 unsigned long ia64_max_iommu_merge_mask = ~0UL;
 85 
 86 #define COMMAND_LINE_SIZE       512
 87 
 88 char saved_command_line[COMMAND_LINE_SIZE]; /* used in proc filesystem */
 89 
 90 /*
 91  * We use a special marker for the end of memory and it uses the extra (+1) slot
 92  */
 93 struct rsvd_region rsvd_region[IA64_MAX_RSVD_REGIONS + 1];
 94 int num_rsvd_regions;
 95 
 96 
 97 /*
 98  * Filter incoming memory segments based on the primitive map created from the boot
 99  * parameters. Segments contained in the map are removed from the memory ranges. A
100  * caller-specified function is called with the memory ranges that remain after filtering.
101  * This routine does not assume the incoming segments are sorted.
102  */
103 int
104 filter_rsvd_memory (unsigned long start, unsigned long end, void *arg)
105 {
106         unsigned long range_start, range_end, prev_start;
107         void (*func)(unsigned long, unsigned long, int);
108         int i;
109 
110 #if IGNORE_PFN0
111         if (start == PAGE_OFFSET) {
112                 printk(KERN_WARNING "warning: skipping physical page 0\n");
113                 start += PAGE_SIZE;
114                 if (start >= end) return 0;
115         }
116 #endif
117         /*
118          * lowest possible address(walker uses virtual)
119          */
120         prev_start = PAGE_OFFSET;
121         func = arg;
122 
123         for (i = 0; i < num_rsvd_regions; ++i) {
124                 range_start = max(start, prev_start);
125                 range_end   = min(end, rsvd_region[i].start);
126 
127                 if (range_start < range_end)
128                         call_pernode_memory(__pa(range_start), range_end - range_start, func);
129 
130                 /* nothing more available in this segment */
131                 if (range_end == end) return 0;
132 
133                 prev_start = rsvd_region[i].end;
134         }
135         /* end of memory marker allows full processing inside loop body */
136         return 0;
137 }
138 
139 static void
140 sort_regions (struct rsvd_region *rsvd_region, int max)
141 {
142         int j;
143 
144         /* simple bubble sorting */
145         while (max--) {
146                 for (j = 0; j < max; ++j) {
147                         if (rsvd_region[j].start > rsvd_region[j+1].start) {
148                                 struct rsvd_region tmp;
149                                 tmp = rsvd_region[j];
150                                 rsvd_region[j] = rsvd_region[j + 1];
151                                 rsvd_region[j + 1] = tmp;
152                         }
153                 }
154         }
155 }
156 
157 /**
158  * reserve_memory - setup reserved memory areas
159  *
160  * Setup the reserved memory areas set aside for the boot parameters,
161  * initrd, etc.  There are currently %IA64_MAX_RSVD_REGIONS defined,
162  * see include/asm-ia64/meminit.h if you need to define more.
163  */
164 void
165 reserve_memory (void)
166 {
167         int n = 0;
168 
169         /*
170          * none of the entries in this table overlap
171          */
172         rsvd_region[n].start = (unsigned long) ia64_boot_param;
173         rsvd_region[n].end   = rsvd_region[n].start + sizeof(*ia64_boot_param);
174         n++;
175 
176         rsvd_region[n].start = (unsigned long) __va(ia64_boot_param->efi_memmap);
177         rsvd_region[n].end   = rsvd_region[n].start + ia64_boot_param->efi_memmap_size;
178         n++;
179 
180         rsvd_region[n].start = (unsigned long) __va(ia64_boot_param->command_line);
181         rsvd_region[n].end   = (rsvd_region[n].start
182                                 + strlen(__va(ia64_boot_param->command_line)) + 1);
183         n++;
184 
185         rsvd_region[n].start = (unsigned long) ia64_imva((void *)KERNEL_START);
186         rsvd_region[n].end   = (unsigned long) ia64_imva(_end);
187         n++;
188 
189 #ifdef CONFIG_BLK_DEV_INITRD
190         if (ia64_boot_param->initrd_start) {
191                 rsvd_region[n].start = (unsigned long)__va(ia64_boot_param->initrd_start);
192                 rsvd_region[n].end   = rsvd_region[n].start + ia64_boot_param->initrd_size;
193                 n++;
194         }
195 #endif
196 
197         /* end of memory marker */
198         rsvd_region[n].start = ~0UL;
199         rsvd_region[n].end   = ~0UL;
200         n++;
201 
202         num_rsvd_regions = n;
203 
204         sort_regions(rsvd_region, num_rsvd_regions);
205 }
206 
207 /**
208  * find_initrd - get initrd parameters from the boot parameter structure
209  *
210  * Grab the initrd start and end from the boot parameter struct given us by
211  * the boot loader.
212  */
213 void
214 find_initrd (void)
215 {
216 #ifdef CONFIG_BLK_DEV_INITRD
217         if (ia64_boot_param->initrd_start) {
218                 initrd_start = (unsigned long)__va(ia64_boot_param->initrd_start);
219                 initrd_end   = initrd_start+ia64_boot_param->initrd_size;
220 
221                 printk(KERN_INFO "Initial ramdisk at: 0x%lx (%lu bytes)\n",
222                        initrd_start, ia64_boot_param->initrd_size);
223         }
224 #endif
225 }
226 
227 #ifdef CONFIG_SERIAL_8250_CONSOLE
228 static void __init
229 setup_serial_legacy (void)
230 {
231         struct uart_port port;
232         unsigned int i, iobase[] = {0x3f8, 0x2f8};
233 
234         printk(KERN_INFO "Registering legacy COM ports for serial console\n");
235         memset(&port, 0, sizeof(port));
236         port.iotype = SERIAL_IO_PORT;
237         port.uartclk = BASE_BAUD * 16;
238         for (i = 0; i < ARRAY_SIZE(iobase); i++) {
239                 port.line = i;
240                 port.iobase = iobase[i];
241                 early_serial_setup(&port);
242         }
243 }
244 #endif
245 
246 void __init
247 setup_arch (char **cmdline_p)
248 {
249         extern unsigned long ia64_iobase;
250         unsigned long phys_iobase;
251 
252         unw_init();
253 
254         ia64_patch_vtop((u64) __start___vtop_patchlist, (u64) __end___vtop_patchlist);
255 
256         *cmdline_p = __va(ia64_boot_param->command_line);
257         strlcpy(saved_command_line, *cmdline_p, sizeof(saved_command_line));
258 
259         efi_init();
260 
261 #ifdef CONFIG_ACPI_BOOT
262         /* Initialize the ACPI boot-time table parser */
263         acpi_table_init();
264 # ifdef CONFIG_ACPI_NUMA
265         acpi_numa_init();
266 # endif
267 #else
268 # ifdef CONFIG_SMP
269         smp_build_cpu_map();    /* happens, e.g., with the Ski simulator */
270 # endif
271 #endif /* CONFIG_APCI_BOOT */
272 
273         find_memory();
274 
275         /* process SAL system table: */
276         ia64_sal_init(efi.sal_systab);
277 
278 #ifdef CONFIG_IA64_GENERIC
279         machvec_init(acpi_get_sysname());
280 #endif
281 
282         /*
283          *  Set `iobase' to the appropriate address in region 6 (uncached access range).
284          *
285          *  The EFI memory map is the "preferred" location to get the I/O port space base,
286          *  rather the relying on AR.KR0. This should become more clear in future SAL
287          *  specs. We'll fall back to getting it out of AR.KR0 if no appropriate entry is
288          *  found in the memory map.
289          */
290         phys_iobase = efi_get_iobase();
291         if (phys_iobase)
292                 /* set AR.KR0 since this is all we use it for anyway */
293                 ia64_set_kr(IA64_KR_IO_BASE, phys_iobase);
294         else {
295                 phys_iobase = ia64_get_kr(IA64_KR_IO_BASE);
296                 printk(KERN_INFO "No I/O port range found in EFI memory map, falling back "
297                        "to AR.KR0\n");
298                 printk(KERN_INFO "I/O port base = 0x%lx\n", phys_iobase);
299         }
300         ia64_iobase = (unsigned long) ioremap(phys_iobase, 0);
301 
302         /* setup legacy IO port space */
303         io_space[0].mmio_base = ia64_iobase;
304         io_space[0].sparse = 1;
305         num_io_spaces = 1;
306 
307 #ifdef CONFIG_SMP
308         cpu_physical_id(0) = hard_smp_processor_id();
309 #endif
310 
311         cpu_init();     /* initialize the bootstrap CPU */
312 
313 #ifdef CONFIG_ACPI_BOOT
314         acpi_boot_init();
315 #endif
316 #ifdef CONFIG_SERIAL_8250_HCDP
317         if (efi.hcdp) {
318                 void setup_serial_hcdp(void *);
319                 setup_serial_hcdp(efi.hcdp);
320         }
321 #endif
322 #ifdef CONFIG_SERIAL_8250_CONSOLE
323         /*
324          * Without HCDP, we won't discover any serial ports until the serial driver looks
325          * in the ACPI namespace.  If ACPI claims there are some legacy devices, register
326          * the legacy COM ports so serial console works earlier.  This is slightly dangerous
327          * because we don't *really* know whether there's anything there, but we hope that
328          * all new boxes will implement HCDP.
329          */
330         {
331                 extern unsigned char acpi_legacy_devices;
332                 if (!efi.hcdp && acpi_legacy_devices)
333                         setup_serial_legacy();
334         }
335 #endif
336 
337 #ifdef CONFIG_VT
338 # if defined(CONFIG_DUMMY_CONSOLE)
339         conswitchp = &dummy_con;
340 # endif
341 # if defined(CONFIG_VGA_CONSOLE)
342         /*
343          * Non-legacy systems may route legacy VGA MMIO range to system
344          * memory.  vga_con probes the MMIO hole, so memory looks like
345          * a VGA device to it.  The EFI memory map can tell us if it's
346          * memory so we can avoid this problem.
347          */
348         if (efi_mem_type(0xA0000) != EFI_CONVENTIONAL_MEMORY)
349                 conswitchp = &vga_con;
350 # endif
351 #endif
352 
353 #ifdef CONFIG_IA64_MCA
354         /* enable IA-64 Machine Check Abort Handling */
355         ia64_mca_init();
356 #endif
357 
358         platform_setup(cmdline_p);
359         paging_init();
360 }
361 
362 /*
363  * Display cpu info for all cpu's.
364  */
365 static int
366 show_cpuinfo (struct seq_file *m, void *v)
367 {
368 #ifdef CONFIG_SMP
369 #       define lpj      c->loops_per_jiffy
370 #       define cpunum   c->cpu
371 #else
372 #       define lpj      loops_per_jiffy
373 #       define cpunum   0
374 #endif
375         static struct {
376                 unsigned long mask;
377                 const char *feature_name;
378         } feature_bits[] = {
379                 { 1UL << 0, "branchlong" },
380                 { 1UL << 1, "spontaneous deferral"},
381                 { 1UL << 2, "16-byte atomic ops" }
382         };
383         char family[32], features[128], *cp, sep;
384         struct cpuinfo_ia64 *c = v;
385         unsigned long mask;
386         int i;
387 
388         mask = c->features;
389 
390         switch (c->family) {
391               case 0x07:        memcpy(family, "Itanium", 8); break;
392               case 0x1f:        memcpy(family, "Itanium 2", 10); break;
393               default:          sprintf(family, "%u", c->family); break;
394         }
395 
396         /* build the feature string: */
397         memcpy(features, " standard", 10);
398         cp = features;
399         sep = 0;
400         for (i = 0; i < (int) ARRAY_SIZE(feature_bits); ++i) {
401                 if (mask & feature_bits[i].mask) {
402                         if (sep)
403                                 *cp++ = sep;
404                         sep = ',';
405                         *cp++ = ' ';
406                         strcpy(cp, feature_bits[i].feature_name);
407                         cp += strlen(feature_bits[i].feature_name);
408                         mask &= ~feature_bits[i].mask;
409                 }
410         }
411         if (mask) {
412                 /* print unknown features as a hex value: */
413                 if (sep)
414                         *cp++ = sep;
415                 sprintf(cp, " 0x%lx", mask);
416         }
417 
418         seq_printf(m,
419                    "processor  : %d\n"
420                    "vendor     : %s\n"
421                    "arch       : IA-64\n"
422                    "family     : %s\n"
423                    "model      : %u\n"
424                    "revision   : %u\n"
425                    "archrev    : %u\n"
426                    "features   :%s\n"   /* don't change this---it _is_ right! */
427                    "cpu number : %lu\n"
428                    "cpu regs   : %u\n"
429                    "cpu MHz    : %lu.%06lu\n"
430                    "itc MHz    : %lu.%06lu\n"
431                    "BogoMIPS   : %lu.%02lu\n\n",
432                    cpunum, c->vendor, family, c->model, c->revision, c->archrev,
433                    features, c->ppn, c->number,
434                    c->proc_freq / 1000000, c->proc_freq % 1000000,
435                    c->itc_freq / 1000000, c->itc_freq % 1000000,
436                    lpj*HZ/500000, (lpj*HZ/5000) % 100);
437         return 0;
438 }
439 
440 static void *
441 c_start (struct seq_file *m, loff_t *pos)
442 {
443 #ifdef CONFIG_SMP
444         while (*pos < NR_CPUS && !cpu_isset(*pos, cpu_online_map))
445                 ++*pos;
446 #endif
447         return *pos < NR_CPUS ? cpu_data(*pos) : NULL;
448 }
449 
450 static void *
451 c_next (struct seq_file *m, void *v, loff_t *pos)
452 {
453         ++*pos;
454         return c_start(m, pos);
455 }
456 
457 static void
458 c_stop (struct seq_file *m, void *v)
459 {
460 }
461 
462 struct seq_operations cpuinfo_op = {
463         .start =        c_start,
464         .next =         c_next,
465         .stop =         c_stop,
466         .show =         show_cpuinfo
467 };
468 
469 void
470 identify_cpu (struct cpuinfo_ia64 *c)
471 {
472         union {
473                 unsigned long bits[5];
474                 struct {
475                         /* id 0 & 1: */
476                         char vendor[16];
477 
478                         /* id 2 */
479                         u64 ppn;                /* processor serial number */
480 
481                         /* id 3: */
482                         unsigned number         :  8;
483                         unsigned revision       :  8;
484                         unsigned model          :  8;
485                         unsigned family         :  8;
486                         unsigned archrev        :  8;
487                         unsigned reserved       : 24;
488 
489                         /* id 4: */
490                         u64 features;
491                 } field;
492         } cpuid;
493         pal_vm_info_1_u_t vm1;
494         pal_vm_info_2_u_t vm2;
495         pal_status_t status;
496         unsigned long impl_va_msb = 50, phys_addr_size = 44;    /* Itanium defaults */
497         int i;
498 
499         for (i = 0; i < 5; ++i)
500                 cpuid.bits[i] = ia64_get_cpuid(i);
501 
502         memcpy(c->vendor, cpuid.field.vendor, 16);
503 #ifdef CONFIG_SMP
504         c->cpu = smp_processor_id();
505 #endif
506         c->ppn = cpuid.field.ppn;
507         c->number = cpuid.field.number;
508         c->revision = cpuid.field.revision;
509         c->model = cpuid.field.model;
510         c->family = cpuid.field.family;
511         c->archrev = cpuid.field.archrev;
512         c->features = cpuid.field.features;
513 
514         status = ia64_pal_vm_summary(&vm1, &vm2);
515         if (status == PAL_STATUS_SUCCESS) {
516                 impl_va_msb = vm2.pal_vm_info_2_s.impl_va_msb;
517                 phys_addr_size = vm1.pal_vm_info_1_s.phys_add_size;
518         }
519         printk(KERN_INFO "CPU %d: %lu virtual and %lu physical address bits\n",
520                smp_processor_id(), impl_va_msb + 1, phys_addr_size);
521         c->unimpl_va_mask = ~((7L<<61) | ((1L << (impl_va_msb + 1)) - 1));
522         c->unimpl_pa_mask = ~((1L<<63) | ((1L << phys_addr_size) - 1));
523 }
524 
525 void
526 setup_per_cpu_areas (void)
527 {
528         /* start_kernel() requires this... */
529 }
530 
531 static void
532 get_max_cacheline_size (void)
533 {
534         unsigned long line_size, max = 1;
535         u64 l, levels, unique_caches;
536         pal_cache_config_info_t cci;
537         s64 status;
538 
539         status = ia64_pal_cache_summary(&levels, &unique_caches);
540         if (status != 0) {
541                 printk(KERN_ERR "%s: ia64_pal_cache_summary() failed (status=%ld)\n",
542                        __FUNCTION__, status);
543                 max = SMP_CACHE_BYTES;
544                 goto out;
545         }
546 
547         for (l = 0; l < levels; ++l) {
548                 status = ia64_pal_cache_config_info(l, /* cache_type (data_or_unified)= */ 2,
549                                                     &cci);
550                 if (status != 0) {
551                         printk(KERN_ERR
552                                "%s: ia64_pal_cache_config_info(l=%lu) failed (status=%ld)\n",
553                                __FUNCTION__, l, status);
554                         max = SMP_CACHE_BYTES;
555                 }
556                 line_size = 1 << cci.pcci_line_size;
557                 if (line_size > max)
558                         max = line_size;
559         }
560   out:
561         if (max > ia64_max_cacheline_size)
562                 ia64_max_cacheline_size = max;
563 }
564 
565 /*
566  * cpu_init() initializes state that is per-CPU.  This function acts
567  * as a 'CPU state barrier', nothing should get across.
568  */
569 void
570 cpu_init (void)
571 {
572         extern void __init ia64_mmu_init (void *);
573         unsigned long num_phys_stacked;
574         pal_vm_info_2_u_t vmi;
575         unsigned int max_ctx;
576         struct cpuinfo_ia64 *cpu_info;
577         void *cpu_data;
578 
579         cpu_data = per_cpu_init();
580 
581         get_max_cacheline_size();
582 
583         /*
584          * We can't pass "local_cpu_data" to identify_cpu() because we haven't called
585          * ia64_mmu_init() yet.  And we can't call ia64_mmu_init() first because it
586          * depends on the data returned by identify_cpu().  We break the dependency by
587          * accessing cpu_data() through the canonical per-CPU address.
588          */
589         cpu_info = cpu_data + ((char *) &__ia64_per_cpu_var(cpu_info) - __per_cpu_start);
590         identify_cpu(cpu_info);
591 
592 #ifdef CONFIG_MCKINLEY
593         {
594 #               define FEATURE_SET 16
595                 struct ia64_pal_retval iprv;
596 
597                 if (cpu_info->family == 0x1f) {
598                         PAL_CALL_PHYS(iprv, PAL_PROC_GET_FEATURES, 0, FEATURE_SET, 0);
599                         if ((iprv.status == 0) && (iprv.v0 & 0x80) && (iprv.v2 & 0x80))
600                                 PAL_CALL_PHYS(iprv, PAL_PROC_SET_FEATURES,
601                                               (iprv.v1 | 0x80), FEATURE_SET, 0);
602                 }
603         }
604 #endif
605 
606         /* Clear the stack memory reserved for pt_regs: */
607         memset(ia64_task_regs(current), 0, sizeof(struct pt_regs));
608 
609         ia64_set_kr(IA64_KR_FPU_OWNER, 0);
610 
611         /*
612          * Initialize default control register to defer all speculative faults.  The
613          * kernel MUST NOT depend on a particular setting of these bits (in other words,
614          * the kernel must have recovery code for all speculative accesses).  Turn on
615          * dcr.lc as per recommendation by the architecture team.  Most IA-32 apps
616          * shouldn't be affected by this (moral: keep your ia32 locks aligned and you'll
617          * be fine).
618          */
619         ia64_setreg(_IA64_REG_CR_DCR,  (  IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX | IA64_DCR_DR
620                                         | IA64_DCR_DA | IA64_DCR_DD | IA64_DCR_LC));
621         atomic_inc(&init_mm.mm_count);
622         current->active_mm = &init_mm;
623         if (current->mm)
624                 BUG();
625 
626         ia64_mmu_init(ia64_imva(cpu_data));
627 
628 #ifdef CONFIG_IA32_SUPPORT
629         ia32_cpu_init();
630 #endif
631 
632         /* disable all local interrupt sources: */
633         ia64_set_itv(1 << 16);
634         ia64_set_lrr0(1 << 16);
635         ia64_set_lrr1(1 << 16);
636         ia64_setreg(_IA64_REG_CR_PMV, 1 << 16);
637         ia64_setreg(_IA64_REG_CR_CMCV, 1 << 16);
638 
639         /* clear TPR & XTP to enable all interrupt classes: */
640         ia64_setreg(_IA64_REG_CR_TPR, 0);
641 #ifdef CONFIG_SMP
642         normal_xtp();
643 #endif
644 
645         /* set ia64_ctx.max_rid to the maximum RID that is supported by all CPUs: */
646         if (ia64_pal_vm_summary(NULL, &vmi) == 0)
647                 max_ctx = (1U << (vmi.pal_vm_info_2_s.rid_size - 3)) - 1;
648         else {
649                 printk(KERN_WARNING "cpu_init: PAL VM summary failed, assuming 18 RID bits\n");
650                 max_ctx = (1U << 15) - 1;       /* use architected minimum */
651         }
652         while (max_ctx < ia64_ctx.max_ctx) {
653                 unsigned int old = ia64_ctx.max_ctx;
654                 if (cmpxchg(&ia64_ctx.max_ctx, old, max_ctx) == old)
655                         break;
656         }
657 
658         if (ia64_pal_rse_info(&num_phys_stacked, 0) != 0) {
659                 printk(KERN_WARNING "cpu_init: PAL RSE info failed; assuming 96 physical "
660                        "stacked regs\n");
661                 num_phys_stacked = 96;
662         }
663         /* size of physical stacked register partition plus 8 bytes: */
664         __get_cpu_var(ia64_phys_stacked_size_p8) = num_phys_stacked*8 + 8;
665         platform_cpu_init();
666 }
667 
668 void
669 check_bugs (void)
670 {
671         ia64_patch_mckinley_e9((unsigned long) __start___mckinley_e9_bundles,
672                                (unsigned long) __end___mckinley_e9_bundles);
673 }
674 

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