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TOMOYO Linux Cross Reference
Linux/arch/m68k/apollo/config.c

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  1 // SPDX-License-Identifier: GPL-2.0
  2 #include <linux/init.h>
  3 #include <linux/types.h>
  4 #include <linux/kernel.h>
  5 #include <linux/mm.h>
  6 #include <linux/tty.h>
  7 #include <linux/console.h>
  8 #include <linux/rtc.h>
  9 #include <linux/vt_kern.h>
 10 #include <linux/interrupt.h>
 11 
 12 #include <asm/setup.h>
 13 #include <asm/bootinfo.h>
 14 #include <asm/bootinfo-apollo.h>
 15 #include <asm/byteorder.h>
 16 #include <asm/pgtable.h>
 17 #include <asm/apollohw.h>
 18 #include <asm/irq.h>
 19 #include <asm/machdep.h>
 20 
 21 u_long sio01_physaddr;
 22 u_long sio23_physaddr;
 23 u_long rtc_physaddr;
 24 u_long pica_physaddr;
 25 u_long picb_physaddr;
 26 u_long cpuctrl_physaddr;
 27 u_long timer_physaddr;
 28 u_long apollo_model;
 29 
 30 extern void dn_sched_init(irq_handler_t handler);
 31 extern void dn_init_IRQ(void);
 32 extern int dn_dummy_hwclk(int, struct rtc_time *);
 33 extern void dn_dummy_reset(void);
 34 #ifdef CONFIG_HEARTBEAT
 35 static void dn_heartbeat(int on);
 36 #endif
 37 static irqreturn_t dn_timer_int(int irq,void *);
 38 static void dn_get_model(char *model);
 39 static const char *apollo_models[] = {
 40         [APOLLO_DN3000-APOLLO_DN3000] = "DN3000 (Otter)",
 41         [APOLLO_DN3010-APOLLO_DN3000] = "DN3010 (Otter)",
 42         [APOLLO_DN3500-APOLLO_DN3000] = "DN3500 (Cougar II)",
 43         [APOLLO_DN4000-APOLLO_DN3000] = "DN4000 (Mink)",
 44         [APOLLO_DN4500-APOLLO_DN3000] = "DN4500 (Roadrunner)"
 45 };
 46 
 47 int __init apollo_parse_bootinfo(const struct bi_record *record)
 48 {
 49         int unknown = 0;
 50         const void *data = record->data;
 51 
 52         switch (be16_to_cpu(record->tag)) {
 53         case BI_APOLLO_MODEL:
 54                 apollo_model = be32_to_cpup(data);
 55                 break;
 56 
 57         default:
 58                  unknown=1;
 59         }
 60 
 61         return unknown;
 62 }
 63 
 64 static void __init dn_setup_model(void)
 65 {
 66         pr_info("Apollo hardware found: [%s]\n",
 67                 apollo_models[apollo_model - APOLLO_DN3000]);
 68 
 69         switch(apollo_model) {
 70                 case APOLLO_UNKNOWN:
 71                         panic("Unknown apollo model");
 72                         break;
 73                 case APOLLO_DN3000:
 74                 case APOLLO_DN3010:
 75                         sio01_physaddr=SAU8_SIO01_PHYSADDR;
 76                         rtc_physaddr=SAU8_RTC_PHYSADDR;
 77                         pica_physaddr=SAU8_PICA;
 78                         picb_physaddr=SAU8_PICB;
 79                         cpuctrl_physaddr=SAU8_CPUCTRL;
 80                         timer_physaddr=SAU8_TIMER;
 81                         break;
 82                 case APOLLO_DN4000:
 83                         sio01_physaddr=SAU7_SIO01_PHYSADDR;
 84                         sio23_physaddr=SAU7_SIO23_PHYSADDR;
 85                         rtc_physaddr=SAU7_RTC_PHYSADDR;
 86                         pica_physaddr=SAU7_PICA;
 87                         picb_physaddr=SAU7_PICB;
 88                         cpuctrl_physaddr=SAU7_CPUCTRL;
 89                         timer_physaddr=SAU7_TIMER;
 90                         break;
 91                 case APOLLO_DN4500:
 92                         panic("Apollo model not yet supported");
 93                         break;
 94                 case APOLLO_DN3500:
 95                         sio01_physaddr=SAU7_SIO01_PHYSADDR;
 96                         sio23_physaddr=SAU7_SIO23_PHYSADDR;
 97                         rtc_physaddr=SAU7_RTC_PHYSADDR;
 98                         pica_physaddr=SAU7_PICA;
 99                         picb_physaddr=SAU7_PICB;
100                         cpuctrl_physaddr=SAU7_CPUCTRL;
101                         timer_physaddr=SAU7_TIMER;
102                         break;
103                 default:
104                         panic("Undefined apollo model");
105                         break;
106         }
107 
108 
109 }
110 
111 int dn_serial_console_wait_key(struct console *co) {
112 
113         while(!(sio01.srb_csrb & 1))
114                 barrier();
115         return sio01.rhrb_thrb;
116 }
117 
118 void dn_serial_console_write (struct console *co, const char *str,unsigned int count)
119 {
120    while(count--) {
121         if (*str == '\n') {
122         sio01.rhrb_thrb = (unsigned char)'\r';
123         while (!(sio01.srb_csrb & 0x4))
124                 ;
125         }
126     sio01.rhrb_thrb = (unsigned char)*str++;
127     while (!(sio01.srb_csrb & 0x4))
128             ;
129   }
130 }
131 
132 void dn_serial_print (const char *str)
133 {
134     while (*str) {
135         if (*str == '\n') {
136             sio01.rhrb_thrb = (unsigned char)'\r';
137             while (!(sio01.srb_csrb & 0x4))
138                 ;
139         }
140         sio01.rhrb_thrb = (unsigned char)*str++;
141         while (!(sio01.srb_csrb & 0x4))
142             ;
143     }
144 }
145 
146 void __init config_apollo(void)
147 {
148         int i;
149 
150         dn_setup_model();
151 
152         mach_sched_init=dn_sched_init; /* */
153         mach_init_IRQ=dn_init_IRQ;
154         mach_max_dma_address = 0xffffffff;
155         mach_hwclk           = dn_dummy_hwclk; /* */
156         mach_reset           = dn_dummy_reset;  /* */
157 #ifdef CONFIG_HEARTBEAT
158         mach_heartbeat = dn_heartbeat;
159 #endif
160         mach_get_model       = dn_get_model;
161 
162         cpuctrl=0xaa00;
163 
164         /* clear DMA translation table */
165         for(i=0;i<0x400;i++)
166                 addr_xlat_map[i]=0;
167 
168 }
169 
170 irqreturn_t dn_timer_int(int irq, void *dev_id)
171 {
172         irq_handler_t timer_handler = dev_id;
173 
174         volatile unsigned char x;
175 
176         timer_handler(irq, dev_id);
177 
178         x = *(volatile unsigned char *)(apollo_timer + 3);
179         x = *(volatile unsigned char *)(apollo_timer + 5);
180 
181         return IRQ_HANDLED;
182 }
183 
184 void dn_sched_init(irq_handler_t timer_routine)
185 {
186         /* program timer 1 */
187         *(volatile unsigned char *)(apollo_timer + 3) = 0x01;
188         *(volatile unsigned char *)(apollo_timer + 1) = 0x40;
189         *(volatile unsigned char *)(apollo_timer + 5) = 0x09;
190         *(volatile unsigned char *)(apollo_timer + 7) = 0xc4;
191 
192         /* enable IRQ of PIC B */
193         *(volatile unsigned char *)(pica+1)&=(~8);
194 
195 #if 0
196         pr_info("*(0x10803) %02x\n",
197                 *(volatile unsigned char *)(apollo_timer + 0x3));
198         pr_info("*(0x10803) %02x\n",
199                 *(volatile unsigned char *)(apollo_timer + 0x3));
200 #endif
201 
202         if (request_irq(IRQ_APOLLO, dn_timer_int, 0, "time", timer_routine))
203                 pr_err("Couldn't register timer interrupt\n");
204 }
205 
206 int dn_dummy_hwclk(int op, struct rtc_time *t) {
207 
208 
209   if(!op) { /* read */
210     t->tm_sec=rtc->second;
211     t->tm_min=rtc->minute;
212     t->tm_hour=rtc->hours;
213     t->tm_mday=rtc->day_of_month;
214     t->tm_wday=rtc->day_of_week;
215     t->tm_mon = rtc->month - 1;
216     t->tm_year=rtc->year;
217     if (t->tm_year < 70)
218         t->tm_year += 100;
219   } else {
220     rtc->second=t->tm_sec;
221     rtc->minute=t->tm_min;
222     rtc->hours=t->tm_hour;
223     rtc->day_of_month=t->tm_mday;
224     if(t->tm_wday!=-1)
225       rtc->day_of_week=t->tm_wday;
226     rtc->month = t->tm_mon + 1;
227     rtc->year = t->tm_year % 100;
228   }
229 
230   return 0;
231 
232 }
233 
234 void dn_dummy_reset(void) {
235 
236   dn_serial_print("The end !\n");
237 
238   for(;;);
239 
240 }
241 
242 void dn_dummy_waitbut(void) {
243 
244   dn_serial_print("waitbut\n");
245 
246 }
247 
248 static void dn_get_model(char *model)
249 {
250     strcpy(model, "Apollo ");
251     if (apollo_model >= APOLLO_DN3000 && apollo_model <= APOLLO_DN4500)
252         strcat(model, apollo_models[apollo_model - APOLLO_DN3000]);
253 }
254 
255 #ifdef CONFIG_HEARTBEAT
256 static int dn_cpuctrl=0xff00;
257 
258 static void dn_heartbeat(int on) {
259 
260         if(on) {
261                 dn_cpuctrl&=~0x100;
262                 cpuctrl=dn_cpuctrl;
263         }
264         else {
265                 dn_cpuctrl&=~0x100;
266                 dn_cpuctrl|=0x100;
267                 cpuctrl=dn_cpuctrl;
268         }
269 }
270 #endif
271 
272 

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