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TOMOYO Linux Cross Reference
Linux/arch/m68k/mac/iop.c

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  1 /*
  2  * I/O Processor (IOP) management
  3  * Written and (C) 1999 by Joshua M. Thompson (funaho@jurai.org)
  4  *
  5  * Redistribution and use in source and binary forms, with or without
  6  * modification, are permitted provided that the following conditions
  7  * are met:
  8  * 1. Redistributions of source code must retain the above copyright
  9  *    notice and this list of conditions.
 10  * 2. Redistributions in binary form must reproduce the above copyright
 11  *    notice and this list of conditions in the documentation and/or other
 12  *    materials provided with the distribution.
 13  */
 14 
 15 /*
 16  * The IOP chips are used in the IIfx and some Quadras (900, 950) to manage
 17  * serial and ADB. They are actually a 6502 processor and some glue logic.
 18  *
 19  * 990429 (jmt) - Initial implementation, just enough to knock the SCC IOP
 20  *                into compatible mode so nobody has to fiddle with the
 21  *                Serial Switch control panel anymore.
 22  * 990603 (jmt) - Added code to grab the correct ISM IOP interrupt for OSS
 23  *                and non-OSS machines (at least I hope it's correct on a
 24  *                non-OSS machine -- someone with a Q900 or Q950 needs to
 25  *                check this.)
 26  * 990605 (jmt) - Rearranged things a bit wrt IOP detection; iop_present is
 27  *                gone, IOP base addresses are now in an array and the
 28  *                globally-visible functions take an IOP number instead of an
 29  *                an actual base address.
 30  * 990610 (jmt) - Finished the message passing framework and it seems to work.
 31  *                Sending _definitely_ works; my adb-bus.c mods can send
 32  *                messages and receive the MSG_COMPLETED status back from the
 33  *                IOP. The trick now is figuring out the message formats.
 34  * 990611 (jmt) - More cleanups. Fixed problem where unclaimed messages on a
 35  *                receive channel were never properly acknowledged. Bracketed
 36  *                the remaining debug printk's with #ifdef's and disabled
 37  *                debugging. I can now type on the console.
 38  * 990612 (jmt) - Copyright notice added. Reworked the way replies are handled.
 39  *                It turns out that replies are placed back in the send buffer
 40  *                for that channel; messages on the receive channels are always
 41  *                unsolicited messages from the IOP (and our replies to them
 42  *                should go back in the receive channel.) Also added tracking
 43  *                of device names to the listener functions ala the interrupt
 44  *                handlers.
 45  * 990729 (jmt) - Added passing of pt_regs structure to IOP handlers. This is
 46  *                used by the new unified ADB driver.
 47  *
 48  * TODO:
 49  *
 50  * o Something should be periodically checking iop_alive() to make sure the
 51  *   IOP hasn't died.
 52  * o Some of the IOP manager routines need better error checking and
 53  *   return codes. Nothing major, just prettying up.
 54  */
 55 
 56 /*
 57  * -----------------------
 58  * IOP Message Passing 101
 59  * -----------------------
 60  *
 61  * The host talks to the IOPs using a rather simple message-passing scheme via
 62  * a shared memory area in the IOP RAM. Each IOP has seven "channels"; each
 63  * channel is conneced to a specific software driver on the IOP. For example
 64  * on the SCC IOP there is one channel for each serial port. Each channel has
 65  * an incoming and and outgoing message queue with a depth of one.
 66  *
 67  * A message is 32 bytes plus a state byte for the channel (MSG_IDLE, MSG_NEW,
 68  * MSG_RCVD, MSG_COMPLETE). To send a message you copy the message into the
 69  * buffer, set the state to MSG_NEW and signal the IOP by setting the IRQ flag
 70  * in the IOP control to 1. The IOP will move the state to MSG_RCVD when it
 71  * receives the message and then to MSG_COMPLETE when the message processing
 72  * has completed. It is the host's responsibility at that point to read the
 73  * reply back out of the send channel buffer and reset the channel state back
 74  * to MSG_IDLE.
 75  *
 76  * To receive message from the IOP the same procedure is used except the roles
 77  * are reversed. That is, the IOP puts message in the channel with a state of
 78  * MSG_NEW, and the host receives the message and move its state to MSG_RCVD
 79  * and then to MSG_COMPLETE when processing is completed and the reply (if any)
 80  * has been placed back in the receive channel. The IOP will then reset the
 81  * channel state to MSG_IDLE.
 82  *
 83  * Two sets of host interrupts are provided, INT0 and INT1. Both appear on one
 84  * interrupt level; they are distinguished by a pair of bits in the IOP status
 85  * register. The IOP will raise INT0 when one or more messages in the send
 86  * channels have gone to the MSG_COMPLETE state and it will raise INT1 when one
 87  * or more messages on the receive channels have gone to the MSG_NEW state.
 88  *
 89  * Since each channel handles only one message we have to implement a small
 90  * interrupt-driven queue on our end. Messages to be sent are placed on the
 91  * queue for sending and contain a pointer to an optional callback function.
 92  * The handler for a message is called when the message state goes to
 93  * MSG_COMPLETE.
 94  *
 95  * For receiving message we maintain a list of handler functions to call when
 96  * a message is received on that IOP/channel combination. The handlers are
 97  * called much like an interrupt handler and are passed a copy of the message
 98  * from the IOP. The message state will be in MSG_RCVD while the handler runs;
 99  * it is the handler's responsibility to call iop_complete_message() when
100  * finished; this function moves the message state to MSG_COMPLETE and signals
101  * the IOP. This two-step process is provided to allow the handler to defer
102  * message processing to a bottom-half handler if the processing will take
103  * a significant amount of time (handlers are called at interrupt time so they
104  * should execute quickly.)
105  */
106 
107 #include <linux/types.h>
108 #include <linux/kernel.h>
109 #include <linux/mm.h>
110 #include <linux/delay.h>
111 #include <linux/init.h>
112 #include <linux/interrupt.h>
113 
114 #include <asm/bootinfo.h>
115 #include <asm/macintosh.h>
116 #include <asm/macints.h>
117 #include <asm/mac_iop.h>
118 
119 /*#define DEBUG_IOP*/
120 
121 /* Set to non-zero if the IOPs are present. Set by iop_init() */
122 
123 int iop_scc_present,iop_ism_present;
124 
125 /* structure for tracking channel listeners */
126 
127 struct listener {
128         const char *devname;
129         void (*handler)(struct iop_msg *);
130 };
131 
132 /*
133  * IOP structures for the two IOPs
134  *
135  * The SCC IOP controls both serial ports (A and B) as its two functions.
136  * The ISM IOP controls the SWIM (floppy drive) and ADB.
137  */
138 
139 static volatile struct mac_iop *iop_base[NUM_IOPS];
140 
141 /*
142  * IOP message queues
143  */
144 
145 static struct iop_msg iop_msg_pool[NUM_IOP_MSGS];
146 static struct iop_msg *iop_send_queue[NUM_IOPS][NUM_IOP_CHAN];
147 static struct listener iop_listeners[NUM_IOPS][NUM_IOP_CHAN];
148 
149 irqreturn_t iop_ism_irq(int, void *);
150 
151 /*
152  * Private access functions
153  */
154 
155 static __inline__ void iop_loadaddr(volatile struct mac_iop *iop, __u16 addr)
156 {
157         iop->ram_addr_lo = addr;
158         iop->ram_addr_hi = addr >> 8;
159 }
160 
161 static __inline__ __u8 iop_readb(volatile struct mac_iop *iop, __u16 addr)
162 {
163         iop->ram_addr_lo = addr;
164         iop->ram_addr_hi = addr >> 8;
165         return iop->ram_data;
166 }
167 
168 static __inline__ void iop_writeb(volatile struct mac_iop *iop, __u16 addr, __u8 data)
169 {
170         iop->ram_addr_lo = addr;
171         iop->ram_addr_hi = addr >> 8;
172         iop->ram_data = data;
173 }
174 
175 static __inline__ void iop_stop(volatile struct mac_iop *iop)
176 {
177         iop->status_ctrl &= ~IOP_RUN;
178 }
179 
180 static __inline__ void iop_start(volatile struct mac_iop *iop)
181 {
182         iop->status_ctrl = IOP_RUN | IOP_AUTOINC;
183 }
184 
185 static __inline__ void iop_bypass(volatile struct mac_iop *iop)
186 {
187         iop->status_ctrl |= IOP_BYPASS;
188 }
189 
190 static __inline__ void iop_interrupt(volatile struct mac_iop *iop)
191 {
192         iop->status_ctrl |= IOP_IRQ;
193 }
194 
195 static int iop_alive(volatile struct mac_iop *iop)
196 {
197         int retval;
198 
199         retval = (iop_readb(iop, IOP_ADDR_ALIVE) == 0xFF);
200         iop_writeb(iop, IOP_ADDR_ALIVE, 0);
201         return retval;
202 }
203 
204 static struct iop_msg *iop_alloc_msg(void)
205 {
206         int i;
207         unsigned long flags;
208 
209         local_irq_save(flags);
210 
211         for (i = 0 ; i < NUM_IOP_MSGS ; i++) {
212                 if (iop_msg_pool[i].status == IOP_MSGSTATUS_UNUSED) {
213                         iop_msg_pool[i].status = IOP_MSGSTATUS_WAITING;
214                         local_irq_restore(flags);
215                         return &iop_msg_pool[i];
216                 }
217         }
218 
219         local_irq_restore(flags);
220         return NULL;
221 }
222 
223 static void iop_free_msg(struct iop_msg *msg)
224 {
225         msg->status = IOP_MSGSTATUS_UNUSED;
226 }
227 
228 /*
229  * This is called by the startup code before anything else. Its purpose
230  * is to find and initialize the IOPs early in the boot sequence, so that
231  * the serial IOP can be placed into bypass mode _before_ we try to
232  * initialize the serial console.
233  */
234 
235 void __init iop_preinit(void)
236 {
237         if (macintosh_config->scc_type == MAC_SCC_IOP) {
238                 if (macintosh_config->ident == MAC_MODEL_IIFX) {
239                         iop_base[IOP_NUM_SCC] = (struct mac_iop *) SCC_IOP_BASE_IIFX;
240                 } else {
241                         iop_base[IOP_NUM_SCC] = (struct mac_iop *) SCC_IOP_BASE_QUADRA;
242                 }
243                 iop_base[IOP_NUM_SCC]->status_ctrl = 0x87;
244                 iop_scc_present = 1;
245         } else {
246                 iop_base[IOP_NUM_SCC] = NULL;
247                 iop_scc_present = 0;
248         }
249         if (macintosh_config->adb_type == MAC_ADB_IOP) {
250                 if (macintosh_config->ident == MAC_MODEL_IIFX) {
251                         iop_base[IOP_NUM_ISM] = (struct mac_iop *) ISM_IOP_BASE_IIFX;
252                 } else {
253                         iop_base[IOP_NUM_ISM] = (struct mac_iop *) ISM_IOP_BASE_QUADRA;
254                 }
255                 iop_base[IOP_NUM_ISM]->status_ctrl = 0;
256                 iop_ism_present = 1;
257         } else {
258                 iop_base[IOP_NUM_ISM] = NULL;
259                 iop_ism_present = 0;
260         }
261 }
262 
263 /*
264  * Initialize the IOPs, if present.
265  */
266 
267 void __init iop_init(void)
268 {
269         int i;
270 
271         if (iop_scc_present) {
272                 printk("IOP: detected SCC IOP at %p\n", iop_base[IOP_NUM_SCC]);
273         }
274         if (iop_ism_present) {
275                 printk("IOP: detected ISM IOP at %p\n", iop_base[IOP_NUM_ISM]);
276                 iop_start(iop_base[IOP_NUM_ISM]);
277                 iop_alive(iop_base[IOP_NUM_ISM]); /* clears the alive flag */
278         }
279 
280         /* Make the whole pool available and empty the queues */
281 
282         for (i = 0 ; i < NUM_IOP_MSGS ; i++) {
283                 iop_msg_pool[i].status = IOP_MSGSTATUS_UNUSED;
284         }
285 
286         for (i = 0 ; i < NUM_IOP_CHAN ; i++) {
287                 iop_send_queue[IOP_NUM_SCC][i] = NULL;
288                 iop_send_queue[IOP_NUM_ISM][i] = NULL;
289                 iop_listeners[IOP_NUM_SCC][i].devname = NULL;
290                 iop_listeners[IOP_NUM_SCC][i].handler = NULL;
291                 iop_listeners[IOP_NUM_ISM][i].devname = NULL;
292                 iop_listeners[IOP_NUM_ISM][i].handler = NULL;
293         }
294 }
295 
296 /*
297  * Register the interrupt handler for the IOPs.
298  * TODO: might be wrong for non-OSS machines. Anyone?
299  */
300 
301 void __init iop_register_interrupts(void)
302 {
303         if (iop_ism_present) {
304                 if (macintosh_config->ident == MAC_MODEL_IIFX) {
305                         if (request_irq(IRQ_MAC_ADB, iop_ism_irq, 0,
306                                         "ISM IOP", (void *)IOP_NUM_ISM))
307                                 pr_err("Couldn't register ISM IOP interrupt\n");
308                 } else {
309                         if (request_irq(IRQ_VIA2_0, iop_ism_irq, 0, "ISM IOP",
310                                         (void *)IOP_NUM_ISM))
311                                 pr_err("Couldn't register ISM IOP interrupt\n");
312                 }
313                 if (!iop_alive(iop_base[IOP_NUM_ISM])) {
314                         printk("IOP: oh my god, they killed the ISM IOP!\n");
315                 } else {
316                         printk("IOP: the ISM IOP seems to be alive.\n");
317                 }
318         }
319 }
320 
321 /*
322  * Register or unregister a listener for a specific IOP and channel
323  *
324  * If the handler pointer is NULL the current listener (if any) is
325  * unregistered. Otherwise the new listener is registered provided
326  * there is no existing listener registered.
327  */
328 
329 int iop_listen(uint iop_num, uint chan,
330                 void (*handler)(struct iop_msg *),
331                 const char *devname)
332 {
333         if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return -EINVAL;
334         if (chan >= NUM_IOP_CHAN) return -EINVAL;
335         if (iop_listeners[iop_num][chan].handler && handler) return -EINVAL;
336         iop_listeners[iop_num][chan].devname = devname;
337         iop_listeners[iop_num][chan].handler = handler;
338         return 0;
339 }
340 
341 /*
342  * Complete reception of a message, which just means copying the reply
343  * into the buffer, setting the channel state to MSG_COMPLETE and
344  * notifying the IOP.
345  */
346 
347 void iop_complete_message(struct iop_msg *msg)
348 {
349         int iop_num = msg->iop_num;
350         int chan = msg->channel;
351         int i,offset;
352 
353 #ifdef DEBUG_IOP
354         printk("iop_complete(%p): iop %d chan %d\n", msg, msg->iop_num, msg->channel);
355 #endif
356 
357         offset = IOP_ADDR_RECV_MSG + (msg->channel * IOP_MSG_LEN);
358 
359         for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
360                 iop_writeb(iop_base[iop_num], offset, msg->reply[i]);
361         }
362 
363         iop_writeb(iop_base[iop_num],
364                    IOP_ADDR_RECV_STATE + chan, IOP_MSG_COMPLETE);
365         iop_interrupt(iop_base[msg->iop_num]);
366 
367         iop_free_msg(msg);
368 }
369 
370 /*
371  * Actually put a message into a send channel buffer
372  */
373 
374 static void iop_do_send(struct iop_msg *msg)
375 {
376         volatile struct mac_iop *iop = iop_base[msg->iop_num];
377         int i,offset;
378 
379         offset = IOP_ADDR_SEND_MSG + (msg->channel * IOP_MSG_LEN);
380 
381         for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
382                 iop_writeb(iop, offset, msg->message[i]);
383         }
384 
385         iop_writeb(iop, IOP_ADDR_SEND_STATE + msg->channel, IOP_MSG_NEW);
386 
387         iop_interrupt(iop);
388 }
389 
390 /*
391  * Handle sending a message on a channel that
392  * has gone into the IOP_MSG_COMPLETE state.
393  */
394 
395 static void iop_handle_send(uint iop_num, uint chan)
396 {
397         volatile struct mac_iop *iop = iop_base[iop_num];
398         struct iop_msg *msg,*msg2;
399         int i,offset;
400 
401 #ifdef DEBUG_IOP
402         printk("iop_handle_send: iop %d channel %d\n", iop_num, chan);
403 #endif
404 
405         iop_writeb(iop, IOP_ADDR_SEND_STATE + chan, IOP_MSG_IDLE);
406 
407         if (!(msg = iop_send_queue[iop_num][chan])) return;
408 
409         msg->status = IOP_MSGSTATUS_COMPLETE;
410         offset = IOP_ADDR_SEND_MSG + (chan * IOP_MSG_LEN);
411         for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
412                 msg->reply[i] = iop_readb(iop, offset);
413         }
414         if (msg->handler) (*msg->handler)(msg);
415         msg2 = msg;
416         msg = msg->next;
417         iop_free_msg(msg2);
418 
419         iop_send_queue[iop_num][chan] = msg;
420         if (msg) iop_do_send(msg);
421 }
422 
423 /*
424  * Handle reception of a message on a channel that has
425  * gone into the IOP_MSG_NEW state.
426  */
427 
428 static void iop_handle_recv(uint iop_num, uint chan)
429 {
430         volatile struct mac_iop *iop = iop_base[iop_num];
431         int i,offset;
432         struct iop_msg *msg;
433 
434 #ifdef DEBUG_IOP
435         printk("iop_handle_recv: iop %d channel %d\n", iop_num, chan);
436 #endif
437 
438         msg = iop_alloc_msg();
439         msg->iop_num = iop_num;
440         msg->channel = chan;
441         msg->status = IOP_MSGSTATUS_UNSOL;
442         msg->handler = iop_listeners[iop_num][chan].handler;
443 
444         offset = IOP_ADDR_RECV_MSG + (chan * IOP_MSG_LEN);
445 
446         for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
447                 msg->message[i] = iop_readb(iop, offset);
448         }
449 
450         iop_writeb(iop, IOP_ADDR_RECV_STATE + chan, IOP_MSG_RCVD);
451 
452         /* If there is a listener, call it now. Otherwise complete */
453         /* the message ourselves to avoid possible stalls.         */
454 
455         if (msg->handler) {
456                 (*msg->handler)(msg);
457         } else {
458 #ifdef DEBUG_IOP
459                 printk("iop_handle_recv: unclaimed message on iop %d channel %d\n", iop_num, chan);
460                 printk("iop_handle_recv:");
461                 for (i = 0 ; i < IOP_MSG_LEN ; i++) {
462                         printk(" %02X", (uint) msg->message[i]);
463                 }
464                 printk("\n");
465 #endif
466                 iop_complete_message(msg);
467         }
468 }
469 
470 /*
471  * Send a message
472  *
473  * The message is placed at the end of the send queue. Afterwards if the
474  * channel is idle we force an immediate send of the next message in the
475  * queue.
476  */
477 
478 int iop_send_message(uint iop_num, uint chan, void *privdata,
479                       uint msg_len, __u8 *msg_data,
480                       void (*handler)(struct iop_msg *))
481 {
482         struct iop_msg *msg, *q;
483 
484         if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return -EINVAL;
485         if (chan >= NUM_IOP_CHAN) return -EINVAL;
486         if (msg_len > IOP_MSG_LEN) return -EINVAL;
487 
488         msg = iop_alloc_msg();
489         if (!msg) return -ENOMEM;
490 
491         msg->next = NULL;
492         msg->status = IOP_MSGSTATUS_WAITING;
493         msg->iop_num = iop_num;
494         msg->channel = chan;
495         msg->caller_priv = privdata;
496         memcpy(msg->message, msg_data, msg_len);
497         msg->handler = handler;
498 
499         if (!(q = iop_send_queue[iop_num][chan])) {
500                 iop_send_queue[iop_num][chan] = msg;
501         } else {
502                 while (q->next) q = q->next;
503                 q->next = msg;
504         }
505 
506         if (iop_readb(iop_base[iop_num],
507             IOP_ADDR_SEND_STATE + chan) == IOP_MSG_IDLE) {
508                 iop_do_send(msg);
509         }
510 
511         return 0;
512 }
513 
514 /*
515  * Upload code to the shared RAM of an IOP.
516  */
517 
518 void iop_upload_code(uint iop_num, __u8 *code_start,
519                      uint code_len, __u16 shared_ram_start)
520 {
521         if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return;
522 
523         iop_loadaddr(iop_base[iop_num], shared_ram_start);
524 
525         while (code_len--) {
526                 iop_base[iop_num]->ram_data = *code_start++;
527         }
528 }
529 
530 /*
531  * Download code from the shared RAM of an IOP.
532  */
533 
534 void iop_download_code(uint iop_num, __u8 *code_start,
535                        uint code_len, __u16 shared_ram_start)
536 {
537         if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return;
538 
539         iop_loadaddr(iop_base[iop_num], shared_ram_start);
540 
541         while (code_len--) {
542                 *code_start++ = iop_base[iop_num]->ram_data;
543         }
544 }
545 
546 /*
547  * Compare the code in the shared RAM of an IOP with a copy in system memory
548  * and return 0 on match or the first nonmatching system memory address on
549  * failure.
550  */
551 
552 __u8 *iop_compare_code(uint iop_num, __u8 *code_start,
553                        uint code_len, __u16 shared_ram_start)
554 {
555         if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return code_start;
556 
557         iop_loadaddr(iop_base[iop_num], shared_ram_start);
558 
559         while (code_len--) {
560                 if (*code_start != iop_base[iop_num]->ram_data) {
561                         return code_start;
562                 }
563                 code_start++;
564         }
565         return (__u8 *) 0;
566 }
567 
568 /*
569  * Handle an ISM IOP interrupt
570  */
571 
572 irqreturn_t iop_ism_irq(int irq, void *dev_id)
573 {
574         uint iop_num = (uint) dev_id;
575         volatile struct mac_iop *iop = iop_base[iop_num];
576         int i,state;
577 
578 #ifdef DEBUG_IOP
579         printk("iop_ism_irq: status = %02X\n", (uint) iop->status_ctrl);
580 #endif
581 
582         /* INT0 indicates a state change on an outgoing message channel */
583 
584         if (iop->status_ctrl & IOP_INT0) {
585                 iop->status_ctrl = IOP_INT0 | IOP_RUN | IOP_AUTOINC;
586 #ifdef DEBUG_IOP
587                 printk("iop_ism_irq: new status = %02X, send states",
588                         (uint) iop->status_ctrl);
589 #endif
590                 for (i = 0 ; i < NUM_IOP_CHAN  ; i++) {
591                         state = iop_readb(iop, IOP_ADDR_SEND_STATE + i);
592 #ifdef DEBUG_IOP
593                         printk(" %02X", state);
594 #endif
595                         if (state == IOP_MSG_COMPLETE) {
596                                 iop_handle_send(iop_num, i);
597                         }
598                 }
599 #ifdef DEBUG_IOP
600                 printk("\n");
601 #endif
602         }
603 
604         if (iop->status_ctrl & IOP_INT1) {      /* INT1 for incoming msgs */
605                 iop->status_ctrl = IOP_INT1 | IOP_RUN | IOP_AUTOINC;
606 #ifdef DEBUG_IOP
607                 printk("iop_ism_irq: new status = %02X, recv states",
608                         (uint) iop->status_ctrl);
609 #endif
610                 for (i = 0 ; i < NUM_IOP_CHAN ; i++) {
611                         state = iop_readb(iop, IOP_ADDR_RECV_STATE + i);
612 #ifdef DEBUG_IOP
613                         printk(" %02X", state);
614 #endif
615                         if (state == IOP_MSG_NEW) {
616                                 iop_handle_recv(iop_num, i);
617                         }
618                 }
619 #ifdef DEBUG_IOP
620                 printk("\n");
621 #endif
622         }
623         return IRQ_HANDLED;
624 }
625 

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