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TOMOYO Linux Cross Reference
Linux/arch/mips/include/asm/dec/kn02.h

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  1 /*
  2  * Hardware info about DECstation 5000/200 systems (otherwise known as
  3  * 3max or KN02).
  4  *
  5  * This file is subject to the terms and conditions of the GNU General Public
  6  * License.  See the file "COPYING" in the main directory of this archive
  7  * for more details.
  8  *
  9  * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
 10  * are by courtesy of Chris Fraser.
 11  * Copyright (C) 2002, 2003, 2005  Maciej W. Rozycki
 12  */
 13 #ifndef __ASM_MIPS_DEC_KN02_H
 14 #define __ASM_MIPS_DEC_KN02_H
 15 
 16 #define KN02_SLOT_BASE  0x1fc00000
 17 #define KN02_SLOT_SIZE  0x00080000
 18 
 19 /*
 20  * Address ranges decoded by the "system slot" logic for onboard devices.
 21  */
 22 #define KN02_SYS_ROM    (0*KN02_SLOT_SIZE)      /* system board ROM */
 23 #define KN02_RES_1      (1*KN02_SLOT_SIZE)      /* unused */
 24 #define KN02_CHKSYN     (2*KN02_SLOT_SIZE)      /* ECC syndrome */
 25 #define KN02_ERRADDR    (3*KN02_SLOT_SIZE)      /* bus error address */
 26 #define KN02_DZ11       (4*KN02_SLOT_SIZE)      /* DZ11 (DC7085) serial */
 27 #define KN02_RTC        (5*KN02_SLOT_SIZE)      /* DS1287 RTC */
 28 #define KN02_CSR        (6*KN02_SLOT_SIZE)      /* system ctrl & status reg */
 29 #define KN02_SYS_ROM_7  (7*KN02_SLOT_SIZE)      /* system board ROM (alias) */
 30 
 31 
 32 /*
 33  * System Control & Status Register bits.
 34  */
 35 #define KN02_CSR_RES_28         (0xf<<28)       /* unused */
 36 #define KN02_CSR_PSU            (1<<27)         /* power supply unit warning */
 37 #define KN02_CSR_NVRAM          (1<<26)         /* ~NVRAM clear jumper */
 38 #define KN02_CSR_REFEVEN        (1<<25)         /* mem refresh bank toggle */
 39 #define KN02_CSR_NRMOD          (1<<24)         /* ~NRMOD manufact. jumper */
 40 #define KN02_CSR_IOINTEN        (0xff<<16)      /* IRQ mask bits */
 41 #define KN02_CSR_DIAGCHK        (1<<15)         /* diagn/norml ECC reads */
 42 #define KN02_CSR_DIAGGEN        (1<<14)         /* diagn/norml ECC writes */
 43 #define KN02_CSR_CORRECT        (1<<13)         /* ECC correct/check */
 44 #define KN02_CSR_LEDIAG         (1<<12)         /* ECC diagn. latch strobe */
 45 #define KN02_CSR_TXDIS          (1<<11)         /* DZ11 transmit disable */
 46 #define KN02_CSR_BNK32M         (1<<10)         /* 32M/8M stride */
 47 #define KN02_CSR_DIAGDN         (1<<9)          /* DIAGDN manufact. jumper */
 48 #define KN02_CSR_BAUD38         (1<<8)          /* DZ11 38/19kbps ext. rate */
 49 #define KN02_CSR_IOINT          (0xff<<0)       /* IRQ status bits (r/o) */
 50 #define KN02_CSR_LEDS           (0xff<<0)       /* ~diagnostic LEDs (w/o) */
 51 
 52 
 53 /*
 54  * CPU interrupt bits.
 55  */
 56 #define KN02_CPU_INR_RES_6      6       /* unused */
 57 #define KN02_CPU_INR_BUS        5       /* memory, I/O bus read/write errors */
 58 #define KN02_CPU_INR_RES_4      4       /* unused */
 59 #define KN02_CPU_INR_RTC        3       /* DS1287 RTC */
 60 #define KN02_CPU_INR_CASCADE    2       /* CSR cascade */
 61 
 62 /*
 63  * CSR interrupt bits.
 64  */
 65 #define KN02_CSR_INR_DZ11       7       /* DZ11 (DC7085) serial */
 66 #define KN02_CSR_INR_LANCE      6       /* LANCE (Am7990) Ethernet */
 67 #define KN02_CSR_INR_ASC        5       /* ASC (NCR53C94) SCSI */
 68 #define KN02_CSR_INR_RES_4      4       /* unused */
 69 #define KN02_CSR_INR_RES_3      3       /* unused */
 70 #define KN02_CSR_INR_TC2        2       /* TURBOchannel slot #2 */
 71 #define KN02_CSR_INR_TC1        1       /* TURBOchannel slot #1 */
 72 #define KN02_CSR_INR_TC0        0       /* TURBOchannel slot #0 */
 73 
 74 
 75 #define KN02_IRQ_BASE           8       /* first IRQ assigned to CSR */
 76 #define KN02_IRQ_LINES          8       /* number of CSR interrupts */
 77 
 78 #define KN02_IRQ_NR(n)          ((n) + KN02_IRQ_BASE)
 79 #define KN02_IRQ_MASK(n)        (1 << (n))
 80 #define KN02_IRQ_ALL            0xff
 81 
 82 
 83 #ifndef __ASSEMBLY__
 84 
 85 #include <linux/types.h>
 86 
 87 extern u32 cached_kn02_csr;
 88 extern void init_kn02_irqs(int base);
 89 #endif
 90 
 91 #endif /* __ASM_MIPS_DEC_KN02_H */
 92 

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