1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org>
7 *
8 */
9 #ifndef __ASM_MACH_GENERIC_DMA_COHERENCE_H
10 #define __ASM_MACH_GENERIC_DMA_COHERENCE_H
11
12 struct device;
13
14 static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
15 size_t size)
16 {
17 return virt_to_phys(addr);
18 }
19
20 static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
21 struct page *page)
22 {
23 return page_to_phys(page);
24 }
25
26 static inline unsigned long plat_dma_addr_to_phys(struct device *dev,
27 dma_addr_t dma_addr)
28 {
29 return dma_addr;
30 }
31
32 static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
33 size_t size, enum dma_data_direction direction)
34 {
35 }
36
37 static inline int plat_dma_supported(struct device *dev, u64 mask)
38 {
39 /*
40 * we fall back to GFP_DMA when the mask isn't all 1s,
41 * so we can't guarantee allocations that must be
42 * within a tighter range than GFP_DMA..
43 */
44 if (mask < DMA_BIT_MASK(24))
45 return 0;
46
47 return 1;
48 }
49
50 static inline int plat_device_is_coherent(struct device *dev)
51 {
52 return coherentio;
53 }
54
55 #ifndef plat_post_dma_flush
56 static inline void plat_post_dma_flush(struct device *dev)
57 {
58 }
59 #endif
60
61 #ifdef CONFIG_SWIOTLB
62 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
63 {
64 return paddr;
65 }
66
67 static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
68 {
69 return daddr;
70 }
71 #endif
72
73 #endif /* __ASM_MACH_GENERIC_DMA_COHERENCE_H */
74
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