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TOMOYO Linux Cross Reference
Linux/arch/mips/include/asm/txx9/rbtx4927.h

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  1 /*
  2  * Author: MontaVista Software, Inc.
  3  *         source@mvista.com
  4  *
  5  * Copyright 2001-2002 MontaVista Software Inc.
  6  *
  7  *  This program is free software; you can redistribute it and/or modify it
  8  *  under the terms of the GNU General Public License as published by the
  9  *  Free Software Foundation; either version 2 of the License, or (at your
 10  *  option) any later version.
 11  *
 12  *  THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
 13  *  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 14  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 15  *  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 16  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 17  *  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 18  *  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 19  *  ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
 20  *  TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 21  *  USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 22  *
 23  *  You should have received a copy of the GNU General Public License along
 24  *  with this program; if not, write to the Free Software Foundation, Inc.,
 25  *  675 Mass Ave, Cambridge, MA 02139, USA.
 26  */
 27 #ifndef __ASM_TXX9_RBTX4927_H
 28 #define __ASM_TXX9_RBTX4927_H
 29 
 30 #include <asm/txx9/tx4927.h>
 31 
 32 #define RBTX4927_PCIMEM         0x08000000
 33 #define RBTX4927_PCIMEM_SIZE    0x08000000
 34 #define RBTX4927_PCIIO          0x16000000
 35 #define RBTX4927_PCIIO_SIZE     0x01000000
 36 
 37 #define RBTX4927_LED_ADDR       (IO_BASE + TXX9_CE(2) + 0x00001000)
 38 #define RBTX4927_IMASK_ADDR     (IO_BASE + TXX9_CE(2) + 0x00002000)
 39 #define RBTX4927_IMSTAT_ADDR    (IO_BASE + TXX9_CE(2) + 0x00002006)
 40 #define RBTX4927_SOFTINT_ADDR   (IO_BASE + TXX9_CE(2) + 0x00003000)
 41 #define RBTX4927_SOFTRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f000)
 42 #define RBTX4927_SOFTRESETLOCK_ADDR     (IO_BASE + TXX9_CE(2) + 0x0000f002)
 43 #define RBTX4927_PCIRESET_ADDR  (IO_BASE + TXX9_CE(2) + 0x0000f006)
 44 #define RBTX4927_BRAMRTC_BASE   (IO_BASE + TXX9_CE(2) + 0x00010000)
 45 #define RBTX4927_ETHER_BASE     (IO_BASE + TXX9_CE(2) + 0x00020000)
 46 
 47 /* Ethernet port address */
 48 #define RBTX4927_ETHER_ADDR     (RBTX4927_ETHER_BASE + 0x280)
 49 
 50 #define rbtx4927_imask_addr     ((__u8 __iomem *)RBTX4927_IMASK_ADDR)
 51 #define rbtx4927_imstat_addr    ((__u8 __iomem *)RBTX4927_IMSTAT_ADDR)
 52 #define rbtx4927_softint_addr   ((__u8 __iomem *)RBTX4927_SOFTINT_ADDR)
 53 #define rbtx4927_softreset_addr ((__u8 __iomem *)RBTX4927_SOFTRESET_ADDR)
 54 #define rbtx4927_softresetlock_addr     \
 55                                 ((__u8 __iomem *)RBTX4927_SOFTRESETLOCK_ADDR)
 56 #define rbtx4927_pcireset_addr  ((__u8 __iomem *)RBTX4927_PCIRESET_ADDR)
 57 
 58 /* bits for ISTAT/IMASK/IMSTAT */
 59 #define RBTX4927_INTB_PCID      0
 60 #define RBTX4927_INTB_PCIC      1
 61 #define RBTX4927_INTB_PCIB      2
 62 #define RBTX4927_INTB_PCIA      3
 63 #define RBTX4927_INTF_PCID      (1 << RBTX4927_INTB_PCID)
 64 #define RBTX4927_INTF_PCIC      (1 << RBTX4927_INTB_PCIC)
 65 #define RBTX4927_INTF_PCIB      (1 << RBTX4927_INTB_PCIB)
 66 #define RBTX4927_INTF_PCIA      (1 << RBTX4927_INTB_PCIA)
 67 
 68 #define RBTX4927_NR_IRQ_IOC     8       /* IOC */
 69 
 70 #define RBTX4927_IRQ_IOC        (TXX9_IRQ_BASE + TX4927_NUM_IR)
 71 #define RBTX4927_IRQ_IOC_PCID   (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCID)
 72 #define RBTX4927_IRQ_IOC_PCIC   (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIC)
 73 #define RBTX4927_IRQ_IOC_PCIB   (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIB)
 74 #define RBTX4927_IRQ_IOC_PCIA   (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIA)
 75 
 76 #define RBTX4927_IRQ_IOCINT     (TXX9_IRQ_BASE + TX4927_IR_INT(1))
 77 
 78 #ifdef CONFIG_PCI
 79 #define RBTX4927_ISA_IO_OFFSET RBTX4927_PCIIO
 80 #else
 81 #define RBTX4927_ISA_IO_OFFSET 0
 82 #endif
 83 
 84 #define RBTX4927_RTL_8019_BASE (RBTX4927_ETHER_ADDR - mips_io_port_base)
 85 #define RBTX4927_RTL_8019_IRQ  (TXX9_IRQ_BASE + TX4927_IR_INT(3))
 86 
 87 void rbtx4927_prom_init(void);
 88 void rbtx4927_irq_setup(void);
 89 struct pci_dev;
 90 int rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
 91 
 92 #endif /* __ASM_TXX9_RBTX4927_H */
 93 

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