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TOMOYO Linux Cross Reference
Linux/arch/mips/pci/fixup-fuloong2e.c

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  1 /*
  2  * Copyright (C) 2004 ICT CAS
  3  * Author: Li xiaoyu, ICT CAS
  4  *   lixy@ict.ac.cn
  5  *
  6  * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
  7  * Author: Fuxin Zhang, zhangfx@lemote.com
  8  *
  9  *  This program is free software; you can redistribute  it and/or modify it
 10  *  under  the terms of  the GNU General  Public License as published by the
 11  *  Free Software Foundation;  either version 2 of the  License, or (at your
 12  *  option) any later version.
 13  */
 14 #include <linux/init.h>
 15 #include <linux/pci.h>
 16 
 17 #include <loongson.h>
 18 
 19 /* South bridge slot number is set by the pci probe process */
 20 static u8 sb_slot = 5;
 21 
 22 int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 23 {
 24         int irq = 0;
 25 
 26         if (slot == sb_slot) {
 27                 switch (PCI_FUNC(dev->devfn)) {
 28                 case 2:
 29                         irq = 10;
 30                         break;
 31                 case 3:
 32                         irq = 11;
 33                         break;
 34                 case 5:
 35                         irq = 9;
 36                         break;
 37                 }
 38         } else {
 39                 irq = LOONGSON_IRQ_BASE + 25 + pin;
 40         }
 41         return irq;
 42 
 43 }
 44 
 45 /* Do platform specific device initialization at pci_enable_device() time */
 46 int pcibios_plat_dev_init(struct pci_dev *dev)
 47 {
 48         return 0;
 49 }
 50 
 51 static void loongson2e_nec_fixup(struct pci_dev *pdev)
 52 {
 53         unsigned int val;
 54 
 55         /* Configures port 1, 2, 3, 4 to be validate*/
 56         pci_read_config_dword(pdev, 0xe0, &val);
 57         pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x4);
 58 
 59         /* System clock is 48-MHz Oscillator. */
 60         pci_write_config_dword(pdev, 0xe4, 1 << 5);
 61 }
 62 
 63 static void loongson2e_686b_func0_fixup(struct pci_dev *pdev)
 64 {
 65         unsigned char c;
 66 
 67         sb_slot = PCI_SLOT(pdev->devfn);
 68 
 69         printk(KERN_INFO "via686b fix: ISA bridge\n");
 70 
 71         /*  Enable I/O Recovery time */
 72         pci_write_config_byte(pdev, 0x40, 0x08);
 73 
 74         /*  Enable ISA refresh */
 75         pci_write_config_byte(pdev, 0x41, 0x01);
 76 
 77         /*  disable ISA line buffer */
 78         pci_write_config_byte(pdev, 0x45, 0x00);
 79 
 80         /*  Gate INTR, and flush line buffer */
 81         pci_write_config_byte(pdev, 0x46, 0xe0);
 82 
 83         /*  Disable PCI Delay Transaction, Enable EISA ports 4D0/4D1. */
 84         /* pci_write_config_byte(pdev, 0x47, 0x20); */
 85 
 86         /*
 87          *  enable PCI Delay Transaction, Enable EISA ports 4D0/4D1.
 88          *  enable time-out timer
 89          */
 90         pci_write_config_byte(pdev, 0x47, 0xe6);
 91 
 92         /*
 93          * enable level trigger on pci irqs: 9,10,11,13
 94          * important! without this PCI interrupts won't work
 95          */
 96         outb(0x2e, 0x4d1);
 97 
 98         /*  512 K PCI Decode */
 99         pci_write_config_byte(pdev, 0x48, 0x01);
100 
101         /*  Wait for PGNT before grant to ISA Master/DMA */
102         pci_write_config_byte(pdev, 0x4a, 0x84);
103 
104         /*
105          * Plug'n'Play
106          *
107          *  Parallel DRQ 3, Floppy DRQ 2 (default)
108          */
109         pci_write_config_byte(pdev, 0x50, 0x0e);
110 
111         /*
112          * IRQ Routing for Floppy and Parallel port
113          *
114          *  IRQ 6 for floppy, IRQ 7 for parallel port
115          */
116         pci_write_config_byte(pdev, 0x51, 0x76);
117 
118         /* IRQ Routing for serial ports (take IRQ 3 and 4) */
119         pci_write_config_byte(pdev, 0x52, 0x34);
120 
121         /*  All IRQ's level triggered. */
122         pci_write_config_byte(pdev, 0x54, 0x00);
123 
124         /* route PIRQA-D irq */
125         pci_write_config_byte(pdev, 0x55, 0x90);        /* bit 7-4, PIRQA */
126         pci_write_config_byte(pdev, 0x56, 0xba);        /* bit 7-4, PIRQC; */
127                                                         /* 3-0, PIRQB */
128         pci_write_config_byte(pdev, 0x57, 0xd0);        /* bit 7-4, PIRQD */
129 
130         /* enable function 5/6, audio/modem */
131         pci_read_config_byte(pdev, 0x85, &c);
132         c &= ~(0x3 << 2);
133         pci_write_config_byte(pdev, 0x85, c);
134 
135         printk(KERN_INFO"via686b fix: ISA bridge done\n");
136 }
137 
138 static void loongson2e_686b_func1_fixup(struct pci_dev *pdev)
139 {
140         printk(KERN_INFO"via686b fix: IDE\n");
141 
142         /* Modify IDE controller setup */
143         pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 48);
144         pci_write_config_byte(pdev, PCI_COMMAND,
145                               PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
146                               PCI_COMMAND_MASTER);
147         pci_write_config_byte(pdev, 0x40, 0x0b);
148         /* legacy mode */
149         pci_write_config_byte(pdev, 0x42, 0x09);
150 
151 #if 1/* play safe, otherwise we may see notebook's usb keyboard lockup */
152         /* disable read prefetch/write post buffers */
153         pci_write_config_byte(pdev, 0x41, 0x02);
154 
155         /* use 3/4 as fifo thresh hold  */
156         pci_write_config_byte(pdev, 0x43, 0x0a);
157         pci_write_config_byte(pdev, 0x44, 0x00);
158 
159         pci_write_config_byte(pdev, 0x45, 0x00);
160 #else
161         pci_write_config_byte(pdev, 0x41, 0xc2);
162         pci_write_config_byte(pdev, 0x43, 0x35);
163         pci_write_config_byte(pdev, 0x44, 0x1c);
164 
165         pci_write_config_byte(pdev, 0x45, 0x10);
166 #endif
167 
168         printk(KERN_INFO"via686b fix: IDE done\n");
169 }
170 
171 static void loongson2e_686b_func2_fixup(struct pci_dev *pdev)
172 {
173         /* irq routing */
174         pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 10);
175 }
176 
177 static void loongson2e_686b_func3_fixup(struct pci_dev *pdev)
178 {
179         /* irq routing */
180         pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 11);
181 }
182 
183 static void loongson2e_686b_func5_fixup(struct pci_dev *pdev)
184 {
185         unsigned int val;
186         unsigned char c;
187 
188         /* enable IO */
189         pci_write_config_byte(pdev, PCI_COMMAND,
190                               PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
191                               PCI_COMMAND_MASTER);
192         pci_read_config_dword(pdev, 0x4, &val);
193         pci_write_config_dword(pdev, 0x4, val | 1);
194 
195         /* route ac97 IRQ */
196         pci_write_config_byte(pdev, 0x3c, 9);
197 
198         pci_read_config_byte(pdev, 0x8, &c);
199 
200         /* link control: enable link & SGD PCM output */
201         pci_write_config_byte(pdev, 0x41, 0xcc);
202 
203         /* disable game port, FM, midi, sb, enable write to reg2c-2f */
204         pci_write_config_byte(pdev, 0x42, 0x20);
205 
206         /* we are using Avance logic codec */
207         pci_write_config_word(pdev, 0x2c, 0x1005);
208         pci_write_config_word(pdev, 0x2e, 0x4710);
209         pci_read_config_dword(pdev, 0x2c, &val);
210 
211         pci_write_config_byte(pdev, 0x42, 0x0);
212 }
213 
214 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686,
215                          loongson2e_686b_func0_fixup);
216 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1,
217                          loongson2e_686b_func1_fixup);
218 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2,
219                          loongson2e_686b_func2_fixup);
220 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3,
221                          loongson2e_686b_func3_fixup);
222 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_5,
223                          loongson2e_686b_func5_fixup);
224 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
225                          loongson2e_nec_fixup);
226 

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