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Linux/arch/openrisc/kernel/setup.c

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  1 /*
  2  * OpenRISC setup.c
  3  *
  4  * Linux architectural port borrowing liberally from similar works of
  5  * others.  All original copyrights apply as per the original source
  6  * declaration.
  7  *
  8  * Modifications for the OpenRISC architecture:
  9  * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
 10  * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
 11  *
 12  *      This program is free software; you can redistribute it and/or
 13  *      modify it under the terms of the GNU General Public License
 14  *      as published by the Free Software Foundation; either version
 15  *      2 of the License, or (at your option) any later version.
 16  *
 17  * This file handles the architecture-dependent parts of initialization
 18  */
 19 
 20 #include <linux/errno.h>
 21 #include <linux/sched.h>
 22 #include <linux/kernel.h>
 23 #include <linux/mm.h>
 24 #include <linux/stddef.h>
 25 #include <linux/unistd.h>
 26 #include <linux/ptrace.h>
 27 #include <linux/slab.h>
 28 #include <linux/tty.h>
 29 #include <linux/ioport.h>
 30 #include <linux/delay.h>
 31 #include <linux/console.h>
 32 #include <linux/init.h>
 33 #include <linux/bootmem.h>
 34 #include <linux/seq_file.h>
 35 #include <linux/serial.h>
 36 #include <linux/initrd.h>
 37 #include <linux/of_fdt.h>
 38 #include <linux/of.h>
 39 #include <linux/memblock.h>
 40 #include <linux/device.h>
 41 #include <linux/of_platform.h>
 42 
 43 #include <asm/sections.h>
 44 #include <asm/segment.h>
 45 #include <asm/pgtable.h>
 46 #include <asm/types.h>
 47 #include <asm/setup.h>
 48 #include <asm/io.h>
 49 #include <asm/cpuinfo.h>
 50 #include <asm/delay.h>
 51 
 52 #include "vmlinux.h"
 53 
 54 static unsigned long __init setup_memory(void)
 55 {
 56         unsigned long bootmap_size;
 57         unsigned long ram_start_pfn;
 58         unsigned long free_ram_start_pfn;
 59         unsigned long ram_end_pfn;
 60         phys_addr_t memory_start, memory_end;
 61         struct memblock_region *region;
 62 
 63         memory_end = memory_start = 0;
 64 
 65         /* Find main memory where is the kernel */
 66         for_each_memblock(memory, region) {
 67                 memory_start = region->base;
 68                 memory_end = region->base + region->size;
 69                 printk(KERN_INFO "%s: Memory: 0x%x-0x%x\n", __func__,
 70                        memory_start, memory_end);
 71         }
 72 
 73         if (!memory_end) {
 74                 panic("No memory!");
 75         }
 76 
 77         ram_start_pfn = PFN_UP(memory_start);
 78         /* free_ram_start_pfn is first page after kernel */
 79         free_ram_start_pfn = PFN_UP(__pa(_end));
 80         ram_end_pfn = PFN_DOWN(memblock_end_of_DRAM());
 81 
 82         max_pfn = ram_end_pfn;
 83 
 84         /*
 85          * initialize the boot-time allocator (with low memory only).
 86          *
 87          * This makes the memory from the end of the kernel to the end of
 88          * RAM usable.
 89          * init_bootmem sets the global values min_low_pfn, max_low_pfn.
 90          */
 91         bootmap_size = init_bootmem(free_ram_start_pfn,
 92                                     ram_end_pfn - ram_start_pfn);
 93         free_bootmem(PFN_PHYS(free_ram_start_pfn),
 94                      (ram_end_pfn - free_ram_start_pfn) << PAGE_SHIFT);
 95         reserve_bootmem(PFN_PHYS(free_ram_start_pfn), bootmap_size,
 96                         BOOTMEM_DEFAULT);
 97 
 98         for_each_memblock(reserved, region) {
 99                 printk(KERN_INFO "Reserved - 0x%08x-0x%08x\n",
100                        (u32) region->base, (u32) region->size);
101                 reserve_bootmem(region->base, region->size, BOOTMEM_DEFAULT);
102         }
103 
104         return ram_end_pfn;
105 }
106 
107 struct cpuinfo cpuinfo;
108 
109 static void print_cpuinfo(void)
110 {
111         unsigned long upr = mfspr(SPR_UPR);
112         unsigned long vr = mfspr(SPR_VR);
113         unsigned int version;
114         unsigned int revision;
115 
116         version = (vr & SPR_VR_VER) >> 24;
117         revision = (vr & SPR_VR_REV);
118 
119         printk(KERN_INFO "CPU: OpenRISC-%x (revision %d) @%d MHz\n",
120                version, revision, cpuinfo.clock_frequency / 1000000);
121 
122         if (!(upr & SPR_UPR_UP)) {
123                 printk(KERN_INFO
124                        "-- no UPR register... unable to detect configuration\n");
125                 return;
126         }
127 
128         if (upr & SPR_UPR_DCP)
129                 printk(KERN_INFO
130                        "-- dcache: %4d bytes total, %2d bytes/line, %d way(s)\n",
131                        cpuinfo.dcache_size, cpuinfo.dcache_block_size, 1);
132         else
133                 printk(KERN_INFO "-- dcache disabled\n");
134         if (upr & SPR_UPR_ICP)
135                 printk(KERN_INFO
136                        "-- icache: %4d bytes total, %2d bytes/line, %d way(s)\n",
137                        cpuinfo.icache_size, cpuinfo.icache_block_size, 1);
138         else
139                 printk(KERN_INFO "-- icache disabled\n");
140 
141         if (upr & SPR_UPR_DMP)
142                 printk(KERN_INFO "-- dmmu: %4d entries, %lu way(s)\n",
143                        1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
144                        1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW));
145         if (upr & SPR_UPR_IMP)
146                 printk(KERN_INFO "-- immu: %4d entries, %lu way(s)\n",
147                        1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
148                        1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW));
149 
150         printk(KERN_INFO "-- additional features:\n");
151         if (upr & SPR_UPR_DUP)
152                 printk(KERN_INFO "-- debug unit\n");
153         if (upr & SPR_UPR_PCUP)
154                 printk(KERN_INFO "-- performance counters\n");
155         if (upr & SPR_UPR_PMP)
156                 printk(KERN_INFO "-- power management\n");
157         if (upr & SPR_UPR_PICP)
158                 printk(KERN_INFO "-- PIC\n");
159         if (upr & SPR_UPR_TTP)
160                 printk(KERN_INFO "-- timer\n");
161         if (upr & SPR_UPR_CUP)
162                 printk(KERN_INFO "-- custom unit(s)\n");
163 }
164 
165 void __init setup_cpuinfo(void)
166 {
167         struct device_node *cpu;
168         unsigned long iccfgr, dccfgr;
169         unsigned long cache_set_size, cache_ways;
170 
171         cpu = of_find_compatible_node(NULL, NULL, "opencores,or1200-rtlsvn481");
172         if (!cpu)
173                 panic("No compatible CPU found in device tree...\n");
174 
175         iccfgr = mfspr(SPR_ICCFGR);
176         cache_ways = 1 << (iccfgr & SPR_ICCFGR_NCW);
177         cache_set_size = 1 << ((iccfgr & SPR_ICCFGR_NCS) >> 3);
178         cpuinfo.icache_block_size = 16 << ((iccfgr & SPR_ICCFGR_CBS) >> 7);
179         cpuinfo.icache_size =
180             cache_set_size * cache_ways * cpuinfo.icache_block_size;
181 
182         dccfgr = mfspr(SPR_DCCFGR);
183         cache_ways = 1 << (dccfgr & SPR_DCCFGR_NCW);
184         cache_set_size = 1 << ((dccfgr & SPR_DCCFGR_NCS) >> 3);
185         cpuinfo.dcache_block_size = 16 << ((dccfgr & SPR_DCCFGR_CBS) >> 7);
186         cpuinfo.dcache_size =
187             cache_set_size * cache_ways * cpuinfo.dcache_block_size;
188 
189         if (of_property_read_u32(cpu, "clock-frequency",
190                                  &cpuinfo.clock_frequency)) {
191                 printk(KERN_WARNING
192                        "Device tree missing CPU 'clock-frequency' parameter."
193                        "Assuming frequency 25MHZ"
194                        "This is probably not what you want.");
195         }
196 
197         of_node_put(cpu);
198 
199         print_cpuinfo();
200 }
201 
202 /**
203  * or32_early_setup
204  *
205  * Handles the pointer to the device tree that this kernel is to use
206  * for establishing the available platform devices.
207  *
208  * Falls back on built-in device tree in case null pointer is passed.
209  */
210 
211 void __init or32_early_setup(void *fdt)
212 {
213         if (fdt)
214                 pr_info("FDT at %p\n", fdt);
215         else {
216                 fdt = __dtb_start;
217                 pr_info("Compiled-in FDT at %p\n", fdt);
218         }
219         early_init_devtree(fdt);
220 }
221 
222 static int __init openrisc_device_probe(void)
223 {
224         of_platform_populate(NULL, NULL, NULL, NULL);
225 
226         return 0;
227 }
228 
229 device_initcall(openrisc_device_probe);
230 
231 static inline unsigned long extract_value_bits(unsigned long reg,
232                                                short bit_nr, short width)
233 {
234         return (reg >> bit_nr) & (0 << width);
235 }
236 
237 static inline unsigned long extract_value(unsigned long reg, unsigned long mask)
238 {
239         while (!(mask & 0x1)) {
240                 reg = reg >> 1;
241                 mask = mask >> 1;
242         }
243         return mask & reg;
244 }
245 
246 void __init detect_unit_config(unsigned long upr, unsigned long mask,
247                                char *text, void (*func) (void))
248 {
249         if (text != NULL)
250                 printk("%s", text);
251 
252         if (upr & mask) {
253                 if (func != NULL)
254                         func();
255                 else
256                         printk("present\n");
257         } else
258                 printk("not present\n");
259 }
260 
261 /*
262  * calibrate_delay
263  *
264  * Lightweight calibrate_delay implementation that calculates loops_per_jiffy
265  * from the clock frequency passed in via the device tree
266  *
267  */
268 
269 void calibrate_delay(void)
270 {
271         const int *val;
272         struct device_node *cpu = NULL;
273         cpu = of_find_compatible_node(NULL, NULL, "opencores,or1200-rtlsvn481");
274         val = of_get_property(cpu, "clock-frequency", NULL);
275         if (!val)
276                 panic("no cpu 'clock-frequency' parameter in device tree");
277         loops_per_jiffy = *val / HZ;
278         pr_cont("%lu.%02lu BogoMIPS (lpj=%lu)\n",
279                 loops_per_jiffy / (500000 / HZ),
280                 (loops_per_jiffy / (5000 / HZ)) % 100, loops_per_jiffy);
281 }
282 
283 void __init setup_arch(char **cmdline_p)
284 {
285         unsigned long max_low_pfn;
286 
287         unflatten_and_copy_device_tree();
288 
289         setup_cpuinfo();
290 
291         /* process 1's initial memory region is the kernel code/data */
292         init_mm.start_code = (unsigned long)_stext;
293         init_mm.end_code = (unsigned long)_etext;
294         init_mm.end_data = (unsigned long)_edata;
295         init_mm.brk = (unsigned long)_end;
296 
297 #ifdef CONFIG_BLK_DEV_INITRD
298         initrd_start = (unsigned long)&__initrd_start;
299         initrd_end = (unsigned long)&__initrd_end;
300         if (initrd_start == initrd_end) {
301                 initrd_start = 0;
302                 initrd_end = 0;
303         }
304         initrd_below_start_ok = 1;
305 #endif
306 
307         /* setup bootmem allocator */
308         max_low_pfn = setup_memory();
309 
310         /* paging_init() sets up the MMU and marks all pages as reserved */
311         paging_init();
312 
313 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
314         if (!conswitchp)
315                 conswitchp = &dummy_con;
316 #endif
317 
318         *cmdline_p = boot_command_line;
319 
320         printk(KERN_INFO "OpenRISC Linux -- http://openrisc.net\n");
321 }
322 
323 static int show_cpuinfo(struct seq_file *m, void *v)
324 {
325         unsigned long vr;
326         int version, revision;
327 
328         vr = mfspr(SPR_VR);
329         version = (vr & SPR_VR_VER) >> 24;
330         revision = vr & SPR_VR_REV;
331 
332         return seq_printf(m,
333                           "cpu\t\t: OpenRISC-%x\n"
334                           "revision\t: %d\n"
335                           "frequency\t: %ld\n"
336                           "dcache size\t: %d bytes\n"
337                           "dcache block size\t: %d bytes\n"
338                           "icache size\t: %d bytes\n"
339                           "icache block size\t: %d bytes\n"
340                           "immu\t\t: %d entries, %lu ways\n"
341                           "dmmu\t\t: %d entries, %lu ways\n"
342                           "bogomips\t: %lu.%02lu\n",
343                           version,
344                           revision,
345                           loops_per_jiffy * HZ,
346                           cpuinfo.dcache_size,
347                           cpuinfo.dcache_block_size,
348                           cpuinfo.icache_size,
349                           cpuinfo.icache_block_size,
350                           1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
351                           1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW),
352                           1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
353                           1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW),
354                           (loops_per_jiffy * HZ) / 500000,
355                           ((loops_per_jiffy * HZ) / 5000) % 100);
356 }
357 
358 static void *c_start(struct seq_file *m, loff_t * pos)
359 {
360         /* We only have one CPU... */
361         return *pos < 1 ? (void *)1 : NULL;
362 }
363 
364 static void *c_next(struct seq_file *m, void *v, loff_t * pos)
365 {
366         ++*pos;
367         return NULL;
368 }
369 
370 static void c_stop(struct seq_file *m, void *v)
371 {
372 }
373 
374 const struct seq_operations cpuinfo_op = {
375         .start = c_start,
376         .next = c_next,
377         .stop = c_stop,
378         .show = show_cpuinfo,
379 };
380 

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