1 #ifndef _ASM_IO_H
2 #define _ASM_IO_H
3
4 #include <linux/types.h>
5 #include <asm/pgtable.h>
6
7 #define virt_to_phys(a) ((unsigned long)__pa(a))
8 #define phys_to_virt(a) __va(a)
9 #define virt_to_bus virt_to_phys
10 #define bus_to_virt phys_to_virt
11
12 static inline unsigned long isa_bus_to_virt(unsigned long addr) {
13 BUG();
14 return 0;
15 }
16
17 static inline unsigned long isa_virt_to_bus(void *addr) {
18 BUG();
19 return 0;
20 }
21
22 /*
23 * Memory mapped I/O
24 *
25 * readX()/writeX() do byteswapping and take an ioremapped address
26 * __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address.
27 * gsc_*() don't byteswap and operate on physical addresses;
28 * eg dev->hpa or 0xfee00000.
29 */
30
31 static inline unsigned char gsc_readb(unsigned long addr)
32 {
33 long flags;
34 unsigned char ret;
35
36 __asm__ __volatile__(
37 " rsm 2,%0\n"
38 " ldbx 0(%2),%1\n"
39 " mtsm %0\n"
40 : "=&r" (flags), "=r" (ret) : "r" (addr) );
41
42 return ret;
43 }
44
45 static inline unsigned short gsc_readw(unsigned long addr)
46 {
47 long flags;
48 unsigned short ret;
49
50 __asm__ __volatile__(
51 " rsm 2,%0\n"
52 " ldhx 0(%2),%1\n"
53 " mtsm %0\n"
54 : "=&r" (flags), "=r" (ret) : "r" (addr) );
55
56 return ret;
57 }
58
59 static inline unsigned int gsc_readl(unsigned long addr)
60 {
61 u32 ret;
62
63 __asm__ __volatile__(
64 " ldwax 0(%1),%0\n"
65 : "=r" (ret) : "r" (addr) );
66
67 return ret;
68 }
69
70 static inline unsigned long long gsc_readq(unsigned long addr)
71 {
72 unsigned long long ret;
73
74 #ifdef CONFIG_64BIT
75 __asm__ __volatile__(
76 " ldda 0(%1),%0\n"
77 : "=r" (ret) : "r" (addr) );
78 #else
79 /* two reads may have side effects.. */
80 ret = ((u64) gsc_readl(addr)) << 32;
81 ret |= gsc_readl(addr+4);
82 #endif
83 return ret;
84 }
85
86 static inline void gsc_writeb(unsigned char val, unsigned long addr)
87 {
88 long flags;
89 __asm__ __volatile__(
90 " rsm 2,%0\n"
91 " stbs %1,0(%2)\n"
92 " mtsm %0\n"
93 : "=&r" (flags) : "r" (val), "r" (addr) );
94 }
95
96 static inline void gsc_writew(unsigned short val, unsigned long addr)
97 {
98 long flags;
99 __asm__ __volatile__(
100 " rsm 2,%0\n"
101 " sths %1,0(%2)\n"
102 " mtsm %0\n"
103 : "=&r" (flags) : "r" (val), "r" (addr) );
104 }
105
106 static inline void gsc_writel(unsigned int val, unsigned long addr)
107 {
108 __asm__ __volatile__(
109 " stwas %0,0(%1)\n"
110 : : "r" (val), "r" (addr) );
111 }
112
113 static inline void gsc_writeq(unsigned long long val, unsigned long addr)
114 {
115 #ifdef CONFIG_64BIT
116 __asm__ __volatile__(
117 " stda %0,0(%1)\n"
118 : : "r" (val), "r" (addr) );
119 #else
120 /* two writes may have side effects.. */
121 gsc_writel(val >> 32, addr);
122 gsc_writel(val, addr+4);
123 #endif
124 }
125
126 /*
127 * The standard PCI ioremap interfaces
128 */
129
130 extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
131
132 /* Most machines react poorly to I/O-space being cacheable... Instead let's
133 * define ioremap() in terms of ioremap_nocache().
134 */
135 static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
136 {
137 return __ioremap(offset, size, _PAGE_NO_CACHE);
138 }
139 #define ioremap_nocache(off, sz) ioremap((off), (sz))
140
141 extern void iounmap(const volatile void __iomem *addr);
142
143 static inline unsigned char __raw_readb(const volatile void __iomem *addr)
144 {
145 return (*(volatile unsigned char __force *) (addr));
146 }
147 static inline unsigned short __raw_readw(const volatile void __iomem *addr)
148 {
149 return *(volatile unsigned short __force *) addr;
150 }
151 static inline unsigned int __raw_readl(const volatile void __iomem *addr)
152 {
153 return *(volatile unsigned int __force *) addr;
154 }
155 static inline unsigned long long __raw_readq(const volatile void __iomem *addr)
156 {
157 return *(volatile unsigned long long __force *) addr;
158 }
159
160 static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr)
161 {
162 *(volatile unsigned char __force *) addr = b;
163 }
164 static inline void __raw_writew(unsigned short b, volatile void __iomem *addr)
165 {
166 *(volatile unsigned short __force *) addr = b;
167 }
168 static inline void __raw_writel(unsigned int b, volatile void __iomem *addr)
169 {
170 *(volatile unsigned int __force *) addr = b;
171 }
172 static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr)
173 {
174 *(volatile unsigned long long __force *) addr = b;
175 }
176
177 static inline unsigned char readb(const volatile void __iomem *addr)
178 {
179 return __raw_readb(addr);
180 }
181 static inline unsigned short readw(const volatile void __iomem *addr)
182 {
183 return le16_to_cpu(__raw_readw(addr));
184 }
185 static inline unsigned int readl(const volatile void __iomem *addr)
186 {
187 return le32_to_cpu(__raw_readl(addr));
188 }
189 static inline unsigned long long readq(const volatile void __iomem *addr)
190 {
191 return le64_to_cpu(__raw_readq(addr));
192 }
193
194 static inline void writeb(unsigned char b, volatile void __iomem *addr)
195 {
196 __raw_writeb(b, addr);
197 }
198 static inline void writew(unsigned short w, volatile void __iomem *addr)
199 {
200 __raw_writew(cpu_to_le16(w), addr);
201 }
202 static inline void writel(unsigned int l, volatile void __iomem *addr)
203 {
204 __raw_writel(cpu_to_le32(l), addr);
205 }
206 static inline void writeq(unsigned long long q, volatile void __iomem *addr)
207 {
208 __raw_writeq(cpu_to_le64(q), addr);
209 }
210
211 #define readb readb
212 #define readw readw
213 #define readl readl
214 #define readq readq
215 #define writeb writeb
216 #define writew writew
217 #define writel writel
218 #define writeq writeq
219
220 #define readb_relaxed(addr) readb(addr)
221 #define readw_relaxed(addr) readw(addr)
222 #define readl_relaxed(addr) readl(addr)
223 #define readq_relaxed(addr) readq(addr)
224
225 #define mmiowb() do { } while (0)
226
227 void memset_io(volatile void __iomem *addr, unsigned char val, int count);
228 void memcpy_fromio(void *dst, const volatile void __iomem *src, int count);
229 void memcpy_toio(volatile void __iomem *dst, const void *src, int count);
230
231 /* Port-space IO */
232
233 #define inb_p inb
234 #define inw_p inw
235 #define inl_p inl
236 #define outb_p outb
237 #define outw_p outw
238 #define outl_p outl
239
240 extern unsigned char eisa_in8(unsigned short port);
241 extern unsigned short eisa_in16(unsigned short port);
242 extern unsigned int eisa_in32(unsigned short port);
243 extern void eisa_out8(unsigned char data, unsigned short port);
244 extern void eisa_out16(unsigned short data, unsigned short port);
245 extern void eisa_out32(unsigned int data, unsigned short port);
246
247 #if defined(CONFIG_PCI)
248 extern unsigned char inb(int addr);
249 extern unsigned short inw(int addr);
250 extern unsigned int inl(int addr);
251
252 extern void outb(unsigned char b, int addr);
253 extern void outw(unsigned short b, int addr);
254 extern void outl(unsigned int b, int addr);
255 #elif defined(CONFIG_EISA)
256 #define inb eisa_in8
257 #define inw eisa_in16
258 #define inl eisa_in32
259 #define outb eisa_out8
260 #define outw eisa_out16
261 #define outl eisa_out32
262 #else
263 static inline char inb(unsigned long addr)
264 {
265 BUG();
266 return -1;
267 }
268
269 static inline short inw(unsigned long addr)
270 {
271 BUG();
272 return -1;
273 }
274
275 static inline int inl(unsigned long addr)
276 {
277 BUG();
278 return -1;
279 }
280
281 #define outb(x, y) BUG()
282 #define outw(x, y) BUG()
283 #define outl(x, y) BUG()
284 #endif
285
286 /*
287 * String versions of in/out ops:
288 */
289 extern void insb (unsigned long port, void *dst, unsigned long count);
290 extern void insw (unsigned long port, void *dst, unsigned long count);
291 extern void insl (unsigned long port, void *dst, unsigned long count);
292 extern void outsb (unsigned long port, const void *src, unsigned long count);
293 extern void outsw (unsigned long port, const void *src, unsigned long count);
294 extern void outsl (unsigned long port, const void *src, unsigned long count);
295
296
297 /* IO Port space is : BBiiii where BB is HBA number. */
298 #define IO_SPACE_LIMIT 0x00ffffff
299
300 /* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32
301 * bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit
302 * mode (essentially just sign extending. This macro takes in a 32
303 * bit I/O address (still with the leading f) and outputs the correct
304 * value for either 32 or 64 bit mode */
305 #define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))
306
307 #include <asm-generic/iomap.h>
308
309 /*
310 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
311 * access
312 */
313 #define xlate_dev_mem_ptr(p) __va(p)
314
315 /*
316 * Convert a virtual cached pointer to an uncached pointer
317 */
318 #define xlate_dev_kmem_ptr(p) p
319
320 #endif
321
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