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TOMOYO Linux Cross Reference
Linux/arch/parisc/kernel/irq.c

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  1 /* 
  2  * Code to handle x86 style IRQs plus some generic interrupt stuff.
  3  *
  4  * Copyright (C) 1992 Linus Torvalds
  5  * Copyright (C) 1994, 1995, 1996, 1997, 1998 Ralf Baechle
  6  * Copyright (C) 1999 SuSE GmbH (Philipp Rumpf, prumpf@tux.org)
  7  * Copyright (C) 1999-2000 Grant Grundler
  8  *
  9  *    This program is free software; you can redistribute it and/or modify
 10  *    it under the terms of the GNU General Public License as published by
 11  *    the Free Software Foundation; either version 2, or (at your option)
 12  *    any later version.
 13  *
 14  *    This program is distributed in the hope that it will be useful,
 15  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
 16  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 17  *    GNU General Public License for more details.
 18  *
 19  *    You should have received a copy of the GNU General Public License
 20  *    along with this program; if not, write to the Free Software
 21  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 22  */
 23 #include <linux/bitops.h>
 24 #include <linux/config.h>
 25 #include <linux/eisa.h>
 26 #include <linux/errno.h>
 27 #include <linux/init.h>
 28 #include <linux/module.h>
 29 #include <linux/signal.h>
 30 #include <linux/types.h>
 31 #include <linux/ioport.h>
 32 #include <linux/timex.h>
 33 #include <linux/slab.h>
 34 #include <linux/random.h>
 35 #include <linux/sched.h>
 36 #include <linux/interrupt.h>
 37 #include <linux/kernel_stat.h>
 38 #include <linux/irq.h>
 39 #include <linux/seq_file.h>
 40 #include <linux/spinlock.h>
 41 
 42 #include <asm/cache.h>
 43 #include <asm/pdc.h>
 44 
 45 #undef DEBUG_IRQ
 46 #undef PARISC_IRQ_CR16_COUNTS
 47 
 48 extern irqreturn_t timer_interrupt(int, void *, struct pt_regs *);
 49 extern irqreturn_t ipi_interrupt(int, void *, struct pt_regs *);
 50 
 51 #ifdef DEBUG_IRQ
 52 #define DBG_IRQ(irq, x) if ((irq) != TIMER_IRQ) printk x
 53 #else /* DEBUG_IRQ */
 54 #define DBG_IRQ(irq, x) do { } while (0)
 55 #endif /* DEBUG_IRQ */
 56 
 57 #define EIEM_MASK(irq)       (1UL<<(MAX_CPU_IRQ-IRQ_OFFSET(irq)))
 58 
 59 /* Bits in EIEM correlate with cpu_irq_action[].
 60 ** Numbered *Big Endian*! (ie bit 0 is MSB)
 61 */
 62 static volatile unsigned long cpu_eiem = 0;
 63 
 64 static spinlock_t irq_lock = SPIN_LOCK_UNLOCKED;  /* protect IRQ regions */
 65 
 66 static void cpu_set_eiem(void *info)
 67 {
 68         set_eiem((unsigned long) info);
 69 }
 70 
 71 static inline void disable_cpu_irq(void *unused, int irq)
 72 {
 73         unsigned long eirr_bit = EIEM_MASK(irq);
 74 
 75         cpu_eiem &= ~eirr_bit;
 76         on_each_cpu(cpu_set_eiem, (void *) cpu_eiem, 1, 1);
 77 }
 78 
 79 static void enable_cpu_irq(void *unused, int irq)
 80 {
 81         unsigned long eirr_bit = EIEM_MASK(irq);
 82 
 83         mtctl(eirr_bit, 23);    /* clear EIRR bit before unmasking */
 84         cpu_eiem |= eirr_bit;
 85         on_each_cpu(cpu_set_eiem, (void *) cpu_eiem, 1, 1);
 86 }
 87 
 88 /* mask and disable are the same at the CPU level
 89 ** Difference is enable clears pending interrupts
 90 */
 91 #define mask_cpu_irq    disable_cpu_irq
 92 
 93 static inline void unmask_cpu_irq(void *unused, int irq)
 94 {
 95         unsigned long eirr_bit = EIEM_MASK(irq);
 96         cpu_eiem |= eirr_bit;
 97         /* NOTE: sending an IPI will cause do_cpu_irq_mask() to
 98         ** handle *any* unmasked pending interrupts.
 99         ** ie We don't need to check for pending interrupts here.
100         */
101         on_each_cpu(cpu_set_eiem, (void *) cpu_eiem, 1, 1);
102 }
103 
104 /*
105  * XXX cpu_irq_actions[] will become 2 dimensional for per CPU EIR support.
106  * correspond changes needed in:
107  *      processor_probe()       initialize additional action arrays
108  *      request_irq()           handle CPU IRQ region specially
109  *      do_cpu_irq_mask()       index into the matching irq_action array.
110  */
111 struct irqaction cpu_irq_actions[IRQ_PER_REGION] = {
112         [IRQ_OFFSET(TIMER_IRQ)] = {
113                                         .handler = timer_interrupt,
114                                         .name = "timer",
115                                 },
116 #ifdef CONFIG_SMP
117         [IRQ_OFFSET(IPI_IRQ)]   = {
118                                         .handler = ipi_interrupt,
119                                         .name = "IPI",
120                                 },
121 #endif
122 };
123 
124 struct irq_region_ops cpu_irq_ops = {
125         .disable_irq    = disable_cpu_irq,
126         .enable_irq     = enable_cpu_irq,
127         .mask_irq       = unmask_cpu_irq,
128         .unmask_irq     = unmask_cpu_irq
129 };
130 
131 struct irq_region cpu0_irq_region = {
132         .ops    = {
133                         .disable_irq    = disable_cpu_irq,
134                         .enable_irq     = enable_cpu_irq,
135                         .mask_irq       = unmask_cpu_irq,
136                         .unmask_irq     = unmask_cpu_irq
137         },
138         .data   = {
139                         .dev            = &cpu_data[0],
140                         .name           = "PARISC-CPU",
141                         .irqbase        = IRQ_FROM_REGION(CPU_IRQ_REGION),
142         },
143         .action = cpu_irq_actions,
144 };
145 
146 struct irq_region *irq_region[NR_IRQ_REGS] = {
147         [ 0 ]              = NULL, /* reserved for EISA, else causes data page fault (aka code 15) */
148         [ CPU_IRQ_REGION ] = &cpu0_irq_region,
149 };
150 
151 
152 /*
153 ** Generic interfaces that device drivers can use:
154 **    mask_irq()        block IRQ
155 **    unmask_irq()      re-enable IRQ and trigger if IRQ is pending
156 **    disable_irq()     block IRQ
157 **    enable_irq()      clear pending and re-enable IRQ
158 */
159 
160 void mask_irq(int irq)
161 {
162         struct irq_region *region;
163 
164         DBG_IRQ(irq, ("mask_irq(%d) %d+%d eiem 0x%lx\n", irq,
165                                 IRQ_REGION(irq), IRQ_OFFSET(irq), cpu_eiem));
166         irq = irq_canonicalize(irq);
167         region = irq_region[IRQ_REGION(irq)];
168         if (region->ops.mask_irq)
169                 region->ops.mask_irq(region->data.dev, IRQ_OFFSET(irq));
170 }
171 
172 void unmask_irq(int irq)
173 {
174         struct irq_region *region;
175 
176         DBG_IRQ(irq, ("unmask_irq(%d) %d+%d eiem 0x%lx\n", irq,
177                                 IRQ_REGION(irq), IRQ_OFFSET(irq), cpu_eiem));
178         irq = irq_canonicalize(irq);
179         region = irq_region[IRQ_REGION(irq)];
180         if (region->ops.unmask_irq)
181                 region->ops.unmask_irq(region->data.dev, IRQ_OFFSET(irq));
182 }
183 
184 void disable_irq(int irq)
185 {
186         struct irq_region *region;
187 
188         DBG_IRQ(irq, ("disable_irq(%d) %d+%d eiem 0x%lx\n", irq,
189                                 IRQ_REGION(irq), IRQ_OFFSET(irq), cpu_eiem));
190         irq = irq_canonicalize(irq);
191         region = irq_region[IRQ_REGION(irq)];
192         if (region->ops.disable_irq)
193                 region->ops.disable_irq(region->data.dev, IRQ_OFFSET(irq));
194         else
195                 BUG();
196 }
197 EXPORT_SYMBOL(disable_irq);
198 
199 void enable_irq(int irq)
200 {
201         struct irq_region *region;
202 
203         DBG_IRQ(irq, ("enable_irq(%d) %d+%d eiem 0x%lx\n", irq,
204                                 IRQ_REGION(irq), IRQ_OFFSET(irq), cpu_eiem));
205         irq = irq_canonicalize(irq);
206         region = irq_region[IRQ_REGION(irq)];
207 
208         if (region->ops.enable_irq)
209                 region->ops.enable_irq(region->data.dev, IRQ_OFFSET(irq));
210         else
211                 BUG();
212 }
213 EXPORT_SYMBOL(enable_irq);
214 
215 int show_interrupts(struct seq_file *p, void *v)
216 {
217 #ifdef CONFIG_PROC_FS
218         unsigned int regnr = 0;
219 
220         seq_puts(p, "     ");
221 #ifdef CONFIG_SMP
222         for (regnr = 0; regnr < NR_CPUS; regnr++)
223 #endif
224                 seq_printf(p, "      CPU%02d ", regnr);
225 
226 #ifdef PARISC_IRQ_CR16_COUNTS
227         seq_printf(p, "[min/avg/max] (CPU cycle counts)");
228 #endif
229         seq_putc(p, '\n');
230 
231         /* We don't need *irqsave lock variants since this is
232         ** only allowed to change while in the base context.
233         */
234         spin_lock(&irq_lock);
235         for (regnr = 0; regnr < NR_IRQ_REGS; regnr++) {
236             unsigned int i;
237             struct irq_region *region = irq_region[regnr];
238 
239             if (!region || !region->action)
240                 continue;
241 
242             for (i = 0; i <= MAX_CPU_IRQ; i++) {
243                 struct irqaction *action = &region->action[i];
244                 unsigned int irq_no = IRQ_FROM_REGION(regnr) + i;
245                 int j = 0;
246                 if (!action->handler)
247                         continue;
248 
249                 seq_printf(p, "%3d: ", irq_no);
250 #ifdef CONFIG_SMP
251                 for (; j < NR_CPUS; j++)
252 #endif
253                   seq_printf(p, "%10u ", kstat_cpu(j).irqs[irq_no]);
254 
255                 seq_printf(p, " %14s",
256                             region->data.name ? region->data.name : "N/A");
257 #ifndef PARISC_IRQ_CR16_COUNTS
258                 seq_printf(p, "  %s", action->name);
259 
260                 while ((action = action->next))
261                         seq_printf(p, ", %s", action->name);
262 #else
263                 for ( ;action; action = action->next) {
264                         unsigned int k, avg, min, max;
265 
266                         min = max = action->cr16_hist[0];
267 
268                         for (avg = k = 0; k < PARISC_CR16_HIST_SIZE; k++) {
269                                 int hist = action->cr16_hist[k];
270 
271                                 if (hist) {
272                                         avg += hist;
273                                 } else
274                                         break;
275 
276                                 if (hist > max) max = hist;
277                                 if (hist < min) min = hist;
278                         }
279 
280                         avg /= k;
281                         seq_printf(p, " %s[%d/%d/%d]", action->name,
282                                         min,avg,max);
283                 }
284 #endif
285 
286                 seq_putc(p, '\n');
287             }
288         }
289         spin_unlock(&irq_lock);
290 
291         seq_putc(p, '\n');
292 #endif  /* CONFIG_PROC_FS */
293         return 0;
294 }
295 
296 
297 
298 /*
299 ** The following form a "set": Virtual IRQ, Transaction Address, Trans Data.
300 ** Respectively, these map to IRQ region+EIRR, Processor HPA, EIRR bit.
301 **
302 ** To use txn_XXX() interfaces, get a Virtual IRQ first.
303 ** Then use that to get the Transaction address and data.
304 */
305 
306 int
307 txn_alloc_irq(void)
308 {
309         int irq;
310 
311         /* never return irq 0 cause that's the interval timer */
312         for (irq = 1; irq <= MAX_CPU_IRQ; irq++) {
313                 if (cpu_irq_actions[irq].handler == NULL) {
314                         return (IRQ_FROM_REGION(CPU_IRQ_REGION) + irq);
315                 }
316         }
317 
318         /* unlikely, but be prepared */
319         return -1;
320 }
321 
322 int
323 txn_claim_irq(int irq)
324 {
325         if (irq_region[IRQ_REGION(irq)]->action[IRQ_OFFSET(irq)].handler ==NULL)
326                 return irq;
327 
328         /* unlikely, but be prepared */
329         return -1;
330 }
331 
332 unsigned long
333 txn_alloc_addr(int virt_irq)
334 {
335         static int next_cpu = -1;
336 
337         next_cpu++; /* assign to "next" CPU we want this bugger on */
338 
339         /* validate entry */
340         while ((next_cpu < NR_CPUS) && !cpu_data[next_cpu].txn_addr)
341                 next_cpu++;
342 
343         if (next_cpu >= NR_CPUS) 
344                 next_cpu = 0;   /* nothing else, assign monarch */
345 
346         return cpu_data[next_cpu].txn_addr;
347 }
348 
349 
350 /*
351 ** The alloc process needs to accept a parameter to accommodate limitations
352 ** of the HW/SW which use these bits:
353 ** Legacy PA I/O (GSC/NIO): 5 bits (architected EIM register)
354 ** V-class (EPIC):          6 bits
355 ** N/L-class/A500:          8 bits (iosapic)
356 ** PCI 2.2 MSI:             16 bits (I think)
357 ** Existing PCI devices:    32-bits (all Symbios SCSI/ATM/HyperFabric)
358 **
359 ** On the service provider side:
360 ** o PA 1.1 (and PA2.0 narrow mode)     5-bits (width of EIR register)
361 ** o PA 2.0 wide mode                   6-bits (per processor)
362 ** o IA64                               8-bits (0-256 total)
363 **
364 ** So a Legacy PA I/O device on a PA 2.0 box can't use all
365 ** the bits supported by the processor...and the N/L-class
366 ** I/O subsystem supports more bits than PA2.0 has. The first
367 ** case is the problem.
368 */
369 unsigned int
370 txn_alloc_data(int virt_irq, unsigned int bits_wide)
371 {
372         /* XXX FIXME : bits_wide indicates how wide the transaction
373         ** data is allowed to be...we may need a different virt_irq
374         ** if this one won't work. Another reason to index virtual
375         ** irq's into a table which can manage CPU/IRQ bit separately.
376         */
377         if (IRQ_OFFSET(virt_irq) > (1 << (bits_wide -1)))
378         {
379                 panic("Sorry -- didn't allocate valid IRQ for this device\n");
380         }
381 
382         return (IRQ_OFFSET(virt_irq));
383 }
384 
385 void do_irq(struct irqaction *action, int irq, struct pt_regs * regs)
386 {
387         int cpu = smp_processor_id();
388 
389         irq_enter();
390         ++kstat_cpu(cpu).irqs[irq];
391 
392         DBG_IRQ(irq, ("do_irq(%d) %d+%d\n", irq, IRQ_REGION(irq), IRQ_OFFSET(irq)));
393 
394         for (; action; action = action->next) {
395 #ifdef PARISC_IRQ_CR16_COUNTS
396                 unsigned long cr_start = mfctl(16);
397 #endif
398 
399                 if (action->handler == NULL) {
400                         if (IRQ_REGION(irq) == EISA_IRQ_REGION && irq_region[EISA_IRQ_REGION]) {
401                                 /* were we called due to autodetecting (E)ISA irqs ? */
402                                 unsigned int *status;
403                                 status = &irq_region[EISA_IRQ_REGION]->data.status[IRQ_OFFSET(irq)];
404                                 if (*status & IRQ_AUTODETECT) {
405                                         *status &= ~IRQ_WAITING;
406                                         continue; 
407                                 }
408                         }
409                         printk(KERN_ERR "IRQ:  CPU:%d No handler for IRQ %d !\n", cpu, irq);
410                         continue;
411                 }
412 
413                 action->handler(irq, action->dev_id, regs);
414 
415 #ifdef PARISC_IRQ_CR16_COUNTS
416                 {
417                         unsigned long cr_end = mfctl(16);
418                         unsigned long tmp = cr_end - cr_start;
419                         /* check for roll over */
420                         cr_start = (cr_end < cr_start) ?  -(tmp) : (tmp);
421                 }
422                 action->cr16_hist[action->cr16_idx++] = (int) cr_start;
423                 action->cr16_idx &= PARISC_CR16_HIST_SIZE - 1;
424 #endif
425         }
426 
427         irq_exit();
428 }
429 
430 
431 /* ONLY called from entry.S:intr_extint() */
432 void do_cpu_irq_mask(struct pt_regs *regs)
433 {
434         unsigned long eirr_val;
435         unsigned int i=3;       /* limit time in interrupt context */
436 
437         /*
438          * PSW_I or EIEM bits cannot be enabled until after the
439          * interrupts are processed.
440          * timer_interrupt() assumes it won't get interrupted when it
441          * holds the xtime_lock...an unmasked interrupt source could
442          * interrupt and deadlock by trying to grab xtime_lock too.
443          * Keeping PSW_I and EIEM disabled avoids this.
444          */
445         set_eiem(0UL);  /* disable all extr interrupt for now */
446 
447         /* 1) only process IRQs that are enabled/unmasked (cpu_eiem)
448          * 2) We loop here on EIRR contents in order to avoid
449          *    nested interrupts or having to take another interrupt
450          *    when we could have just handled it right away.
451          * 3) Limit the number of times we loop to make sure other
452          *    processing can occur.
453          */
454         while ((eirr_val = (mfctl(23) & cpu_eiem)) && --i) {
455                 unsigned long bit = (1UL<<MAX_CPU_IRQ);
456                 unsigned int irq;
457 
458                 mtctl(eirr_val, 23); /* reset bits we are going to process */
459 
460 #ifdef DEBUG_IRQ
461                 if (eirr_val != (1UL << MAX_CPU_IRQ))
462                         printk(KERN_DEBUG "do_cpu_irq_mask  %x\n", eirr_val);
463 #endif
464 
465                 /* Work our way from MSb to LSb...same order we alloc EIRs */
466                 for (irq = 0; eirr_val && bit; bit>>=1, irq++)
467                 {
468                         if (!(bit & eirr_val & cpu_eiem))
469                                 continue;
470 
471                         /* clear bit in mask - can exit loop sooner */
472                         eirr_val &= ~bit;
473 
474                         do_irq(&cpu_irq_actions[irq], TIMER_IRQ+irq, regs);
475                 }
476         }
477         set_eiem(cpu_eiem);
478 }
479 
480 
481 /* Called from second level IRQ regions: eg dino or iosapic. */
482 void do_irq_mask(unsigned long mask, struct irq_region *region, struct pt_regs *regs)
483 {
484         unsigned long bit;
485         unsigned int irq;
486 
487 #ifdef DEBUG_IRQ
488         if (mask != (1L<<MAX_CPU_IRQ))
489             printk(KERN_DEBUG "do_irq_mask %08lx %p %p\n", mask, region, regs);
490 #endif
491 
492         for (bit = (1L<<MAX_CPU_IRQ), irq = 0; mask && bit; bit>>=1, irq++) {
493                 unsigned int irq_num;
494                 if (!(bit&mask))
495                         continue;
496 
497                 mask &= ~bit;   /* clear bit in mask - can exit loop sooner */
498                 irq_num = region->data.irqbase + irq;
499 
500                 mask_irq(irq_num);
501                 do_irq(&region->action[irq], irq_num, regs);
502                 unmask_irq(irq_num);
503         }
504 }
505 
506 
507 static inline int find_free_region(void)
508 {
509         int irqreg;
510 
511         for (irqreg=1; irqreg <= (NR_IRQ_REGS); irqreg++) {
512                 if (irq_region[irqreg] == NULL)
513                         return irqreg;
514         }
515 
516         return 0;
517 }
518 
519 
520 /*****
521  * alloc_irq_region - allocate/init a new IRQ region
522  * @count: number of IRQs in this region.
523  * @ops: function table with request/release/mask/unmask/etc.. entries.
524  * @name: name of region owner for /proc/interrupts output.
525  * @dev: private data to associate with the new IRQ region.
526  *
527  * Every IRQ must become a MMIO write to the CPU's EIRR in
528  * order to get CPU service. The IRQ region represents the
529  * number of unique events the region handler can (or must)
530  * identify. For PARISC CPU, that's the width of the EIR Register.
531  * IRQ regions virtualize IRQs (eg EISA or PCI host bus controllers)
532  * for line based devices.
533  */
534 struct irq_region *alloc_irq_region( int count, struct irq_region_ops *ops,
535                                         const char *name, void *dev)
536 {
537         struct irq_region *region;
538         int index;
539 
540         index = find_free_region();
541         if (index == 0) {
542                 printk(KERN_ERR "Maximum number of irq regions exceeded. Increase NR_IRQ_REGS!\n");
543                 return NULL;
544         }
545 
546         if ((IRQ_REGION(count-1)))
547                 return NULL;
548 
549         if (count < IRQ_PER_REGION) {
550             DBG_IRQ(0, ("alloc_irq_region() using minimum of %d irq lines for %s (%d)\n",
551                         IRQ_PER_REGION, name, count));
552             count = IRQ_PER_REGION;
553         }
554 
555         /* if either mask *or* unmask is set, both have to be set. */
556         if((ops->mask_irq || ops->unmask_irq) &&
557                 !(ops->mask_irq && ops->unmask_irq))
558                         return NULL;
559 
560         /* ditto for enable/disable */
561         if( (ops->disable_irq || ops->enable_irq) &&
562                 !(ops->disable_irq && ops->enable_irq) )
563                         return NULL;
564 
565         region = kmalloc(sizeof(*region), GFP_ATOMIC);
566         if (!region)
567                 return NULL;
568         memset(region, 0, sizeof(*region));
569 
570         region->action = kmalloc(count * sizeof(*region->action), GFP_ATOMIC);
571         if (!region->action) {
572                 kfree(region);
573                 return NULL;
574         }
575         memset(region->action, 0, count * sizeof(*region->action));
576 
577         region->ops = *ops;
578         region->data.irqbase = IRQ_FROM_REGION(index);
579         region->data.name = name;
580         region->data.dev = dev;
581 
582         irq_region[index] = region;
583 
584         return irq_region[index];
585 }
586 
587 /* FIXME: SMP, flags, bottom halves, rest */
588 
589 int request_irq(unsigned int irq,
590                 irqreturn_t (*handler)(int, void *, struct pt_regs *),
591                 unsigned long irqflags,
592                 const char * devname,
593                 void *dev_id)
594 {
595         struct irqaction * action;
596 
597 #if 0
598         printk(KERN_INFO "request_irq(%d, %p, 0x%lx, %s, %p)\n",irq, handler, irqflags, devname, dev_id);
599 #endif
600 
601         irq = irq_canonicalize(irq);
602         /* request_irq()/free_irq() may not be called from interrupt context. */
603         if (in_interrupt())
604                 BUG();
605 
606         if (!handler) {
607                 printk(KERN_ERR "request_irq(%d,...): Augh! No handler for irq!\n",
608                         irq);
609                 return -EINVAL;
610         }
611 
612         if (irq_region[IRQ_REGION(irq)] == NULL) {
613                 /*
614                 ** Bug catcher for drivers which use "char" or u8 for
615                 ** the IRQ number. They lose the region number which
616                 ** is in pcidev->irq (an int).
617                 */
618                 printk(KERN_ERR "%p (%s?) called request_irq with an invalid irq %d\n",
619                         __builtin_return_address(0), devname, irq);
620                 return -EINVAL;
621         }
622 
623         spin_lock(&irq_lock);
624         action = &(irq_region[IRQ_REGION(irq)]->action[IRQ_OFFSET(irq)]);
625 
626         /* First one is preallocated. */
627         if (action->handler) {
628                 /* But it's in use...find the tail and allocate a new one */
629                 while (action->next)
630                         action = action->next;
631 
632                 action->next = kmalloc(sizeof(*action), GFP_ATOMIC);
633                 memset(action->next, 0, sizeof(*action));
634 
635                 action = action->next;
636         }
637 
638         if (!action) {
639                 spin_unlock(&irq_lock);
640                 printk(KERN_ERR "request_irq(): Augh! No action!\n") ;
641                 return -ENOMEM;
642         }
643 
644         action->handler = handler;
645         action->flags = irqflags;
646         action->mask = 0;
647         action->name = devname;
648         action->next = NULL;
649         action->dev_id = dev_id;
650         spin_unlock(&irq_lock);
651 
652         enable_irq(irq);
653         return 0;
654 }
655 
656 EXPORT_SYMBOL(request_irq);
657 
658 void free_irq(unsigned int irq, void *dev_id)
659 {
660         struct irqaction *action, **p;
661 
662         /* See comments in request_irq() about interrupt context */
663         irq = irq_canonicalize(irq);
664         
665         if (in_interrupt()) BUG();
666 
667         spin_lock(&irq_lock);
668         action = &irq_region[IRQ_REGION(irq)]->action[IRQ_OFFSET(irq)];
669 
670         if (action->dev_id == dev_id) {
671                 if (action->next == NULL) {
672                         action->handler = NULL;
673                 } else {
674                         memcpy(action, action->next, sizeof(*action));
675                 }
676 
677                 spin_unlock(&irq_lock);
678                 return;
679         }
680 
681         p = &action->next;
682         action = action->next;
683 
684         for (; (action = *p) != NULL; p = &action->next) {
685                 if (action->dev_id != dev_id)
686                         continue;
687 
688                 /* Found it - now free it */
689                 *p = action->next;
690                 kfree(action);
691 
692                 spin_unlock(&irq_lock);
693                 return;
694         }
695 
696         spin_unlock(&irq_lock);
697         printk(KERN_ERR "Trying to free free IRQ%d\n",irq);
698 }
699 
700 EXPORT_SYMBOL(free_irq);
701 
702 
703 #ifdef CONFIG_SMP
704 void synchronize_irq(unsigned int irqnum)
705 {
706         while (in_irq()) ;
707 }
708 EXPORT_SYMBOL(synchronize_irq);
709 #endif
710 
711 
712 /*
713  * IRQ autodetection code..
714  *
715  * This depends on the fact that any interrupt that
716  * comes in on to an unassigned handler will get stuck
717  * with "IRQ_WAITING" cleared and the interrupt
718  * disabled.
719  */
720 
721 static DECLARE_MUTEX(probe_sem);
722 
723 /**
724  *      probe_irq_on    - begin an interrupt autodetect
725  *
726  *      Commence probing for an interrupt. The interrupts are scanned
727  *      and a mask of potential interrupt lines is returned.
728  *
729  */
730 
731 /* TODO: spin_lock_irq(desc->lock -> irq_lock) */
732 
733 unsigned long probe_irq_on(void)
734 {
735         unsigned int i;
736         unsigned long val;
737         unsigned long delay;
738         struct irq_region *region;
739 
740         /* support for irq autoprobing is limited to EISA (irq region 0) */
741         region = irq_region[EISA_IRQ_REGION];
742         if (!EISA_bus || !region)
743                 return 0;
744 
745         down(&probe_sem);
746 
747         /*
748          * enable any unassigned irqs
749          * (we must startup again here because if a longstanding irq
750          * happened in the previous stage, it may have masked itself)
751          */
752         for (i = EISA_MAX_IRQS-1; i > 0; i--) {
753                 struct irqaction *action;
754                 
755                 spin_lock_irq(&irq_lock);
756                 action = region->action + i;
757                 if (!action->handler) {
758                         region->data.status[i] |= IRQ_AUTODETECT | IRQ_WAITING;
759                         region->ops.enable_irq(region->data.dev,i);
760                 }
761                 spin_unlock_irq(&irq_lock);
762         }
763 
764         /*
765          * Wait for spurious interrupts to trigger
766          */
767         for (delay = jiffies + HZ/10; time_after(delay, jiffies); )
768                 /* about 100ms delay */ barrier();
769 
770         /*
771          * Now filter out any obviously spurious interrupts
772          */
773         val = 0;
774         for (i = 0; i < EISA_MAX_IRQS; i++) {
775                 unsigned int status;
776 
777                 spin_lock_irq(&irq_lock);
778                 status = region->data.status[i];
779 
780                 if (status & IRQ_AUTODETECT) {
781                         /* It triggered already - consider it spurious. */
782                         if (!(status & IRQ_WAITING)) {
783                                 region->data.status[i] = status & ~IRQ_AUTODETECT;
784                                 region->ops.disable_irq(region->data.dev,i);
785                         } else
786                                 if (i < BITS_PER_LONG)
787                                         val |= (1 << i);
788                 }
789                 spin_unlock_irq(&irq_lock);
790         }
791 
792         return val;
793 }
794 
795 EXPORT_SYMBOL(probe_irq_on);
796 
797 /*
798  * Return the one interrupt that triggered (this can
799  * handle any interrupt source).
800  */
801 
802 /**
803  *      probe_irq_off   - end an interrupt autodetect
804  *      @val: mask of potential interrupts (unused)
805  *
806  *      Scans the unused interrupt lines and returns the line which
807  *      appears to have triggered the interrupt. If no interrupt was
808  *      found then zero is returned. If more than one interrupt is
809  *      found then minus the first candidate is returned to indicate
810  *      their is doubt.
811  *
812  *      The interrupt probe logic state is returned to its previous
813  *      value.
814  *
815  *      BUGS: When used in a module (which arguably shouldnt happen)
816  *      nothing prevents two IRQ probe callers from overlapping. The
817  *      results of this are non-optimal.
818  */
819  
820 int probe_irq_off(unsigned long val)
821 {
822         struct irq_region *region;
823         int i, irq_found, nr_irqs;
824 
825         /* support for irq autoprobing is limited to EISA (irq region 0) */
826         region = irq_region[EISA_IRQ_REGION];
827         if (!EISA_bus || !region)
828                 return 0;
829 
830         nr_irqs = 0;
831         irq_found = 0;
832         for (i = 0; i < EISA_MAX_IRQS; i++) {
833                 unsigned int status;
834                 
835                 spin_lock_irq(&irq_lock);
836                 status = region->data.status[i];
837 
838                 if (status & IRQ_AUTODETECT) {
839                         if (!(status & IRQ_WAITING)) {
840                                 if (!nr_irqs)
841                                         irq_found = i;
842                                 nr_irqs++;
843                         }
844                         region->ops.disable_irq(region->data.dev,i);
845                         region->data.status[i] = status & ~IRQ_AUTODETECT;
846                 }
847                 spin_unlock_irq(&irq_lock);
848         }
849         up(&probe_sem);
850 
851         if (nr_irqs > 1)
852                 irq_found = -irq_found;
853         return irq_found;
854 }
855 
856 EXPORT_SYMBOL(probe_irq_off);
857 
858 unsigned int probe_irq_mask(unsigned long irqs)
859 {
860         return 0;
861 }
862 EXPORT_SYMBOL(probe_irq_mask);
863 
864 void __init init_IRQ(void)
865 {
866         local_irq_disable();    /* PARANOID - should already be disabled */
867         mtctl(-1L, 23);         /* EIRR : clear all pending external intr */
868 #ifdef CONFIG_SMP
869         if (!cpu_eiem)
870                 cpu_eiem = EIEM_MASK(IPI_IRQ) | EIEM_MASK(TIMER_IRQ);
871 #else
872         cpu_eiem = EIEM_MASK(TIMER_IRQ);
873 #endif
874         set_eiem(cpu_eiem);     /* EIEM : enable all external intr */
875 
876 }
877 
878 #ifdef CONFIG_PROC_FS
879 /* called from kernel/sysctl.c:sysctl_init() */
880 void __init init_irq_proc(void)
881 {
882 }
883 #endif
884 

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