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Linux/arch/powerpc/include/asm/bitops.h

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  1 /* SPDX-License-Identifier: GPL-2.0-or-later */
  2 /*
  3  * PowerPC atomic bit operations.
  4  *
  5  * Merged version by David Gibson <david@gibson.dropbear.id.au>.
  6  * Based on ppc64 versions by: Dave Engebretsen, Todd Inglett, Don
  7  * Reed, Pat McCarthy, Peter Bergner, Anton Blanchard.  They
  8  * originally took it from the ppc32 code.
  9  *
 10  * Within a word, bits are numbered LSB first.  Lot's of places make
 11  * this assumption by directly testing bits with (val & (1<<nr)).
 12  * This can cause confusion for large (> 1 word) bitmaps on a
 13  * big-endian system because, unlike little endian, the number of each
 14  * bit depends on the word size.
 15  *
 16  * The bitop functions are defined to work on unsigned longs, so for a
 17  * ppc64 system the bits end up numbered:
 18  *   |63..............0|127............64|191...........128|255...........192|
 19  * and on ppc32:
 20  *   |31.....0|63....32|95....64|127...96|159..128|191..160|223..192|255..224|
 21  *
 22  * There are a few little-endian macros used mostly for filesystem
 23  * bitmaps, these work on similar bit arrays layouts, but
 24  * byte-oriented:
 25  *   |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56|
 26  *
 27  * The main difference is that bit 3-5 (64b) or 3-4 (32b) in the bit
 28  * number field needs to be reversed compared to the big-endian bit
 29  * fields. This can be achieved by XOR with 0x38 (64b) or 0x18 (32b).
 30  */
 31 
 32 #ifndef _ASM_POWERPC_BITOPS_H
 33 #define _ASM_POWERPC_BITOPS_H
 34 
 35 #ifdef __KERNEL__
 36 
 37 #ifndef _LINUX_BITOPS_H
 38 #error only <linux/bitops.h> can be included directly
 39 #endif
 40 
 41 #include <linux/compiler.h>
 42 #include <asm/asm-compat.h>
 43 #include <asm/synch.h>
 44 #include <asm/asm-405.h>
 45 
 46 /* PPC bit number conversion */
 47 #define PPC_BITLSHIFT(be)       (BITS_PER_LONG - 1 - (be))
 48 #define PPC_BIT(bit)            (1UL << PPC_BITLSHIFT(bit))
 49 #define PPC_BITMASK(bs, be)     ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs))
 50 
 51 /* Put a PPC bit into a "normal" bit position */
 52 #define PPC_BITEXTRACT(bits, ppc_bit, dst_bit)                  \
 53         ((((bits) >> PPC_BITLSHIFT(ppc_bit)) & 1) << (dst_bit))
 54 
 55 #define PPC_BITLSHIFT32(be)     (32 - 1 - (be))
 56 #define PPC_BIT32(bit)          (1UL << PPC_BITLSHIFT32(bit))
 57 #define PPC_BITMASK32(bs, be)   ((PPC_BIT32(bs) - PPC_BIT32(be))|PPC_BIT32(bs))
 58 
 59 #define PPC_BITLSHIFT8(be)      (8 - 1 - (be))
 60 #define PPC_BIT8(bit)           (1UL << PPC_BITLSHIFT8(bit))
 61 #define PPC_BITMASK8(bs, be)    ((PPC_BIT8(bs) - PPC_BIT8(be))|PPC_BIT8(bs))
 62 
 63 #include <asm/barrier.h>
 64 
 65 /* Macro for generating the ***_bits() functions */
 66 #define DEFINE_BITOP(fn, op, prefix)            \
 67 static __inline__ void fn(unsigned long mask,   \
 68                 volatile unsigned long *_p)     \
 69 {                                               \
 70         unsigned long old;                      \
 71         unsigned long *p = (unsigned long *)_p; \
 72         __asm__ __volatile__ (                  \
 73         prefix                                  \
 74 "1:"    PPC_LLARX(%0,0,%3,0) "\n"               \
 75         stringify_in_c(op) "%0,%0,%2\n"         \
 76         PPC405_ERR77(0,%3)                      \
 77         PPC_STLCX "%0,0,%3\n"                   \
 78         "bne- 1b\n"                             \
 79         : "=&r" (old), "+m" (*p)                \
 80         : "r" (mask), "r" (p)                   \
 81         : "cc", "memory");                      \
 82 }
 83 
 84 DEFINE_BITOP(set_bits, or, "")
 85 DEFINE_BITOP(clear_bits, andc, "")
 86 DEFINE_BITOP(clear_bits_unlock, andc, PPC_RELEASE_BARRIER)
 87 DEFINE_BITOP(change_bits, xor, "")
 88 
 89 static __inline__ void set_bit(int nr, volatile unsigned long *addr)
 90 {
 91         set_bits(BIT_MASK(nr), addr + BIT_WORD(nr));
 92 }
 93 
 94 static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
 95 {
 96         clear_bits(BIT_MASK(nr), addr + BIT_WORD(nr));
 97 }
 98 
 99 static __inline__ void clear_bit_unlock(int nr, volatile unsigned long *addr)
100 {
101         clear_bits_unlock(BIT_MASK(nr), addr + BIT_WORD(nr));
102 }
103 
104 static __inline__ void change_bit(int nr, volatile unsigned long *addr)
105 {
106         change_bits(BIT_MASK(nr), addr + BIT_WORD(nr));
107 }
108 
109 /* Like DEFINE_BITOP(), with changes to the arguments to 'op' and the output
110  * operands. */
111 #define DEFINE_TESTOP(fn, op, prefix, postfix, eh)      \
112 static __inline__ unsigned long fn(                     \
113                 unsigned long mask,                     \
114                 volatile unsigned long *_p)             \
115 {                                                       \
116         unsigned long old, t;                           \
117         unsigned long *p = (unsigned long *)_p;         \
118         __asm__ __volatile__ (                          \
119         prefix                                          \
120 "1:"    PPC_LLARX(%0,0,%3,eh) "\n"                      \
121         stringify_in_c(op) "%1,%0,%2\n"                 \
122         PPC405_ERR77(0,%3)                              \
123         PPC_STLCX "%1,0,%3\n"                           \
124         "bne- 1b\n"                                     \
125         postfix                                         \
126         : "=&r" (old), "=&r" (t)                        \
127         : "r" (mask), "r" (p)                           \
128         : "cc", "memory");                              \
129         return (old & mask);                            \
130 }
131 
132 DEFINE_TESTOP(test_and_set_bits, or, PPC_ATOMIC_ENTRY_BARRIER,
133               PPC_ATOMIC_EXIT_BARRIER, 0)
134 DEFINE_TESTOP(test_and_set_bits_lock, or, "",
135               PPC_ACQUIRE_BARRIER, 1)
136 DEFINE_TESTOP(test_and_clear_bits, andc, PPC_ATOMIC_ENTRY_BARRIER,
137               PPC_ATOMIC_EXIT_BARRIER, 0)
138 DEFINE_TESTOP(test_and_change_bits, xor, PPC_ATOMIC_ENTRY_BARRIER,
139               PPC_ATOMIC_EXIT_BARRIER, 0)
140 
141 static __inline__ int test_and_set_bit(unsigned long nr,
142                                        volatile unsigned long *addr)
143 {
144         return test_and_set_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0;
145 }
146 
147 static __inline__ int test_and_set_bit_lock(unsigned long nr,
148                                        volatile unsigned long *addr)
149 {
150         return test_and_set_bits_lock(BIT_MASK(nr),
151                                 addr + BIT_WORD(nr)) != 0;
152 }
153 
154 static __inline__ int test_and_clear_bit(unsigned long nr,
155                                          volatile unsigned long *addr)
156 {
157         return test_and_clear_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0;
158 }
159 
160 static __inline__ int test_and_change_bit(unsigned long nr,
161                                           volatile unsigned long *addr)
162 {
163         return test_and_change_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0;
164 }
165 
166 #ifdef CONFIG_PPC64
167 static __inline__ unsigned long clear_bit_unlock_return_word(int nr,
168                                                 volatile unsigned long *addr)
169 {
170         unsigned long old, t;
171         unsigned long *p = (unsigned long *)addr + BIT_WORD(nr);
172         unsigned long mask = BIT_MASK(nr);
173 
174         __asm__ __volatile__ (
175         PPC_RELEASE_BARRIER
176 "1:"    PPC_LLARX(%0,0,%3,0) "\n"
177         "andc %1,%0,%2\n"
178         PPC405_ERR77(0,%3)
179         PPC_STLCX "%1,0,%3\n"
180         "bne- 1b\n"
181         : "=&r" (old), "=&r" (t)
182         : "r" (mask), "r" (p)
183         : "cc", "memory");
184 
185         return old;
186 }
187 
188 /* This is a special function for mm/filemap.c */
189 #define clear_bit_unlock_is_negative_byte(nr, addr)                     \
190         (clear_bit_unlock_return_word(nr, addr) & BIT_MASK(PG_waiters))
191 
192 #endif /* CONFIG_PPC64 */
193 
194 #include <asm-generic/bitops/non-atomic.h>
195 
196 static __inline__ void __clear_bit_unlock(int nr, volatile unsigned long *addr)
197 {
198         __asm__ __volatile__(PPC_RELEASE_BARRIER "" ::: "memory");
199         __clear_bit(nr, addr);
200 }
201 
202 /*
203  * Return the zero-based bit position (LE, not IBM bit numbering) of
204  * the most significant 1-bit in a double word.
205  */
206 #define __ilog2(x)      ilog2(x)
207 
208 #include <asm-generic/bitops/ffz.h>
209 
210 #include <asm-generic/bitops/builtin-__ffs.h>
211 
212 #include <asm-generic/bitops/builtin-ffs.h>
213 
214 /*
215  * fls: find last (most-significant) bit set.
216  * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
217  */
218 static __inline__ int fls(unsigned int x)
219 {
220         return 32 - __builtin_clz(x);
221 }
222 
223 #include <asm-generic/bitops/builtin-__fls.h>
224 
225 static __inline__ int fls64(__u64 x)
226 {
227         return 64 - __builtin_clzll(x);
228 }
229 
230 #ifdef CONFIG_PPC64
231 unsigned int __arch_hweight8(unsigned int w);
232 unsigned int __arch_hweight16(unsigned int w);
233 unsigned int __arch_hweight32(unsigned int w);
234 unsigned long __arch_hweight64(__u64 w);
235 #include <asm-generic/bitops/const_hweight.h>
236 #else
237 #include <asm-generic/bitops/hweight.h>
238 #endif
239 
240 #include <asm-generic/bitops/find.h>
241 
242 /* Little-endian versions */
243 #include <asm-generic/bitops/le.h>
244 
245 /* Bitmap functions for the ext2 filesystem */
246 
247 #include <asm-generic/bitops/ext2-atomic-setbit.h>
248 
249 #include <asm-generic/bitops/sched.h>
250 
251 #endif /* __KERNEL__ */
252 
253 #endif /* _ASM_POWERPC_BITOPS_H */
254 

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