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Linux/arch/powerpc/include/asm/nohash/pte-book3e.h

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  1 /* SPDX-License-Identifier: GPL-2.0 */
  2 #ifndef _ASM_POWERPC_NOHASH_PTE_BOOK3E_H
  3 #define _ASM_POWERPC_NOHASH_PTE_BOOK3E_H
  4 #ifdef __KERNEL__
  5 
  6 /* PTE bit definitions for processors compliant to the Book3E
  7  * architecture 2.06 or later. The position of the PTE bits
  8  * matches the HW definition of the optional Embedded Page Table
  9  * category.
 10  */
 11 
 12 /* Architected bits */
 13 #define _PAGE_PRESENT   0x000001 /* software: pte contains a translation */
 14 #define _PAGE_SW1       0x000002
 15 #define _PAGE_BIT_SWAP_TYPE     2
 16 #define _PAGE_BAP_SR    0x000004
 17 #define _PAGE_BAP_UR    0x000008
 18 #define _PAGE_BAP_SW    0x000010
 19 #define _PAGE_BAP_UW    0x000020
 20 #define _PAGE_BAP_SX    0x000040
 21 #define _PAGE_BAP_UX    0x000080
 22 #define _PAGE_PSIZE_MSK 0x000f00
 23 #define _PAGE_PSIZE_4K  0x000200
 24 #define _PAGE_PSIZE_8K  0x000300
 25 #define _PAGE_PSIZE_16K 0x000400
 26 #define _PAGE_PSIZE_32K 0x000500
 27 #define _PAGE_PSIZE_64K 0x000600
 28 #define _PAGE_PSIZE_128K        0x000700
 29 #define _PAGE_PSIZE_256K        0x000800
 30 #define _PAGE_PSIZE_512K        0x000900
 31 #define _PAGE_PSIZE_1M  0x000a00
 32 #define _PAGE_PSIZE_2M  0x000b00
 33 #define _PAGE_PSIZE_4M  0x000c00
 34 #define _PAGE_PSIZE_8M  0x000d00
 35 #define _PAGE_PSIZE_16M 0x000e00
 36 #define _PAGE_PSIZE_32M 0x000f00
 37 #define _PAGE_DIRTY     0x001000 /* C: page changed */
 38 #define _PAGE_SW0       0x002000
 39 #define _PAGE_U3        0x004000
 40 #define _PAGE_U2        0x008000
 41 #define _PAGE_U1        0x010000
 42 #define _PAGE_U0        0x020000
 43 #define _PAGE_ACCESSED  0x040000
 44 #define _PAGE_ENDIAN    0x080000
 45 #define _PAGE_GUARDED   0x100000
 46 #define _PAGE_COHERENT  0x200000 /* M: enforce memory coherence */
 47 #define _PAGE_NO_CACHE  0x400000 /* I: cache inhibit */
 48 #define _PAGE_WRITETHRU 0x800000 /* W: cache write-through */
 49 
 50 /* "Higher level" linux bit combinations */
 51 #define _PAGE_EXEC              _PAGE_BAP_UX /* .. and was cache cleaned */
 52 #define _PAGE_RW                (_PAGE_BAP_SW | _PAGE_BAP_UW) /* User write permission */
 53 #define _PAGE_KERNEL_RW         (_PAGE_BAP_SW | _PAGE_BAP_SR | _PAGE_DIRTY)
 54 #define _PAGE_KERNEL_RO         (_PAGE_BAP_SR)
 55 #define _PAGE_KERNEL_RWX        (_PAGE_BAP_SW | _PAGE_BAP_SR | _PAGE_DIRTY | _PAGE_BAP_SX)
 56 #define _PAGE_KERNEL_ROX        (_PAGE_BAP_SR | _PAGE_BAP_SX)
 57 #define _PAGE_USER              (_PAGE_BAP_UR | _PAGE_BAP_SR) /* Can be read */
 58 #define _PAGE_PRIVILEGED        (_PAGE_BAP_SR)
 59 
 60 #define _PAGE_SPECIAL   _PAGE_SW0
 61 
 62 /* Base page size */
 63 #define _PAGE_PSIZE     _PAGE_PSIZE_4K
 64 #define PTE_RPN_SHIFT   (24)
 65 
 66 #define PTE_WIMGE_SHIFT (19)
 67 #define PTE_BAP_SHIFT   (2)
 68 
 69 /* On 32-bit, we never clear the top part of the PTE */
 70 #ifdef CONFIG_PPC32
 71 #define _PTE_NONE_MASK  0xffffffff00000000ULL
 72 #define _PMD_PRESENT    0
 73 #define _PMD_PRESENT_MASK (PAGE_MASK)
 74 #define _PMD_BAD        (~PAGE_MASK)
 75 #define _PMD_USER       0
 76 #else
 77 #define _PTE_NONE_MASK  0
 78 #endif
 79 
 80 /*
 81  * We define 2 sets of base prot bits, one for basic pages (ie,
 82  * cacheable kernel and user pages) and one for non cacheable
 83  * pages. We always set _PAGE_COHERENT when SMP is enabled or
 84  * the processor might need it for DMA coherency.
 85  */
 86 #define _PAGE_BASE_NC   (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
 87 #if defined(CONFIG_SMP)
 88 #define _PAGE_BASE      (_PAGE_BASE_NC | _PAGE_COHERENT)
 89 #else
 90 #define _PAGE_BASE      (_PAGE_BASE_NC)
 91 #endif
 92 
 93 /* Permission masks used to generate the __P and __S table */
 94 #define PAGE_NONE       __pgprot(_PAGE_BASE)
 95 #define PAGE_SHARED     __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
 96 #define PAGE_SHARED_X   __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
 97 #define PAGE_COPY       __pgprot(_PAGE_BASE | _PAGE_USER)
 98 #define PAGE_COPY_X     __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
 99 #define PAGE_READONLY   __pgprot(_PAGE_BASE | _PAGE_USER)
100 #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
101 
102 #ifndef __ASSEMBLY__
103 static inline pte_t pte_mkprivileged(pte_t pte)
104 {
105         return __pte((pte_val(pte) & ~_PAGE_USER) | _PAGE_PRIVILEGED);
106 }
107 
108 #define pte_mkprivileged pte_mkprivileged
109 
110 static inline pte_t pte_mkuser(pte_t pte)
111 {
112         return __pte((pte_val(pte) & ~_PAGE_PRIVILEGED) | _PAGE_USER);
113 }
114 
115 #define pte_mkuser pte_mkuser
116 #endif /* __ASSEMBLY__ */
117 
118 #endif /* __KERNEL__ */
119 #endif /*  _ASM_POWERPC_NOHASH_PTE_BOOK3E_H */
120 

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