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TOMOYO Linux Cross Reference
Linux/arch/powerpc/include/asm/ppc-opcode.h

Version: ~ [ linux-5.1-rc2 ] ~ [ linux-5.0.4 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.31 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.108 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.165 ] ~ [ linux-4.8.17 ] ~ [ linux-4.7.10 ] ~ [ linux-4.6.7 ] ~ [ linux-4.5.7 ] ~ [ linux-4.4.177 ] ~ [ linux-4.3.6 ] ~ [ linux-4.2.8 ] ~ [ linux-4.1.52 ] ~ [ linux-4.0.9 ] ~ [ linux-3.19.8 ] ~ [ linux-3.18.137 ] ~ [ linux-3.17.8 ] ~ [ linux-3.16.63 ] ~ [ linux-3.15.10 ] ~ [ linux-3.14.79 ] ~ [ linux-3.13.11 ] ~ [ linux-3.12.74 ] ~ [ linux-3.11.10 ] ~ [ linux-3.10.108 ] ~ [ linux-3.9.11 ] ~ [ linux-3.8.13 ] ~ [ linux-3.7.10 ] ~ [ linux-3.6.11 ] ~ [ linux-3.5.7 ] ~ [ linux-3.4.113 ] ~ [ linux-3.3.8 ] ~ [ linux-3.2.102 ] ~ [ linux-3.1.10 ] ~ [ linux-3.0.101 ] ~ [ linux-2.6.39.4 ] ~ [ linux-2.6.38.8 ] ~ [ linux-2.6.37.6 ] ~ [ linux-2.6.36.4 ] ~ [ linux-2.6.35.14 ] ~ [ linux-2.6.34.15 ] ~ [ linux-2.6.33.20 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.5 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 /*
  2  * Copyright 2009 Freescale Semiconductor, Inc.
  3  *
  4  * This program is free software; you can redistribute it and/or
  5  * modify it under the terms of the GNU General Public License
  6  * as published by the Free Software Foundation; either version
  7  * 2 of the License, or (at your option) any later version.
  8  *
  9  * provides masks and opcode images for use by code generation, emulation
 10  * and for instructions that older assemblers might not know about
 11  */
 12 #ifndef _ASM_POWERPC_PPC_OPCODE_H
 13 #define _ASM_POWERPC_PPC_OPCODE_H
 14 
 15 #include <asm/asm-const.h>
 16 
 17 #define __REG_R0        0
 18 #define __REG_R1        1
 19 #define __REG_R2        2
 20 #define __REG_R3        3
 21 #define __REG_R4        4
 22 #define __REG_R5        5
 23 #define __REG_R6        6
 24 #define __REG_R7        7
 25 #define __REG_R8        8
 26 #define __REG_R9        9
 27 #define __REG_R10       10
 28 #define __REG_R11       11
 29 #define __REG_R12       12
 30 #define __REG_R13       13
 31 #define __REG_R14       14
 32 #define __REG_R15       15
 33 #define __REG_R16       16
 34 #define __REG_R17       17
 35 #define __REG_R18       18
 36 #define __REG_R19       19
 37 #define __REG_R20       20
 38 #define __REG_R21       21
 39 #define __REG_R22       22
 40 #define __REG_R23       23
 41 #define __REG_R24       24
 42 #define __REG_R25       25
 43 #define __REG_R26       26
 44 #define __REG_R27       27
 45 #define __REG_R28       28
 46 #define __REG_R29       29
 47 #define __REG_R30       30
 48 #define __REG_R31       31
 49 
 50 #define __REGA0_0       0
 51 #define __REGA0_R1      1
 52 #define __REGA0_R2      2
 53 #define __REGA0_R3      3
 54 #define __REGA0_R4      4
 55 #define __REGA0_R5      5
 56 #define __REGA0_R6      6
 57 #define __REGA0_R7      7
 58 #define __REGA0_R8      8
 59 #define __REGA0_R9      9
 60 #define __REGA0_R10     10
 61 #define __REGA0_R11     11
 62 #define __REGA0_R12     12
 63 #define __REGA0_R13     13
 64 #define __REGA0_R14     14
 65 #define __REGA0_R15     15
 66 #define __REGA0_R16     16
 67 #define __REGA0_R17     17
 68 #define __REGA0_R18     18
 69 #define __REGA0_R19     19
 70 #define __REGA0_R20     20
 71 #define __REGA0_R21     21
 72 #define __REGA0_R22     22
 73 #define __REGA0_R23     23
 74 #define __REGA0_R24     24
 75 #define __REGA0_R25     25
 76 #define __REGA0_R26     26
 77 #define __REGA0_R27     27
 78 #define __REGA0_R28     28
 79 #define __REGA0_R29     29
 80 #define __REGA0_R30     30
 81 #define __REGA0_R31     31
 82 
 83 /* opcode and xopcode for instructions */
 84 #define OP_TRAP 3
 85 #define OP_TRAP_64 2
 86 
 87 #define OP_31_XOP_TRAP      4
 88 #define OP_31_XOP_LDX       21
 89 #define OP_31_XOP_LWZX      23
 90 #define OP_31_XOP_LDUX      53
 91 #define OP_31_XOP_DCBST     54
 92 #define OP_31_XOP_LWZUX     55
 93 #define OP_31_XOP_TRAP_64   68
 94 #define OP_31_XOP_DCBF      86
 95 #define OP_31_XOP_LBZX      87
 96 #define OP_31_XOP_STDX      149
 97 #define OP_31_XOP_STWX      151
 98 #define OP_31_XOP_STDUX     181
 99 #define OP_31_XOP_STWUX     183
100 #define OP_31_XOP_STBX      215
101 #define OP_31_XOP_LBZUX     119
102 #define OP_31_XOP_STBUX     247
103 #define OP_31_XOP_LHZX      279
104 #define OP_31_XOP_LHZUX     311
105 #define OP_31_XOP_MSGSNDP   142
106 #define OP_31_XOP_MSGCLRP   174
107 #define OP_31_XOP_TLBIE     306
108 #define OP_31_XOP_MFSPR     339
109 #define OP_31_XOP_LWAX      341
110 #define OP_31_XOP_LHAX      343
111 #define OP_31_XOP_LWAUX     373
112 #define OP_31_XOP_LHAUX     375
113 #define OP_31_XOP_STHX      407
114 #define OP_31_XOP_STHUX     439
115 #define OP_31_XOP_MTSPR     467
116 #define OP_31_XOP_DCBI      470
117 #define OP_31_XOP_LDBRX     532
118 #define OP_31_XOP_LWBRX     534
119 #define OP_31_XOP_TLBSYNC   566
120 #define OP_31_XOP_STDBRX    660
121 #define OP_31_XOP_STWBRX    662
122 #define OP_31_XOP_STFSX     663
123 #define OP_31_XOP_STFSUX    695
124 #define OP_31_XOP_STFDX     727
125 #define OP_31_XOP_STFDUX    759
126 #define OP_31_XOP_LHBRX     790
127 #define OP_31_XOP_LFIWAX    855
128 #define OP_31_XOP_LFIWZX    887
129 #define OP_31_XOP_STHBRX    918
130 #define OP_31_XOP_STFIWX    983
131 
132 /* VSX Scalar Load Instructions */
133 #define OP_31_XOP_LXSDX         588
134 #define OP_31_XOP_LXSSPX        524
135 #define OP_31_XOP_LXSIWAX       76
136 #define OP_31_XOP_LXSIWZX       12
137 
138 /* VSX Scalar Store Instructions */
139 #define OP_31_XOP_STXSDX        716
140 #define OP_31_XOP_STXSSPX       652
141 #define OP_31_XOP_STXSIWX       140
142 
143 /* VSX Vector Load Instructions */
144 #define OP_31_XOP_LXVD2X        844
145 #define OP_31_XOP_LXVW4X        780
146 
147 /* VSX Vector Load and Splat Instruction */
148 #define OP_31_XOP_LXVDSX        332
149 
150 /* VSX Vector Store Instructions */
151 #define OP_31_XOP_STXVD2X       972
152 #define OP_31_XOP_STXVW4X       908
153 
154 #define OP_31_XOP_LFSX          535
155 #define OP_31_XOP_LFSUX         567
156 #define OP_31_XOP_LFDX          599
157 #define OP_31_XOP_LFDUX         631
158 
159 /* VMX Vector Load Instructions */
160 #define OP_31_XOP_LVX           103
161 
162 /* VMX Vector Store Instructions */
163 #define OP_31_XOP_STVX          231
164 
165 #define OP_31   31
166 #define OP_LWZ  32
167 #define OP_STFS 52
168 #define OP_STFSU 53
169 #define OP_STFD 54
170 #define OP_STFDU 55
171 #define OP_LD   58
172 #define OP_LWZU 33
173 #define OP_LBZ  34
174 #define OP_LBZU 35
175 #define OP_STW  36
176 #define OP_STWU 37
177 #define OP_STD  62
178 #define OP_STB  38
179 #define OP_STBU 39
180 #define OP_LHZ  40
181 #define OP_LHZU 41
182 #define OP_LHA  42
183 #define OP_LHAU 43
184 #define OP_STH  44
185 #define OP_STHU 45
186 #define OP_LMW  46
187 #define OP_STMW 47
188 #define OP_LFS  48
189 #define OP_LFSU 49
190 #define OP_LFD  50
191 #define OP_LFDU 51
192 #define OP_STFS 52
193 #define OP_STFSU 53
194 #define OP_STFD  54
195 #define OP_STFDU 55
196 #define OP_LQ    56
197 
198 /* sorted alphabetically */
199 #define PPC_INST_BHRBE                  0x7c00025c
200 #define PPC_INST_CLRBHRB                0x7c00035c
201 #define PPC_INST_COPY                   0x7c20060c
202 #define PPC_INST_CP_ABORT               0x7c00068c
203 #define PPC_INST_DARN                   0x7c0005e6
204 #define PPC_INST_DCBA                   0x7c0005ec
205 #define PPC_INST_DCBA_MASK              0xfc0007fe
206 #define PPC_INST_DCBAL                  0x7c2005ec
207 #define PPC_INST_DCBZL                  0x7c2007ec
208 #define PPC_INST_ICBT                   0x7c00002c
209 #define PPC_INST_ICSWX                  0x7c00032d
210 #define PPC_INST_ICSWEPX                0x7c00076d
211 #define PPC_INST_ISEL                   0x7c00001e
212 #define PPC_INST_ISEL_MASK              0xfc00003e
213 #define PPC_INST_LDARX                  0x7c0000a8
214 #define PPC_INST_STDCX                  0x7c0001ad
215 #define PPC_INST_LQARX                  0x7c000228
216 #define PPC_INST_STQCX                  0x7c00016d
217 #define PPC_INST_LSWI                   0x7c0004aa
218 #define PPC_INST_LSWX                   0x7c00042a
219 #define PPC_INST_LWARX                  0x7c000028
220 #define PPC_INST_STWCX                  0x7c00012d
221 #define PPC_INST_LWSYNC                 0x7c2004ac
222 #define PPC_INST_SYNC                   0x7c0004ac
223 #define PPC_INST_SYNC_MASK              0xfc0007fe
224 #define PPC_INST_ISYNC                  0x4c00012c
225 #define PPC_INST_LXVD2X                 0x7c000698
226 #define PPC_INST_MCRXR                  0x7c000400
227 #define PPC_INST_MCRXR_MASK             0xfc0007fe
228 #define PPC_INST_MFSPR_PVR              0x7c1f42a6
229 #define PPC_INST_MFSPR_PVR_MASK         0xfc1ffffe
230 #define PPC_INST_MFTMR                  0x7c0002dc
231 #define PPC_INST_MSGSND                 0x7c00019c
232 #define PPC_INST_MSGCLR                 0x7c0001dc
233 #define PPC_INST_MSGSYNC                0x7c0006ec
234 #define PPC_INST_MSGSNDP                0x7c00011c
235 #define PPC_INST_MSGCLRP                0x7c00015c
236 #define PPC_INST_MTMSRD                 0x7c000164
237 #define PPC_INST_MTTMR                  0x7c0003dc
238 #define PPC_INST_NOP                    0x60000000
239 #define PPC_INST_PASTE                  0x7c20070d
240 #define PPC_INST_POPCNTB                0x7c0000f4
241 #define PPC_INST_POPCNTB_MASK           0xfc0007fe
242 #define PPC_INST_POPCNTD                0x7c0003f4
243 #define PPC_INST_POPCNTW                0x7c0002f4
244 #define PPC_INST_RFEBB                  0x4c000124
245 #define PPC_INST_RFCI                   0x4c000066
246 #define PPC_INST_RFDI                   0x4c00004e
247 #define PPC_INST_RFID                   0x4c000024
248 #define PPC_INST_RFMCI                  0x4c00004c
249 #define PPC_INST_MFSPR                  0x7c0002a6
250 #define PPC_INST_MFSPR_DSCR             0x7c1102a6
251 #define PPC_INST_MFSPR_DSCR_MASK        0xfc1ffffe
252 #define PPC_INST_MTSPR_DSCR             0x7c1103a6
253 #define PPC_INST_MTSPR_DSCR_MASK        0xfc1ffffe
254 #define PPC_INST_MFSPR_DSCR_USER        0x7c0302a6
255 #define PPC_INST_MFSPR_DSCR_USER_MASK   0xfc1ffffe
256 #define PPC_INST_MTSPR_DSCR_USER        0x7c0303a6
257 #define PPC_INST_MTSPR_DSCR_USER_MASK   0xfc1ffffe
258 #define PPC_INST_MFVSRD                 0x7c000066
259 #define PPC_INST_MTVSRD                 0x7c000166
260 #define PPC_INST_SC                     0x44000002
261 #define PPC_INST_SLBFEE                 0x7c0007a7
262 #define PPC_INST_SLBIA                  0x7c0003e4
263 
264 #define PPC_INST_STRING                 0x7c00042a
265 #define PPC_INST_STRING_MASK            0xfc0007fe
266 #define PPC_INST_STRING_GEN_MASK        0xfc00067e
267 
268 #define PPC_INST_STSWI                  0x7c0005aa
269 #define PPC_INST_STSWX                  0x7c00052a
270 #define PPC_INST_STXVD2X                0x7c000798
271 #define PPC_INST_TLBIE                  0x7c000264
272 #define PPC_INST_TLBIEL                 0x7c000224
273 #define PPC_INST_TLBILX                 0x7c000024
274 #define PPC_INST_WAIT                   0x7c00007c
275 #define PPC_INST_TLBIVAX                0x7c000624
276 #define PPC_INST_TLBSRX_DOT             0x7c0006a5
277 #define PPC_INST_VPMSUMW                0x10000488
278 #define PPC_INST_VPMSUMD                0x100004c8
279 #define PPC_INST_VPERMXOR               0x1000002d
280 #define PPC_INST_XXLOR                  0xf0000490
281 #define PPC_INST_XXSWAPD                0xf0000250
282 #define PPC_INST_XVCPSGNDP              0xf0000780
283 #define PPC_INST_TRECHKPT               0x7c0007dd
284 #define PPC_INST_TRECLAIM               0x7c00075d
285 #define PPC_INST_TABORT                 0x7c00071d
286 #define PPC_INST_TSR                    0x7c0005dd
287 
288 #define PPC_INST_NAP                    0x4c000364
289 #define PPC_INST_SLEEP                  0x4c0003a4
290 #define PPC_INST_WINKLE                 0x4c0003e4
291 
292 #define PPC_INST_STOP                   0x4c0002e4
293 
294 /* A2 specific instructions */
295 #define PPC_INST_ERATWE                 0x7c0001a6
296 #define PPC_INST_ERATRE                 0x7c000166
297 #define PPC_INST_ERATILX                0x7c000066
298 #define PPC_INST_ERATIVAX               0x7c000666
299 #define PPC_INST_ERATSX                 0x7c000126
300 #define PPC_INST_ERATSX_DOT             0x7c000127
301 
302 /* Misc instructions for BPF compiler */
303 #define PPC_INST_LBZ                    0x88000000
304 #define PPC_INST_LD                     0xe8000000
305 #define PPC_INST_LHZ                    0xa0000000
306 #define PPC_INST_LWZ                    0x80000000
307 #define PPC_INST_LHBRX                  0x7c00062c
308 #define PPC_INST_LDBRX                  0x7c000428
309 #define PPC_INST_STB                    0x98000000
310 #define PPC_INST_STH                    0xb0000000
311 #define PPC_INST_STD                    0xf8000000
312 #define PPC_INST_STDU                   0xf8000001
313 #define PPC_INST_STW                    0x90000000
314 #define PPC_INST_STWU                   0x94000000
315 #define PPC_INST_MFLR                   0x7c0802a6
316 #define PPC_INST_MTLR                   0x7c0803a6
317 #define PPC_INST_MTCTR                  0x7c0903a6
318 #define PPC_INST_CMPWI                  0x2c000000
319 #define PPC_INST_CMPDI                  0x2c200000
320 #define PPC_INST_CMPW                   0x7c000000
321 #define PPC_INST_CMPD                   0x7c200000
322 #define PPC_INST_CMPLW                  0x7c000040
323 #define PPC_INST_CMPLD                  0x7c200040
324 #define PPC_INST_CMPLWI                 0x28000000
325 #define PPC_INST_CMPLDI                 0x28200000
326 #define PPC_INST_ADDI                   0x38000000
327 #define PPC_INST_ADDIS                  0x3c000000
328 #define PPC_INST_ADD                    0x7c000214
329 #define PPC_INST_ADDC                   0x7c000014
330 #define PPC_INST_SUB                    0x7c000050
331 #define PPC_INST_BLR                    0x4e800020
332 #define PPC_INST_BLRL                   0x4e800021
333 #define PPC_INST_BCTR                   0x4e800420
334 #define PPC_INST_MULLD                  0x7c0001d2
335 #define PPC_INST_MULLW                  0x7c0001d6
336 #define PPC_INST_MULHWU                 0x7c000016
337 #define PPC_INST_MULLI                  0x1c000000
338 #define PPC_INST_MADDHD                 0x10000030
339 #define PPC_INST_MADDHDU                0x10000031
340 #define PPC_INST_MADDLD                 0x10000033
341 #define PPC_INST_DIVWU                  0x7c000396
342 #define PPC_INST_DIVD                   0x7c0003d2
343 #define PPC_INST_RLWINM                 0x54000000
344 #define PPC_INST_RLWINM_DOT             0x54000001
345 #define PPC_INST_RLWIMI                 0x50000000
346 #define PPC_INST_RLDICL                 0x78000000
347 #define PPC_INST_RLDICR                 0x78000004
348 #define PPC_INST_SLW                    0x7c000030
349 #define PPC_INST_SLD                    0x7c000036
350 #define PPC_INST_SRW                    0x7c000430
351 #define PPC_INST_SRAW                   0x7c000630
352 #define PPC_INST_SRAWI                  0x7c000670
353 #define PPC_INST_SRD                    0x7c000436
354 #define PPC_INST_SRAD                   0x7c000634
355 #define PPC_INST_SRADI                  0x7c000674
356 #define PPC_INST_AND                    0x7c000038
357 #define PPC_INST_ANDDOT                 0x7c000039
358 #define PPC_INST_OR                     0x7c000378
359 #define PPC_INST_XOR                    0x7c000278
360 #define PPC_INST_ANDI                   0x70000000
361 #define PPC_INST_ORI                    0x60000000
362 #define PPC_INST_ORIS                   0x64000000
363 #define PPC_INST_XORI                   0x68000000
364 #define PPC_INST_XORIS                  0x6c000000
365 #define PPC_INST_NEG                    0x7c0000d0
366 #define PPC_INST_EXTSW                  0x7c0007b4
367 #define PPC_INST_BRANCH                 0x48000000
368 #define PPC_INST_BRANCH_COND            0x40800000
369 #define PPC_INST_LBZCIX                 0x7c0006aa
370 #define PPC_INST_STBCIX                 0x7c0007aa
371 #define PPC_INST_LWZX                   0x7c00002e
372 #define PPC_INST_LFSX                   0x7c00042e
373 #define PPC_INST_STFSX                  0x7c00052e
374 #define PPC_INST_LFDX                   0x7c0004ae
375 #define PPC_INST_STFDX                  0x7c0005ae
376 #define PPC_INST_LVX                    0x7c0000ce
377 #define PPC_INST_STVX                   0x7c0001ce
378 #define PPC_INST_VCMPEQUD               0x100000c7
379 #define PPC_INST_VCMPEQUB               0x10000006
380 
381 /* macros to insert fields into opcodes */
382 #define ___PPC_RA(a)    (((a) & 0x1f) << 16)
383 #define ___PPC_RB(b)    (((b) & 0x1f) << 11)
384 #define ___PPC_RC(c)    (((c) & 0x1f) << 6)
385 #define ___PPC_RS(s)    (((s) & 0x1f) << 21)
386 #define ___PPC_RT(t)    ___PPC_RS(t)
387 #define ___PPC_R(r)     (((r) & 0x1) << 16)
388 #define ___PPC_PRS(prs) (((prs) & 0x1) << 17)
389 #define ___PPC_RIC(ric) (((ric) & 0x3) << 18)
390 #define __PPC_RA(a)     ___PPC_RA(__REG_##a)
391 #define __PPC_RA0(a)    ___PPC_RA(__REGA0_##a)
392 #define __PPC_RB(b)     ___PPC_RB(__REG_##b)
393 #define __PPC_RS(s)     ___PPC_RS(__REG_##s)
394 #define __PPC_RT(t)     ___PPC_RT(__REG_##t)
395 #define __PPC_XA(a)     ((((a) & 0x1f) << 16) | (((a) & 0x20) >> 3))
396 #define __PPC_XB(b)     ((((b) & 0x1f) << 11) | (((b) & 0x20) >> 4))
397 #define __PPC_XS(s)     ((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5))
398 #define __PPC_XT(s)     __PPC_XS(s)
399 #define __PPC_T_TLB(t)  (((t) & 0x3) << 21)
400 #define __PPC_WC(w)     (((w) & 0x3) << 21)
401 #define __PPC_WS(w)     (((w) & 0x1f) << 11)
402 #define __PPC_SH(s)     __PPC_WS(s)
403 #define __PPC_SH64(s)   (__PPC_SH(s) | (((s) & 0x20) >> 4))
404 #define __PPC_MB(s)     ___PPC_RC(s)
405 #define __PPC_ME(s)     (((s) & 0x1f) << 1)
406 #define __PPC_MB64(s)   (__PPC_MB(s) | ((s) & 0x20))
407 #define __PPC_ME64(s)   __PPC_MB64(s)
408 #define __PPC_BI(s)     (((s) & 0x1f) << 16)
409 #define __PPC_CT(t)     (((t) & 0x0f) << 21)
410 #define __PPC_SPR(r)    ((((r) & 0x1f) << 16) | ((((r) >> 5) & 0x1f) << 11))
411 #define __PPC_RC21      (0x1 << 10)
412 
413 /*
414  * Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a
415  * larx with EH set as an illegal instruction.
416  */
417 #ifdef CONFIG_PPC64
418 #define __PPC_EH(eh)    (((eh) & 0x1) << 0)
419 #else
420 #define __PPC_EH(eh)    0
421 #endif
422 
423 /* Deal with instructions that older assemblers aren't aware of */
424 #define PPC_CP_ABORT            stringify_in_c(.long PPC_INST_CP_ABORT)
425 #define PPC_COPY(a, b)          stringify_in_c(.long PPC_INST_COPY | \
426                                         ___PPC_RA(a) | ___PPC_RB(b))
427 #define PPC_DARN(t, l)          stringify_in_c(.long PPC_INST_DARN |  \
428                                                 ___PPC_RT(t)       |  \
429                                                 (((l) & 0x3) << 16))
430 #define PPC_DCBAL(a, b)         stringify_in_c(.long PPC_INST_DCBAL | \
431                                         __PPC_RA(a) | __PPC_RB(b))
432 #define PPC_DCBZL(a, b)         stringify_in_c(.long PPC_INST_DCBZL | \
433                                         __PPC_RA(a) | __PPC_RB(b))
434 #define PPC_LQARX(t, a, b, eh)  stringify_in_c(.long PPC_INST_LQARX | \
435                                         ___PPC_RT(t) | ___PPC_RA(a) | \
436                                         ___PPC_RB(b) | __PPC_EH(eh))
437 #define PPC_LDARX(t, a, b, eh)  stringify_in_c(.long PPC_INST_LDARX | \
438                                         ___PPC_RT(t) | ___PPC_RA(a) | \
439                                         ___PPC_RB(b) | __PPC_EH(eh))
440 #define PPC_LWARX(t, a, b, eh)  stringify_in_c(.long PPC_INST_LWARX | \
441                                         ___PPC_RT(t) | ___PPC_RA(a) | \
442                                         ___PPC_RB(b) | __PPC_EH(eh))
443 #define PPC_STQCX(t, a, b)      stringify_in_c(.long PPC_INST_STQCX | \
444                                         ___PPC_RT(t) | ___PPC_RA(a) | \
445                                         ___PPC_RB(b))
446 #define PPC_MADDHD(t, a, b, c)  stringify_in_c(.long PPC_INST_MADDHD | \
447                                         ___PPC_RT(t) | ___PPC_RA(a)  | \
448                                         ___PPC_RB(b) | ___PPC_RC(c))
449 #define PPC_MADDHDU(t, a, b, c) stringify_in_c(.long PPC_INST_MADDHDU | \
450                                         ___PPC_RT(t) | ___PPC_RA(a)   | \
451                                         ___PPC_RB(b) | ___PPC_RC(c))
452 #define PPC_MADDLD(t, a, b, c)  stringify_in_c(.long PPC_INST_MADDLD | \
453                                         ___PPC_RT(t) | ___PPC_RA(a)  | \
454                                         ___PPC_RB(b) | ___PPC_RC(c))
455 #define PPC_MSGSND(b)           stringify_in_c(.long PPC_INST_MSGSND | \
456                                         ___PPC_RB(b))
457 #define PPC_MSGSYNC             stringify_in_c(.long PPC_INST_MSGSYNC)
458 #define PPC_MSGCLR(b)           stringify_in_c(.long PPC_INST_MSGCLR | \
459                                         ___PPC_RB(b))
460 #define PPC_MSGSNDP(b)          stringify_in_c(.long PPC_INST_MSGSNDP | \
461                                         ___PPC_RB(b))
462 #define PPC_MSGCLRP(b)          stringify_in_c(.long PPC_INST_MSGCLRP | \
463                                         ___PPC_RB(b))
464 #define PPC_PASTE(a, b)         stringify_in_c(.long PPC_INST_PASTE | \
465                                         ___PPC_RA(a) | ___PPC_RB(b))
466 #define PPC_POPCNTB(a, s)       stringify_in_c(.long PPC_INST_POPCNTB | \
467                                         __PPC_RA(a) | __PPC_RS(s))
468 #define PPC_POPCNTD(a, s)       stringify_in_c(.long PPC_INST_POPCNTD | \
469                                         __PPC_RA(a) | __PPC_RS(s))
470 #define PPC_POPCNTW(a, s)       stringify_in_c(.long PPC_INST_POPCNTW | \
471                                         __PPC_RA(a) | __PPC_RS(s))
472 #define PPC_RFCI                stringify_in_c(.long PPC_INST_RFCI)
473 #define PPC_RFDI                stringify_in_c(.long PPC_INST_RFDI)
474 #define PPC_RFMCI               stringify_in_c(.long PPC_INST_RFMCI)
475 #define PPC_TLBILX(t, a, b)     stringify_in_c(.long PPC_INST_TLBILX | \
476                                         __PPC_T_TLB(t) | __PPC_RA0(a) | __PPC_RB(b))
477 #define PPC_TLBILX_ALL(a, b)    PPC_TLBILX(0, a, b)
478 #define PPC_TLBILX_PID(a, b)    PPC_TLBILX(1, a, b)
479 #define PPC_TLBILX_VA(a, b)     PPC_TLBILX(3, a, b)
480 #define PPC_WAIT(w)             stringify_in_c(.long PPC_INST_WAIT | \
481                                         __PPC_WC(w))
482 #define PPC_TLBIE(lp,a)         stringify_in_c(.long PPC_INST_TLBIE | \
483                                                ___PPC_RB(a) | ___PPC_RS(lp))
484 #define PPC_TLBIE_5(rb,rs,ric,prs,r) \
485                                 stringify_in_c(.long PPC_INST_TLBIE | \
486                                         ___PPC_RB(rb) | ___PPC_RS(rs) | \
487                                         ___PPC_RIC(ric) | ___PPC_PRS(prs) | \
488                                         ___PPC_R(r))
489 #define PPC_TLBIEL(rb,rs,ric,prs,r) \
490                                 stringify_in_c(.long PPC_INST_TLBIEL | \
491                                         ___PPC_RB(rb) | ___PPC_RS(rs) | \
492                                         ___PPC_RIC(ric) | ___PPC_PRS(prs) | \
493                                         ___PPC_R(r))
494 #define PPC_TLBSRX_DOT(a,b)     stringify_in_c(.long PPC_INST_TLBSRX_DOT | \
495                                         __PPC_RA0(a) | __PPC_RB(b))
496 #define PPC_TLBIVAX(a,b)        stringify_in_c(.long PPC_INST_TLBIVAX | \
497                                         __PPC_RA0(a) | __PPC_RB(b))
498 
499 #define PPC_ERATWE(s, a, w)     stringify_in_c(.long PPC_INST_ERATWE | \
500                                         __PPC_RS(s) | __PPC_RA(a) | __PPC_WS(w))
501 #define PPC_ERATRE(s, a, w)     stringify_in_c(.long PPC_INST_ERATRE | \
502                                         __PPC_RS(s) | __PPC_RA(a) | __PPC_WS(w))
503 #define PPC_ERATILX(t, a, b)    stringify_in_c(.long PPC_INST_ERATILX | \
504                                         __PPC_T_TLB(t) | __PPC_RA0(a) | \
505                                         __PPC_RB(b))
506 #define PPC_ERATIVAX(s, a, b)   stringify_in_c(.long PPC_INST_ERATIVAX | \
507                                         __PPC_RS(s) | __PPC_RA0(a) | __PPC_RB(b))
508 #define PPC_ERATSX(t, a, w)     stringify_in_c(.long PPC_INST_ERATSX | \
509                                         __PPC_RS(t) | __PPC_RA0(a) | __PPC_RB(b))
510 #define PPC_ERATSX_DOT(t, a, w) stringify_in_c(.long PPC_INST_ERATSX_DOT | \
511                                         __PPC_RS(t) | __PPC_RA0(a) | __PPC_RB(b))
512 #define PPC_SLBFEE_DOT(t, b)    stringify_in_c(.long PPC_INST_SLBFEE | \
513                                         __PPC_RT(t) | __PPC_RB(b))
514 #define __PPC_SLBFEE_DOT(t, b)  stringify_in_c(.long PPC_INST_SLBFEE |  \
515                                                ___PPC_RT(t) | ___PPC_RB(b))
516 #define PPC_ICBT(c,a,b)         stringify_in_c(.long PPC_INST_ICBT | \
517                                        __PPC_CT(c) | __PPC_RA0(a) | __PPC_RB(b))
518 /* PASemi instructions */
519 #define LBZCIX(t,a,b)           stringify_in_c(.long PPC_INST_LBZCIX | \
520                                        __PPC_RT(t) | __PPC_RA(a) | __PPC_RB(b))
521 #define STBCIX(s,a,b)           stringify_in_c(.long PPC_INST_STBCIX | \
522                                        __PPC_RS(s) | __PPC_RA(a) | __PPC_RB(b))
523 
524 /*
525  * Define what the VSX XX1 form instructions will look like, then add
526  * the 128 bit load store instructions based on that.
527  */
528 #define VSX_XX1(s, a, b)        (__PPC_XS(s) | __PPC_RA(a) | __PPC_RB(b))
529 #define VSX_XX3(t, a, b)        (__PPC_XT(t) | __PPC_XA(a) | __PPC_XB(b))
530 #define STXVD2X(s, a, b)        stringify_in_c(.long PPC_INST_STXVD2X | \
531                                                VSX_XX1((s), a, b))
532 #define LXVD2X(s, a, b)         stringify_in_c(.long PPC_INST_LXVD2X | \
533                                                VSX_XX1((s), a, b))
534 #define MFVRD(a, t)             stringify_in_c(.long PPC_INST_MFVSRD | \
535                                                VSX_XX1((t)+32, a, R0))
536 #define MTVRD(t, a)             stringify_in_c(.long PPC_INST_MTVSRD | \
537                                                VSX_XX1((t)+32, a, R0))
538 #define VPMSUMW(t, a, b)        stringify_in_c(.long PPC_INST_VPMSUMW | \
539                                                VSX_XX3((t), a, b))
540 #define VPMSUMD(t, a, b)        stringify_in_c(.long PPC_INST_VPMSUMD | \
541                                                VSX_XX3((t), a, b))
542 #define XXLOR(t, a, b)          stringify_in_c(.long PPC_INST_XXLOR | \
543                                                VSX_XX3((t), a, b))
544 #define XXSWAPD(t, a)           stringify_in_c(.long PPC_INST_XXSWAPD | \
545                                                VSX_XX3((t), a, a))
546 #define XVCPSGNDP(t, a, b)      stringify_in_c(.long (PPC_INST_XVCPSGNDP | \
547                                                VSX_XX3((t), (a), (b))))
548 
549 #define VPERMXOR(vrt, vra, vrb, vrc)                            \
550         stringify_in_c(.long (PPC_INST_VPERMXOR |               \
551                               ___PPC_RT(vrt) | ___PPC_RA(vra) | \
552                               ___PPC_RB(vrb) | (((vrc) & 0x1f) << 6)))
553 
554 #define PPC_NAP                 stringify_in_c(.long PPC_INST_NAP)
555 #define PPC_SLEEP               stringify_in_c(.long PPC_INST_SLEEP)
556 #define PPC_WINKLE              stringify_in_c(.long PPC_INST_WINKLE)
557 
558 #define PPC_STOP                stringify_in_c(.long PPC_INST_STOP)
559 
560 /* BHRB instructions */
561 #define PPC_CLRBHRB             stringify_in_c(.long PPC_INST_CLRBHRB)
562 #define PPC_MFBHRBE(r, n)       stringify_in_c(.long PPC_INST_BHRBE | \
563                                                 __PPC_RT(r) | \
564                                                         (((n) & 0x3ff) << 11))
565 
566 /* Transactional memory instructions */
567 #define TRECHKPT                stringify_in_c(.long PPC_INST_TRECHKPT)
568 #define TRECLAIM(r)             stringify_in_c(.long PPC_INST_TRECLAIM \
569                                                | __PPC_RA(r))
570 #define TABORT(r)               stringify_in_c(.long PPC_INST_TABORT \
571                                                | __PPC_RA(r))
572 
573 /* book3e thread control instructions */
574 #define TMRN(x)                 ((((x) & 0x1f) << 16) | (((x) & 0x3e0) << 6))
575 #define MTTMR(tmr, r)           stringify_in_c(.long PPC_INST_MTTMR | \
576                                                TMRN(tmr) | ___PPC_RS(r))
577 #define MFTMR(tmr, r)           stringify_in_c(.long PPC_INST_MFTMR | \
578                                                TMRN(tmr) | ___PPC_RT(r))
579 
580 /* Coprocessor instructions */
581 #define PPC_ICSWX(s, a, b)      stringify_in_c(.long PPC_INST_ICSWX |   \
582                                                ___PPC_RS(s) |           \
583                                                ___PPC_RA(a) |           \
584                                                ___PPC_RB(b))
585 #define PPC_ICSWEPX(s, a, b)    stringify_in_c(.long PPC_INST_ICSWEPX | \
586                                                ___PPC_RS(s) |           \
587                                                ___PPC_RA(a) |           \
588                                                ___PPC_RB(b))
589 
590 #define PPC_SLBIA(IH)   stringify_in_c(.long PPC_INST_SLBIA | \
591                                        ((IH & 0x7) << 21))
592 #define PPC_INVALIDATE_ERAT     PPC_SLBIA(7)
593 
594 #define VCMPEQUD_RC(vrt, vra, vrb)      stringify_in_c(.long PPC_INST_VCMPEQUD | \
595                               ___PPC_RT(vrt) | ___PPC_RA(vra) | \
596                               ___PPC_RB(vrb) | __PPC_RC21)
597 
598 #define VCMPEQUB_RC(vrt, vra, vrb)      stringify_in_c(.long PPC_INST_VCMPEQUB | \
599                               ___PPC_RT(vrt) | ___PPC_RA(vra) | \
600                               ___PPC_RB(vrb) | __PPC_RC21)
601 
602 #endif /* _ASM_POWERPC_PPC_OPCODE_H */
603 

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