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Linux/arch/powerpc/kernel/eeh.c

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  1 /*
  2  * Copyright IBM Corporation 2001, 2005, 2006
  3  * Copyright Dave Engebretsen & Todd Inglett 2001
  4  * Copyright Linas Vepstas 2005, 2006
  5  * Copyright 2001-2012 IBM Corporation.
  6  *
  7  * This program is free software; you can redistribute it and/or modify
  8  * it under the terms of the GNU General Public License as published by
  9  * the Free Software Foundation; either version 2 of the License, or
 10  * (at your option) any later version.
 11  *
 12  * This program is distributed in the hope that it will be useful,
 13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 15  * GNU General Public License for more details.
 16  *
 17  * You should have received a copy of the GNU General Public License
 18  * along with this program; if not, write to the Free Software
 19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 20  *
 21  * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
 22  */
 23 
 24 #include <linux/delay.h>
 25 #include <linux/sched.h>
 26 #include <linux/init.h>
 27 #include <linux/list.h>
 28 #include <linux/pci.h>
 29 #include <linux/proc_fs.h>
 30 #include <linux/rbtree.h>
 31 #include <linux/reboot.h>
 32 #include <linux/seq_file.h>
 33 #include <linux/spinlock.h>
 34 #include <linux/export.h>
 35 #include <linux/of.h>
 36 
 37 #include <linux/atomic.h>
 38 #include <asm/eeh.h>
 39 #include <asm/eeh_event.h>
 40 #include <asm/io.h>
 41 #include <asm/machdep.h>
 42 #include <asm/ppc-pci.h>
 43 #include <asm/rtas.h>
 44 
 45 
 46 /** Overview:
 47  *  EEH, or "Extended Error Handling" is a PCI bridge technology for
 48  *  dealing with PCI bus errors that can't be dealt with within the
 49  *  usual PCI framework, except by check-stopping the CPU.  Systems
 50  *  that are designed for high-availability/reliability cannot afford
 51  *  to crash due to a "mere" PCI error, thus the need for EEH.
 52  *  An EEH-capable bridge operates by converting a detected error
 53  *  into a "slot freeze", taking the PCI adapter off-line, making
 54  *  the slot behave, from the OS'es point of view, as if the slot
 55  *  were "empty": all reads return 0xff's and all writes are silently
 56  *  ignored.  EEH slot isolation events can be triggered by parity
 57  *  errors on the address or data busses (e.g. during posted writes),
 58  *  which in turn might be caused by low voltage on the bus, dust,
 59  *  vibration, humidity, radioactivity or plain-old failed hardware.
 60  *
 61  *  Note, however, that one of the leading causes of EEH slot
 62  *  freeze events are buggy device drivers, buggy device microcode,
 63  *  or buggy device hardware.  This is because any attempt by the
 64  *  device to bus-master data to a memory address that is not
 65  *  assigned to the device will trigger a slot freeze.   (The idea
 66  *  is to prevent devices-gone-wild from corrupting system memory).
 67  *  Buggy hardware/drivers will have a miserable time co-existing
 68  *  with EEH.
 69  *
 70  *  Ideally, a PCI device driver, when suspecting that an isolation
 71  *  event has occurred (e.g. by reading 0xff's), will then ask EEH
 72  *  whether this is the case, and then take appropriate steps to
 73  *  reset the PCI slot, the PCI device, and then resume operations.
 74  *  However, until that day,  the checking is done here, with the
 75  *  eeh_check_failure() routine embedded in the MMIO macros.  If
 76  *  the slot is found to be isolated, an "EEH Event" is synthesized
 77  *  and sent out for processing.
 78  */
 79 
 80 /* If a device driver keeps reading an MMIO register in an interrupt
 81  * handler after a slot isolation event, it might be broken.
 82  * This sets the threshold for how many read attempts we allow
 83  * before printing an error message.
 84  */
 85 #define EEH_MAX_FAILS   2100000
 86 
 87 /* Time to wait for a PCI slot to report status, in milliseconds */
 88 #define PCI_BUS_RESET_WAIT_MSEC (5*60*1000)
 89 
 90 /* Platform dependent EEH operations */
 91 struct eeh_ops *eeh_ops = NULL;
 92 
 93 bool eeh_subsystem_enabled = false;
 94 EXPORT_SYMBOL(eeh_subsystem_enabled);
 95 
 96 /*
 97  * EEH probe mode support. The intention is to support multiple
 98  * platforms for EEH. Some platforms like pSeries do PCI emunation
 99  * based on device tree. However, other platforms like powernv probe
100  * PCI devices from hardware. The flag is used to distinguish that.
101  * In addition, struct eeh_ops::probe would be invoked for particular
102  * OF node or PCI device so that the corresponding PE would be created
103  * there.
104  */
105 int eeh_probe_mode;
106 
107 /* Lock to avoid races due to multiple reports of an error */
108 DEFINE_RAW_SPINLOCK(confirm_error_lock);
109 
110 /* Buffer for reporting pci register dumps. Its here in BSS, and
111  * not dynamically alloced, so that it ends up in RMO where RTAS
112  * can access it.
113  */
114 #define EEH_PCI_REGS_LOG_LEN 4096
115 static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN];
116 
117 /*
118  * The struct is used to maintain the EEH global statistic
119  * information. Besides, the EEH global statistics will be
120  * exported to user space through procfs
121  */
122 struct eeh_stats {
123         u64 no_device;          /* PCI device not found         */
124         u64 no_dn;              /* OF node not found            */
125         u64 no_cfg_addr;        /* Config address not found     */
126         u64 ignored_check;      /* EEH check skipped            */
127         u64 total_mmio_ffs;     /* Total EEH checks             */
128         u64 false_positives;    /* Unnecessary EEH checks       */
129         u64 slot_resets;        /* PE reset                     */
130 };
131 
132 static struct eeh_stats eeh_stats;
133 
134 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
135 
136 /**
137  * eeh_gather_pci_data - Copy assorted PCI config space registers to buff
138  * @edev: device to report data for
139  * @buf: point to buffer in which to log
140  * @len: amount of room in buffer
141  *
142  * This routine captures assorted PCI configuration space data,
143  * and puts them into a buffer for RTAS error logging.
144  */
145 static size_t eeh_gather_pci_data(struct eeh_dev *edev, char * buf, size_t len)
146 {
147         struct device_node *dn = eeh_dev_to_of_node(edev);
148         struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
149         u32 cfg;
150         int cap, i;
151         int n = 0;
152 
153         n += scnprintf(buf+n, len-n, "%s\n", dn->full_name);
154         printk(KERN_WARNING "EEH: of node=%s\n", dn->full_name);
155 
156         eeh_ops->read_config(dn, PCI_VENDOR_ID, 4, &cfg);
157         n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg);
158         printk(KERN_WARNING "EEH: PCI device/vendor: %08x\n", cfg);
159 
160         eeh_ops->read_config(dn, PCI_COMMAND, 4, &cfg);
161         n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg);
162         printk(KERN_WARNING "EEH: PCI cmd/status register: %08x\n", cfg);
163 
164         if (!dev) {
165                 printk(KERN_WARNING "EEH: no PCI device for this of node\n");
166                 return n;
167         }
168 
169         /* Gather bridge-specific registers */
170         if (dev->class >> 16 == PCI_BASE_CLASS_BRIDGE) {
171                 eeh_ops->read_config(dn, PCI_SEC_STATUS, 2, &cfg);
172                 n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg);
173                 printk(KERN_WARNING "EEH: Bridge secondary status: %04x\n", cfg);
174 
175                 eeh_ops->read_config(dn, PCI_BRIDGE_CONTROL, 2, &cfg);
176                 n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg);
177                 printk(KERN_WARNING "EEH: Bridge control: %04x\n", cfg);
178         }
179 
180         /* Dump out the PCI-X command and status regs */
181         cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
182         if (cap) {
183                 eeh_ops->read_config(dn, cap, 4, &cfg);
184                 n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg);
185                 printk(KERN_WARNING "EEH: PCI-X cmd: %08x\n", cfg);
186 
187                 eeh_ops->read_config(dn, cap+4, 4, &cfg);
188                 n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg);
189                 printk(KERN_WARNING "EEH: PCI-X status: %08x\n", cfg);
190         }
191 
192         /* If PCI-E capable, dump PCI-E cap 10, and the AER */
193         if (pci_is_pcie(dev)) {
194                 n += scnprintf(buf+n, len-n, "pci-e cap10:\n");
195                 printk(KERN_WARNING
196                        "EEH: PCI-E capabilities and status follow:\n");
197 
198                 for (i=0; i<=8; i++) {
199                         eeh_ops->read_config(dn, dev->pcie_cap+4*i, 4, &cfg);
200                         n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
201                         printk(KERN_WARNING "EEH: PCI-E %02x: %08x\n", i, cfg);
202                 }
203 
204                 cap = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
205                 if (cap) {
206                         n += scnprintf(buf+n, len-n, "pci-e AER:\n");
207                         printk(KERN_WARNING
208                                "EEH: PCI-E AER capability register set follows:\n");
209 
210                         for (i=0; i<14; i++) {
211                                 eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
212                                 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
213                                 printk(KERN_WARNING "EEH: PCI-E AER %02x: %08x\n", i, cfg);
214                         }
215                 }
216         }
217 
218         return n;
219 }
220 
221 /**
222  * eeh_slot_error_detail - Generate combined log including driver log and error log
223  * @pe: EEH PE
224  * @severity: temporary or permanent error log
225  *
226  * This routine should be called to generate the combined log, which
227  * is comprised of driver log and error log. The driver log is figured
228  * out from the config space of the corresponding PCI device, while
229  * the error log is fetched through platform dependent function call.
230  */
231 void eeh_slot_error_detail(struct eeh_pe *pe, int severity)
232 {
233         size_t loglen = 0;
234         struct eeh_dev *edev, *tmp;
235         bool valid_cfg_log = true;
236 
237         /*
238          * When the PHB is fenced or dead, it's pointless to collect
239          * the data from PCI config space because it should return
240          * 0xFF's. For ER, we still retrieve the data from the PCI
241          * config space.
242          */
243         if (eeh_probe_mode_dev() &&
244             (pe->type & EEH_PE_PHB) &&
245             (pe->state & (EEH_PE_ISOLATED | EEH_PE_PHB_DEAD)))
246                 valid_cfg_log = false;
247 
248         if (valid_cfg_log) {
249                 eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
250                 eeh_ops->configure_bridge(pe);
251                 eeh_pe_restore_bars(pe);
252 
253                 pci_regs_buf[0] = 0;
254                 eeh_pe_for_each_dev(pe, edev, tmp) {
255                         loglen += eeh_gather_pci_data(edev, pci_regs_buf + loglen,
256                                                       EEH_PCI_REGS_LOG_LEN - loglen);
257                 }
258         }
259 
260         eeh_ops->get_log(pe, severity, pci_regs_buf, loglen);
261 }
262 
263 /**
264  * eeh_token_to_phys - Convert EEH address token to phys address
265  * @token: I/O token, should be address in the form 0xA....
266  *
267  * This routine should be called to convert virtual I/O address
268  * to physical one.
269  */
270 static inline unsigned long eeh_token_to_phys(unsigned long token)
271 {
272         pte_t *ptep;
273         unsigned long pa;
274         int hugepage_shift;
275 
276         /*
277          * We won't find hugepages here, iomem
278          */
279         ptep = find_linux_pte_or_hugepte(init_mm.pgd, token, &hugepage_shift);
280         if (!ptep)
281                 return token;
282         WARN_ON(hugepage_shift);
283         pa = pte_pfn(*ptep) << PAGE_SHIFT;
284 
285         return pa | (token & (PAGE_SIZE-1));
286 }
287 
288 /*
289  * On PowerNV platform, we might already have fenced PHB there.
290  * For that case, it's meaningless to recover frozen PE. Intead,
291  * We have to handle fenced PHB firstly.
292  */
293 static int eeh_phb_check_failure(struct eeh_pe *pe)
294 {
295         struct eeh_pe *phb_pe;
296         unsigned long flags;
297         int ret;
298 
299         if (!eeh_probe_mode_dev())
300                 return -EPERM;
301 
302         /* Find the PHB PE */
303         phb_pe = eeh_phb_pe_get(pe->phb);
304         if (!phb_pe) {
305                 pr_warning("%s Can't find PE for PHB#%d\n",
306                            __func__, pe->phb->global_number);
307                 return -EEXIST;
308         }
309 
310         /* If the PHB has been in problematic state */
311         eeh_serialize_lock(&flags);
312         if (phb_pe->state & (EEH_PE_ISOLATED | EEH_PE_PHB_DEAD)) {
313                 ret = 0;
314                 goto out;
315         }
316 
317         /* Check PHB state */
318         ret = eeh_ops->get_state(phb_pe, NULL);
319         if ((ret < 0) ||
320             (ret == EEH_STATE_NOT_SUPPORT) ||
321             (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
322             (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
323                 ret = 0;
324                 goto out;
325         }
326 
327         /* Isolate the PHB and send event */
328         eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED);
329         eeh_serialize_unlock(flags);
330 
331         pr_err("EEH: PHB#%x failure detected\n",
332                 phb_pe->phb->global_number);
333         dump_stack();
334         eeh_send_failure_event(phb_pe);
335 
336         return 1;
337 out:
338         eeh_serialize_unlock(flags);
339         return ret;
340 }
341 
342 /**
343  * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze
344  * @edev: eeh device
345  *
346  * Check for an EEH failure for the given device node.  Call this
347  * routine if the result of a read was all 0xff's and you want to
348  * find out if this is due to an EEH slot freeze.  This routine
349  * will query firmware for the EEH status.
350  *
351  * Returns 0 if there has not been an EEH error; otherwise returns
352  * a non-zero value and queues up a slot isolation event notification.
353  *
354  * It is safe to call this routine in an interrupt context.
355  */
356 int eeh_dev_check_failure(struct eeh_dev *edev)
357 {
358         int ret;
359         unsigned long flags;
360         struct device_node *dn;
361         struct pci_dev *dev;
362         struct eeh_pe *pe;
363         int rc = 0;
364         const char *location;
365 
366         eeh_stats.total_mmio_ffs++;
367 
368         if (!eeh_enabled())
369                 return 0;
370 
371         if (!edev) {
372                 eeh_stats.no_dn++;
373                 return 0;
374         }
375         dn = eeh_dev_to_of_node(edev);
376         dev = eeh_dev_to_pci_dev(edev);
377         pe = edev->pe;
378 
379         /* Access to IO BARs might get this far and still not want checking. */
380         if (!pe) {
381                 eeh_stats.ignored_check++;
382                 pr_debug("EEH: Ignored check for %s %s\n",
383                         eeh_pci_name(dev), dn->full_name);
384                 return 0;
385         }
386 
387         if (!pe->addr && !pe->config_addr) {
388                 eeh_stats.no_cfg_addr++;
389                 return 0;
390         }
391 
392         /*
393          * On PowerNV platform, we might already have fenced PHB
394          * there and we need take care of that firstly.
395          */
396         ret = eeh_phb_check_failure(pe);
397         if (ret > 0)
398                 return ret;
399 
400         /* If we already have a pending isolation event for this
401          * slot, we know it's bad already, we don't need to check.
402          * Do this checking under a lock; as multiple PCI devices
403          * in one slot might report errors simultaneously, and we
404          * only want one error recovery routine running.
405          */
406         eeh_serialize_lock(&flags);
407         rc = 1;
408         if (pe->state & EEH_PE_ISOLATED) {
409                 pe->check_count++;
410                 if (pe->check_count % EEH_MAX_FAILS == 0) {
411                         location = of_get_property(dn, "ibm,loc-code", NULL);
412                         printk(KERN_ERR "EEH: %d reads ignored for recovering device at "
413                                 "location=%s driver=%s pci addr=%s\n",
414                                 pe->check_count, location,
415                                 eeh_driver_name(dev), eeh_pci_name(dev));
416                         printk(KERN_ERR "EEH: Might be infinite loop in %s driver\n",
417                                 eeh_driver_name(dev));
418                         dump_stack();
419                 }
420                 goto dn_unlock;
421         }
422 
423         /*
424          * Now test for an EEH failure.  This is VERY expensive.
425          * Note that the eeh_config_addr may be a parent device
426          * in the case of a device behind a bridge, or it may be
427          * function zero of a multi-function device.
428          * In any case they must share a common PHB.
429          */
430         ret = eeh_ops->get_state(pe, NULL);
431 
432         /* Note that config-io to empty slots may fail;
433          * they are empty when they don't have children.
434          * We will punt with the following conditions: Failure to get
435          * PE's state, EEH not support and Permanently unavailable
436          * state, PE is in good state.
437          */
438         if ((ret < 0) ||
439             (ret == EEH_STATE_NOT_SUPPORT) ||
440             (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
441             (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
442                 eeh_stats.false_positives++;
443                 pe->false_positives++;
444                 rc = 0;
445                 goto dn_unlock;
446         }
447 
448         eeh_stats.slot_resets++;
449 
450         /* Avoid repeated reports of this failure, including problems
451          * with other functions on this device, and functions under
452          * bridges.
453          */
454         eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
455         eeh_serialize_unlock(flags);
456 
457         /* Most EEH events are due to device driver bugs.  Having
458          * a stack trace will help the device-driver authors figure
459          * out what happened.  So print that out.
460          */
461         pr_err("EEH: Frozen PE#%x detected on PHB#%x\n",
462                 pe->addr, pe->phb->global_number);
463         dump_stack();
464 
465         eeh_send_failure_event(pe);
466 
467         return 1;
468 
469 dn_unlock:
470         eeh_serialize_unlock(flags);
471         return rc;
472 }
473 
474 EXPORT_SYMBOL_GPL(eeh_dev_check_failure);
475 
476 /**
477  * eeh_check_failure - Check if all 1's data is due to EEH slot freeze
478  * @token: I/O token, should be address in the form 0xA....
479  * @val: value, should be all 1's (XXX why do we need this arg??)
480  *
481  * Check for an EEH failure at the given token address.  Call this
482  * routine if the result of a read was all 0xff's and you want to
483  * find out if this is due to an EEH slot freeze event.  This routine
484  * will query firmware for the EEH status.
485  *
486  * Note this routine is safe to call in an interrupt context.
487  */
488 unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
489 {
490         unsigned long addr;
491         struct eeh_dev *edev;
492 
493         /* Finding the phys addr + pci device; this is pretty quick. */
494         addr = eeh_token_to_phys((unsigned long __force) token);
495         edev = eeh_addr_cache_get_dev(addr);
496         if (!edev) {
497                 eeh_stats.no_device++;
498                 return val;
499         }
500 
501         eeh_dev_check_failure(edev);
502         return val;
503 }
504 
505 EXPORT_SYMBOL(eeh_check_failure);
506 
507 
508 /**
509  * eeh_pci_enable - Enable MMIO or DMA transfers for this slot
510  * @pe: EEH PE
511  *
512  * This routine should be called to reenable frozen MMIO or DMA
513  * so that it would work correctly again. It's useful while doing
514  * recovery or log collection on the indicated device.
515  */
516 int eeh_pci_enable(struct eeh_pe *pe, int function)
517 {
518         int rc;
519 
520         rc = eeh_ops->set_option(pe, function);
521         if (rc)
522                 pr_warning("%s: Unexpected state change %d on PHB#%d-PE#%x, err=%d\n",
523                         __func__, function, pe->phb->global_number, pe->addr, rc);
524 
525         rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
526         if (rc > 0 && (rc & EEH_STATE_MMIO_ENABLED) &&
527            (function == EEH_OPT_THAW_MMIO))
528                 return 0;
529 
530         return rc;
531 }
532 
533 /**
534  * pcibios_set_pcie_slot_reset - Set PCI-E reset state
535  * @dev: pci device struct
536  * @state: reset state to enter
537  *
538  * Return value:
539  *      0 if success
540  */
541 int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state)
542 {
543         struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
544         struct eeh_pe *pe = edev->pe;
545 
546         if (!pe) {
547                 pr_err("%s: No PE found on PCI device %s\n",
548                         __func__, pci_name(dev));
549                 return -EINVAL;
550         }
551 
552         switch (state) {
553         case pcie_deassert_reset:
554                 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
555                 break;
556         case pcie_hot_reset:
557                 eeh_ops->reset(pe, EEH_RESET_HOT);
558                 break;
559         case pcie_warm_reset:
560                 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
561                 break;
562         default:
563                 return -EINVAL;
564         };
565 
566         return 0;
567 }
568 
569 /**
570  * eeh_set_pe_freset - Check the required reset for the indicated device
571  * @data: EEH device
572  * @flag: return value
573  *
574  * Each device might have its preferred reset type: fundamental or
575  * hot reset. The routine is used to collected the information for
576  * the indicated device and its children so that the bunch of the
577  * devices could be reset properly.
578  */
579 static void *eeh_set_dev_freset(void *data, void *flag)
580 {
581         struct pci_dev *dev;
582         unsigned int *freset = (unsigned int *)flag;
583         struct eeh_dev *edev = (struct eeh_dev *)data;
584 
585         dev = eeh_dev_to_pci_dev(edev);
586         if (dev)
587                 *freset |= dev->needs_freset;
588 
589         return NULL;
590 }
591 
592 /**
593  * eeh_reset_pe_once - Assert the pci #RST line for 1/4 second
594  * @pe: EEH PE
595  *
596  * Assert the PCI #RST line for 1/4 second.
597  */
598 static void eeh_reset_pe_once(struct eeh_pe *pe)
599 {
600         unsigned int freset = 0;
601 
602         /* Determine type of EEH reset required for
603          * Partitionable Endpoint, a hot-reset (1)
604          * or a fundamental reset (3).
605          * A fundamental reset required by any device under
606          * Partitionable Endpoint trumps hot-reset.
607          */
608         eeh_pe_dev_traverse(pe, eeh_set_dev_freset, &freset);
609 
610         if (freset)
611                 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
612         else
613                 eeh_ops->reset(pe, EEH_RESET_HOT);
614 
615         /* The PCI bus requires that the reset be held high for at least
616          * a 100 milliseconds. We wait a bit longer 'just in case'.
617          */
618 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
619         msleep(PCI_BUS_RST_HOLD_TIME_MSEC);
620 
621         /* We might get hit with another EEH freeze as soon as the
622          * pci slot reset line is dropped. Make sure we don't miss
623          * these, and clear the flag now.
624          */
625         eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
626 
627         eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
628 
629         /* After a PCI slot has been reset, the PCI Express spec requires
630          * a 1.5 second idle time for the bus to stabilize, before starting
631          * up traffic.
632          */
633 #define PCI_BUS_SETTLE_TIME_MSEC 1800
634         msleep(PCI_BUS_SETTLE_TIME_MSEC);
635 }
636 
637 /**
638  * eeh_reset_pe - Reset the indicated PE
639  * @pe: EEH PE
640  *
641  * This routine should be called to reset indicated device, including
642  * PE. A PE might include multiple PCI devices and sometimes PCI bridges
643  * might be involved as well.
644  */
645 int eeh_reset_pe(struct eeh_pe *pe)
646 {
647         int flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
648         int i, rc;
649 
650         /* Take three shots at resetting the bus */
651         for (i=0; i<3; i++) {
652                 eeh_reset_pe_once(pe);
653 
654                 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
655                 if ((rc & flags) == flags)
656                         return 0;
657 
658                 if (rc < 0) {
659                         pr_err("%s: Unrecoverable slot failure on PHB#%d-PE#%x",
660                                 __func__, pe->phb->global_number, pe->addr);
661                         return -1;
662                 }
663                 pr_err("EEH: bus reset %d failed on PHB#%d-PE#%x, rc=%d\n",
664                         i+1, pe->phb->global_number, pe->addr, rc);
665         }
666 
667         return -1;
668 }
669 
670 /**
671  * eeh_save_bars - Save device bars
672  * @edev: PCI device associated EEH device
673  *
674  * Save the values of the device bars. Unlike the restore
675  * routine, this routine is *not* recursive. This is because
676  * PCI devices are added individually; but, for the restore,
677  * an entire slot is reset at a time.
678  */
679 void eeh_save_bars(struct eeh_dev *edev)
680 {
681         int i;
682         struct device_node *dn;
683 
684         if (!edev)
685                 return;
686         dn = eeh_dev_to_of_node(edev);
687 
688         for (i = 0; i < 16; i++)
689                 eeh_ops->read_config(dn, i * 4, 4, &edev->config_space[i]);
690 
691         /*
692          * For PCI bridges including root port, we need enable bus
693          * master explicitly. Otherwise, it can't fetch IODA table
694          * entries correctly. So we cache the bit in advance so that
695          * we can restore it after reset, either PHB range or PE range.
696          */
697         if (edev->mode & EEH_DEV_BRIDGE)
698                 edev->config_space[1] |= PCI_COMMAND_MASTER;
699 }
700 
701 /**
702  * eeh_ops_register - Register platform dependent EEH operations
703  * @ops: platform dependent EEH operations
704  *
705  * Register the platform dependent EEH operation callback
706  * functions. The platform should call this function before
707  * any other EEH operations.
708  */
709 int __init eeh_ops_register(struct eeh_ops *ops)
710 {
711         if (!ops->name) {
712                 pr_warning("%s: Invalid EEH ops name for %p\n",
713                         __func__, ops);
714                 return -EINVAL;
715         }
716 
717         if (eeh_ops && eeh_ops != ops) {
718                 pr_warning("%s: EEH ops of platform %s already existing (%s)\n",
719                         __func__, eeh_ops->name, ops->name);
720                 return -EEXIST;
721         }
722 
723         eeh_ops = ops;
724 
725         return 0;
726 }
727 
728 /**
729  * eeh_ops_unregister - Unreigster platform dependent EEH operations
730  * @name: name of EEH platform operations
731  *
732  * Unregister the platform dependent EEH operation callback
733  * functions.
734  */
735 int __exit eeh_ops_unregister(const char *name)
736 {
737         if (!name || !strlen(name)) {
738                 pr_warning("%s: Invalid EEH ops name\n",
739                         __func__);
740                 return -EINVAL;
741         }
742 
743         if (eeh_ops && !strcmp(eeh_ops->name, name)) {
744                 eeh_ops = NULL;
745                 return 0;
746         }
747 
748         return -EEXIST;
749 }
750 
751 static int eeh_reboot_notifier(struct notifier_block *nb,
752                                unsigned long action, void *unused)
753 {
754         eeh_set_enable(false);
755         return NOTIFY_DONE;
756 }
757 
758 static struct notifier_block eeh_reboot_nb = {
759         .notifier_call = eeh_reboot_notifier,
760 };
761 
762 /**
763  * eeh_init - EEH initialization
764  *
765  * Initialize EEH by trying to enable it for all of the adapters in the system.
766  * As a side effect we can determine here if eeh is supported at all.
767  * Note that we leave EEH on so failed config cycles won't cause a machine
768  * check.  If a user turns off EEH for a particular adapter they are really
769  * telling Linux to ignore errors.  Some hardware (e.g. POWER5) won't
770  * grant access to a slot if EEH isn't enabled, and so we always enable
771  * EEH for all slots/all devices.
772  *
773  * The eeh-force-off option disables EEH checking globally, for all slots.
774  * Even if force-off is set, the EEH hardware is still enabled, so that
775  * newer systems can boot.
776  */
777 int eeh_init(void)
778 {
779         struct pci_controller *hose, *tmp;
780         struct device_node *phb;
781         static int cnt = 0;
782         int ret = 0;
783 
784         /*
785          * We have to delay the initialization on PowerNV after
786          * the PCI hierarchy tree has been built because the PEs
787          * are figured out based on PCI devices instead of device
788          * tree nodes
789          */
790         if (machine_is(powernv) && cnt++ <= 0)
791                 return ret;
792 
793         /* Register reboot notifier */
794         ret = register_reboot_notifier(&eeh_reboot_nb);
795         if (ret) {
796                 pr_warn("%s: Failed to register notifier (%d)\n",
797                         __func__, ret);
798                 return ret;
799         }
800 
801         /* call platform initialization function */
802         if (!eeh_ops) {
803                 pr_warning("%s: Platform EEH operation not found\n",
804                         __func__);
805                 return -EEXIST;
806         } else if ((ret = eeh_ops->init())) {
807                 pr_warning("%s: Failed to call platform init function (%d)\n",
808                         __func__, ret);
809                 return ret;
810         }
811 
812         /* Initialize EEH event */
813         ret = eeh_event_init();
814         if (ret)
815                 return ret;
816 
817         /* Enable EEH for all adapters */
818         if (eeh_probe_mode_devtree()) {
819                 list_for_each_entry_safe(hose, tmp,
820                         &hose_list, list_node) {
821                         phb = hose->dn;
822                         traverse_pci_devices(phb, eeh_ops->of_probe, NULL);
823                 }
824         } else if (eeh_probe_mode_dev()) {
825                 list_for_each_entry_safe(hose, tmp,
826                         &hose_list, list_node)
827                         pci_walk_bus(hose->bus, eeh_ops->dev_probe, NULL);
828         } else {
829                 pr_warning("%s: Invalid probe mode %d\n",
830                            __func__, eeh_probe_mode);
831                 return -EINVAL;
832         }
833 
834         /*
835          * Call platform post-initialization. Actually, It's good chance
836          * to inform platform that EEH is ready to supply service if the
837          * I/O cache stuff has been built up.
838          */
839         if (eeh_ops->post_init) {
840                 ret = eeh_ops->post_init();
841                 if (ret)
842                         return ret;
843         }
844 
845         if (eeh_enabled())
846                 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
847         else
848                 pr_warning("EEH: No capable adapters found\n");
849 
850         return ret;
851 }
852 
853 core_initcall_sync(eeh_init);
854 
855 /**
856  * eeh_add_device_early - Enable EEH for the indicated device_node
857  * @dn: device node for which to set up EEH
858  *
859  * This routine must be used to perform EEH initialization for PCI
860  * devices that were added after system boot (e.g. hotplug, dlpar).
861  * This routine must be called before any i/o is performed to the
862  * adapter (inluding any config-space i/o).
863  * Whether this actually enables EEH or not for this device depends
864  * on the CEC architecture, type of the device, on earlier boot
865  * command-line arguments & etc.
866  */
867 void eeh_add_device_early(struct device_node *dn)
868 {
869         struct pci_controller *phb;
870 
871         /*
872          * If we're doing EEH probe based on PCI device, we
873          * would delay the probe until late stage because
874          * the PCI device isn't available this moment.
875          */
876         if (!eeh_probe_mode_devtree())
877                 return;
878 
879         if (!of_node_to_eeh_dev(dn))
880                 return;
881         phb = of_node_to_eeh_dev(dn)->phb;
882 
883         /* USB Bus children of PCI devices will not have BUID's */
884         if (NULL == phb || 0 == phb->buid)
885                 return;
886 
887         eeh_ops->of_probe(dn, NULL);
888 }
889 
890 /**
891  * eeh_add_device_tree_early - Enable EEH for the indicated device
892  * @dn: device node
893  *
894  * This routine must be used to perform EEH initialization for the
895  * indicated PCI device that was added after system boot (e.g.
896  * hotplug, dlpar).
897  */
898 void eeh_add_device_tree_early(struct device_node *dn)
899 {
900         struct device_node *sib;
901 
902         for_each_child_of_node(dn, sib)
903                 eeh_add_device_tree_early(sib);
904         eeh_add_device_early(dn);
905 }
906 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
907 
908 /**
909  * eeh_add_device_late - Perform EEH initialization for the indicated pci device
910  * @dev: pci device for which to set up EEH
911  *
912  * This routine must be used to complete EEH initialization for PCI
913  * devices that were added after system boot (e.g. hotplug, dlpar).
914  */
915 void eeh_add_device_late(struct pci_dev *dev)
916 {
917         struct device_node *dn;
918         struct eeh_dev *edev;
919 
920         if (!dev || !eeh_enabled())
921                 return;
922 
923         pr_debug("EEH: Adding device %s\n", pci_name(dev));
924 
925         dn = pci_device_to_OF_node(dev);
926         edev = of_node_to_eeh_dev(dn);
927         if (edev->pdev == dev) {
928                 pr_debug("EEH: Already referenced !\n");
929                 return;
930         }
931 
932         /*
933          * The EEH cache might not be removed correctly because of
934          * unbalanced kref to the device during unplug time, which
935          * relies on pcibios_release_device(). So we have to remove
936          * that here explicitly.
937          */
938         if (edev->pdev) {
939                 eeh_rmv_from_parent_pe(edev);
940                 eeh_addr_cache_rmv_dev(edev->pdev);
941                 eeh_sysfs_remove_device(edev->pdev);
942                 edev->mode &= ~EEH_DEV_SYSFS;
943 
944                 /*
945                  * We definitely should have the PCI device removed
946                  * though it wasn't correctly. So we needn't call
947                  * into error handler afterwards.
948                  */
949                 edev->mode |= EEH_DEV_NO_HANDLER;
950 
951                 edev->pdev = NULL;
952                 dev->dev.archdata.edev = NULL;
953         }
954 
955         edev->pdev = dev;
956         dev->dev.archdata.edev = edev;
957 
958         /*
959          * We have to do the EEH probe here because the PCI device
960          * hasn't been created yet in the early stage.
961          */
962         if (eeh_probe_mode_dev())
963                 eeh_ops->dev_probe(dev, NULL);
964 
965         eeh_addr_cache_insert_dev(dev);
966 }
967 
968 /**
969  * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
970  * @bus: PCI bus
971  *
972  * This routine must be used to perform EEH initialization for PCI
973  * devices which are attached to the indicated PCI bus. The PCI bus
974  * is added after system boot through hotplug or dlpar.
975  */
976 void eeh_add_device_tree_late(struct pci_bus *bus)
977 {
978         struct pci_dev *dev;
979 
980         list_for_each_entry(dev, &bus->devices, bus_list) {
981                 eeh_add_device_late(dev);
982                 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
983                         struct pci_bus *subbus = dev->subordinate;
984                         if (subbus)
985                                 eeh_add_device_tree_late(subbus);
986                 }
987         }
988 }
989 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
990 
991 /**
992  * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus
993  * @bus: PCI bus
994  *
995  * This routine must be used to add EEH sysfs files for PCI
996  * devices which are attached to the indicated PCI bus. The PCI bus
997  * is added after system boot through hotplug or dlpar.
998  */
999 void eeh_add_sysfs_files(struct pci_bus *bus)
1000 {
1001         struct pci_dev *dev;
1002 
1003         list_for_each_entry(dev, &bus->devices, bus_list) {
1004                 eeh_sysfs_add_device(dev);
1005                 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1006                         struct pci_bus *subbus = dev->subordinate;
1007                         if (subbus)
1008                                 eeh_add_sysfs_files(subbus);
1009                 }
1010         }
1011 }
1012 EXPORT_SYMBOL_GPL(eeh_add_sysfs_files);
1013 
1014 /**
1015  * eeh_remove_device - Undo EEH setup for the indicated pci device
1016  * @dev: pci device to be removed
1017  *
1018  * This routine should be called when a device is removed from
1019  * a running system (e.g. by hotplug or dlpar).  It unregisters
1020  * the PCI device from the EEH subsystem.  I/O errors affecting
1021  * this device will no longer be detected after this call; thus,
1022  * i/o errors affecting this slot may leave this device unusable.
1023  */
1024 void eeh_remove_device(struct pci_dev *dev)
1025 {
1026         struct eeh_dev *edev;
1027 
1028         if (!dev || !eeh_enabled())
1029                 return;
1030         edev = pci_dev_to_eeh_dev(dev);
1031 
1032         /* Unregister the device with the EEH/PCI address search system */
1033         pr_debug("EEH: Removing device %s\n", pci_name(dev));
1034 
1035         if (!edev || !edev->pdev || !edev->pe) {
1036                 pr_debug("EEH: Not referenced !\n");
1037                 return;
1038         }
1039 
1040         /*
1041          * During the hotplug for EEH error recovery, we need the EEH
1042          * device attached to the parent PE in order for BAR restore
1043          * a bit later. So we keep it for BAR restore and remove it
1044          * from the parent PE during the BAR resotre.
1045          */
1046         edev->pdev = NULL;
1047         dev->dev.archdata.edev = NULL;
1048         if (!(edev->pe->state & EEH_PE_KEEP))
1049                 eeh_rmv_from_parent_pe(edev);
1050         else
1051                 edev->mode |= EEH_DEV_DISCONNECTED;
1052 
1053         /*
1054          * We're removing from the PCI subsystem, that means
1055          * the PCI device driver can't support EEH or not
1056          * well. So we rely on hotplug completely to do recovery
1057          * for the specific PCI device.
1058          */
1059         edev->mode |= EEH_DEV_NO_HANDLER;
1060 
1061         eeh_addr_cache_rmv_dev(dev);
1062         eeh_sysfs_remove_device(dev);
1063         edev->mode &= ~EEH_DEV_SYSFS;
1064 }
1065 
1066 static int proc_eeh_show(struct seq_file *m, void *v)
1067 {
1068         if (!eeh_enabled()) {
1069                 seq_printf(m, "EEH Subsystem is globally disabled\n");
1070                 seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs);
1071         } else {
1072                 seq_printf(m, "EEH Subsystem is enabled\n");
1073                 seq_printf(m,
1074                                 "no device=%llu\n"
1075                                 "no device node=%llu\n"
1076                                 "no config address=%llu\n"
1077                                 "check not wanted=%llu\n"
1078                                 "eeh_total_mmio_ffs=%llu\n"
1079                                 "eeh_false_positives=%llu\n"
1080                                 "eeh_slot_resets=%llu\n",
1081                                 eeh_stats.no_device,
1082                                 eeh_stats.no_dn,
1083                                 eeh_stats.no_cfg_addr,
1084                                 eeh_stats.ignored_check,
1085                                 eeh_stats.total_mmio_ffs,
1086                                 eeh_stats.false_positives,
1087                                 eeh_stats.slot_resets);
1088         }
1089 
1090         return 0;
1091 }
1092 
1093 static int proc_eeh_open(struct inode *inode, struct file *file)
1094 {
1095         return single_open(file, proc_eeh_show, NULL);
1096 }
1097 
1098 static const struct file_operations proc_eeh_operations = {
1099         .open      = proc_eeh_open,
1100         .read      = seq_read,
1101         .llseek    = seq_lseek,
1102         .release   = single_release,
1103 };
1104 
1105 static int __init eeh_init_proc(void)
1106 {
1107         if (machine_is(pseries) || machine_is(powernv))
1108                 proc_create("powerpc/eeh", 0, NULL, &proc_eeh_operations);
1109         return 0;
1110 }
1111 __initcall(eeh_init_proc);
1112 

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