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TOMOYO Linux Cross Reference
Linux/arch/powerpc/kernel/eeh.c

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  1 /*
  2  * Copyright IBM Corporation 2001, 2005, 2006
  3  * Copyright Dave Engebretsen & Todd Inglett 2001
  4  * Copyright Linas Vepstas 2005, 2006
  5  * Copyright 2001-2012 IBM Corporation.
  6  *
  7  * This program is free software; you can redistribute it and/or modify
  8  * it under the terms of the GNU General Public License as published by
  9  * the Free Software Foundation; either version 2 of the License, or
 10  * (at your option) any later version.
 11  *
 12  * This program is distributed in the hope that it will be useful,
 13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 15  * GNU General Public License for more details.
 16  *
 17  * You should have received a copy of the GNU General Public License
 18  * along with this program; if not, write to the Free Software
 19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 20  *
 21  * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
 22  */
 23 
 24 #include <linux/delay.h>
 25 #include <linux/debugfs.h>
 26 #include <linux/sched.h>
 27 #include <linux/init.h>
 28 #include <linux/list.h>
 29 #include <linux/pci.h>
 30 #include <linux/iommu.h>
 31 #include <linux/proc_fs.h>
 32 #include <linux/rbtree.h>
 33 #include <linux/reboot.h>
 34 #include <linux/seq_file.h>
 35 #include <linux/spinlock.h>
 36 #include <linux/export.h>
 37 #include <linux/of.h>
 38 
 39 #include <linux/atomic.h>
 40 #include <asm/debug.h>
 41 #include <asm/eeh.h>
 42 #include <asm/eeh_event.h>
 43 #include <asm/io.h>
 44 #include <asm/iommu.h>
 45 #include <asm/machdep.h>
 46 #include <asm/ppc-pci.h>
 47 #include <asm/rtas.h>
 48 
 49 
 50 /** Overview:
 51  *  EEH, or "Extended Error Handling" is a PCI bridge technology for
 52  *  dealing with PCI bus errors that can't be dealt with within the
 53  *  usual PCI framework, except by check-stopping the CPU.  Systems
 54  *  that are designed for high-availability/reliability cannot afford
 55  *  to crash due to a "mere" PCI error, thus the need for EEH.
 56  *  An EEH-capable bridge operates by converting a detected error
 57  *  into a "slot freeze", taking the PCI adapter off-line, making
 58  *  the slot behave, from the OS'es point of view, as if the slot
 59  *  were "empty": all reads return 0xff's and all writes are silently
 60  *  ignored.  EEH slot isolation events can be triggered by parity
 61  *  errors on the address or data busses (e.g. during posted writes),
 62  *  which in turn might be caused by low voltage on the bus, dust,
 63  *  vibration, humidity, radioactivity or plain-old failed hardware.
 64  *
 65  *  Note, however, that one of the leading causes of EEH slot
 66  *  freeze events are buggy device drivers, buggy device microcode,
 67  *  or buggy device hardware.  This is because any attempt by the
 68  *  device to bus-master data to a memory address that is not
 69  *  assigned to the device will trigger a slot freeze.   (The idea
 70  *  is to prevent devices-gone-wild from corrupting system memory).
 71  *  Buggy hardware/drivers will have a miserable time co-existing
 72  *  with EEH.
 73  *
 74  *  Ideally, a PCI device driver, when suspecting that an isolation
 75  *  event has occurred (e.g. by reading 0xff's), will then ask EEH
 76  *  whether this is the case, and then take appropriate steps to
 77  *  reset the PCI slot, the PCI device, and then resume operations.
 78  *  However, until that day,  the checking is done here, with the
 79  *  eeh_check_failure() routine embedded in the MMIO macros.  If
 80  *  the slot is found to be isolated, an "EEH Event" is synthesized
 81  *  and sent out for processing.
 82  */
 83 
 84 /* If a device driver keeps reading an MMIO register in an interrupt
 85  * handler after a slot isolation event, it might be broken.
 86  * This sets the threshold for how many read attempts we allow
 87  * before printing an error message.
 88  */
 89 #define EEH_MAX_FAILS   2100000
 90 
 91 /* Time to wait for a PCI slot to report status, in milliseconds */
 92 #define PCI_BUS_RESET_WAIT_MSEC (5*60*1000)
 93 
 94 /*
 95  * EEH probe mode support, which is part of the flags,
 96  * is to support multiple platforms for EEH. Some platforms
 97  * like pSeries do PCI emunation based on device tree.
 98  * However, other platforms like powernv probe PCI devices
 99  * from hardware. The flag is used to distinguish that.
100  * In addition, struct eeh_ops::probe would be invoked for
101  * particular OF node or PCI device so that the corresponding
102  * PE would be created there.
103  */
104 int eeh_subsystem_flags;
105 EXPORT_SYMBOL(eeh_subsystem_flags);
106 
107 /*
108  * EEH allowed maximal frozen times. If one particular PE's
109  * frozen count in last hour exceeds this limit, the PE will
110  * be forced to be offline permanently.
111  */
112 int eeh_max_freezes = 5;
113 
114 /* Platform dependent EEH operations */
115 struct eeh_ops *eeh_ops = NULL;
116 
117 /* Lock to avoid races due to multiple reports of an error */
118 DEFINE_RAW_SPINLOCK(confirm_error_lock);
119 
120 /* Lock to protect passed flags */
121 static DEFINE_MUTEX(eeh_dev_mutex);
122 
123 /* Buffer for reporting pci register dumps. Its here in BSS, and
124  * not dynamically alloced, so that it ends up in RMO where RTAS
125  * can access it.
126  */
127 #define EEH_PCI_REGS_LOG_LEN 8192
128 static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN];
129 
130 /*
131  * The struct is used to maintain the EEH global statistic
132  * information. Besides, the EEH global statistics will be
133  * exported to user space through procfs
134  */
135 struct eeh_stats {
136         u64 no_device;          /* PCI device not found         */
137         u64 no_dn;              /* OF node not found            */
138         u64 no_cfg_addr;        /* Config address not found     */
139         u64 ignored_check;      /* EEH check skipped            */
140         u64 total_mmio_ffs;     /* Total EEH checks             */
141         u64 false_positives;    /* Unnecessary EEH checks       */
142         u64 slot_resets;        /* PE reset                     */
143 };
144 
145 static struct eeh_stats eeh_stats;
146 
147 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
148 
149 static int __init eeh_setup(char *str)
150 {
151         if (!strcmp(str, "off"))
152                 eeh_add_flag(EEH_FORCE_DISABLED);
153         else if (!strcmp(str, "early_log"))
154                 eeh_add_flag(EEH_EARLY_DUMP_LOG);
155 
156         return 1;
157 }
158 __setup("eeh=", eeh_setup);
159 
160 /*
161  * This routine captures assorted PCI configuration space data
162  * for the indicated PCI device, and puts them into a buffer
163  * for RTAS error logging.
164  */
165 static size_t eeh_dump_dev_log(struct eeh_dev *edev, char *buf, size_t len)
166 {
167         struct device_node *dn = eeh_dev_to_of_node(edev);
168         u32 cfg;
169         int cap, i;
170         int n = 0, l = 0;
171         char buffer[128];
172 
173         n += scnprintf(buf+n, len-n, "%s\n", dn->full_name);
174         pr_warn("EEH: of node=%s\n", dn->full_name);
175 
176         eeh_ops->read_config(dn, PCI_VENDOR_ID, 4, &cfg);
177         n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg);
178         pr_warn("EEH: PCI device/vendor: %08x\n", cfg);
179 
180         eeh_ops->read_config(dn, PCI_COMMAND, 4, &cfg);
181         n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg);
182         pr_warn("EEH: PCI cmd/status register: %08x\n", cfg);
183 
184         /* Gather bridge-specific registers */
185         if (edev->mode & EEH_DEV_BRIDGE) {
186                 eeh_ops->read_config(dn, PCI_SEC_STATUS, 2, &cfg);
187                 n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg);
188                 pr_warn("EEH: Bridge secondary status: %04x\n", cfg);
189 
190                 eeh_ops->read_config(dn, PCI_BRIDGE_CONTROL, 2, &cfg);
191                 n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg);
192                 pr_warn("EEH: Bridge control: %04x\n", cfg);
193         }
194 
195         /* Dump out the PCI-X command and status regs */
196         cap = edev->pcix_cap;
197         if (cap) {
198                 eeh_ops->read_config(dn, cap, 4, &cfg);
199                 n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg);
200                 pr_warn("EEH: PCI-X cmd: %08x\n", cfg);
201 
202                 eeh_ops->read_config(dn, cap+4, 4, &cfg);
203                 n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg);
204                 pr_warn("EEH: PCI-X status: %08x\n", cfg);
205         }
206 
207         /* If PCI-E capable, dump PCI-E cap 10 */
208         cap = edev->pcie_cap;
209         if (cap) {
210                 n += scnprintf(buf+n, len-n, "pci-e cap10:\n");
211                 pr_warn("EEH: PCI-E capabilities and status follow:\n");
212 
213                 for (i=0; i<=8; i++) {
214                         eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
215                         n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
216 
217                         if ((i % 4) == 0) {
218                                 if (i != 0)
219                                         pr_warn("%s\n", buffer);
220 
221                                 l = scnprintf(buffer, sizeof(buffer),
222                                               "EEH: PCI-E %02x: %08x ",
223                                               4*i, cfg);
224                         } else {
225                                 l += scnprintf(buffer+l, sizeof(buffer)-l,
226                                                "%08x ", cfg);
227                         }
228 
229                 }
230 
231                 pr_warn("%s\n", buffer);
232         }
233 
234         /* If AER capable, dump it */
235         cap = edev->aer_cap;
236         if (cap) {
237                 n += scnprintf(buf+n, len-n, "pci-e AER:\n");
238                 pr_warn("EEH: PCI-E AER capability register set follows:\n");
239 
240                 for (i=0; i<=13; i++) {
241                         eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
242                         n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
243 
244                         if ((i % 4) == 0) {
245                                 if (i != 0)
246                                         pr_warn("%s\n", buffer);
247 
248                                 l = scnprintf(buffer, sizeof(buffer),
249                                               "EEH: PCI-E AER %02x: %08x ",
250                                               4*i, cfg);
251                         } else {
252                                 l += scnprintf(buffer+l, sizeof(buffer)-l,
253                                                "%08x ", cfg);
254                         }
255                 }
256 
257                 pr_warn("%s\n", buffer);
258         }
259 
260         return n;
261 }
262 
263 static void *eeh_dump_pe_log(void *data, void *flag)
264 {
265         struct eeh_pe *pe = data;
266         struct eeh_dev *edev, *tmp;
267         size_t *plen = flag;
268 
269         /* If the PE's config space is blocked, 0xFF's will be
270          * returned. It's pointless to collect the log in this
271          * case.
272          */
273         if (pe->state & EEH_PE_CFG_BLOCKED)
274                 return NULL;
275 
276         eeh_pe_for_each_dev(pe, edev, tmp)
277                 *plen += eeh_dump_dev_log(edev, pci_regs_buf + *plen,
278                                           EEH_PCI_REGS_LOG_LEN - *plen);
279 
280         return NULL;
281 }
282 
283 /**
284  * eeh_slot_error_detail - Generate combined log including driver log and error log
285  * @pe: EEH PE
286  * @severity: temporary or permanent error log
287  *
288  * This routine should be called to generate the combined log, which
289  * is comprised of driver log and error log. The driver log is figured
290  * out from the config space of the corresponding PCI device, while
291  * the error log is fetched through platform dependent function call.
292  */
293 void eeh_slot_error_detail(struct eeh_pe *pe, int severity)
294 {
295         size_t loglen = 0;
296 
297         /*
298          * When the PHB is fenced or dead, it's pointless to collect
299          * the data from PCI config space because it should return
300          * 0xFF's. For ER, we still retrieve the data from the PCI
301          * config space.
302          *
303          * For pHyp, we have to enable IO for log retrieval. Otherwise,
304          * 0xFF's is always returned from PCI config space.
305          */
306         if (!(pe->type & EEH_PE_PHB)) {
307                 if (eeh_has_flag(EEH_ENABLE_IO_FOR_LOG))
308                         eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
309                 eeh_ops->configure_bridge(pe);
310                 eeh_pe_restore_bars(pe);
311 
312                 pci_regs_buf[0] = 0;
313                 eeh_pe_traverse(pe, eeh_dump_pe_log, &loglen);
314         }
315 
316         eeh_ops->get_log(pe, severity, pci_regs_buf, loglen);
317 }
318 
319 /**
320  * eeh_token_to_phys - Convert EEH address token to phys address
321  * @token: I/O token, should be address in the form 0xA....
322  *
323  * This routine should be called to convert virtual I/O address
324  * to physical one.
325  */
326 static inline unsigned long eeh_token_to_phys(unsigned long token)
327 {
328         pte_t *ptep;
329         unsigned long pa;
330         int hugepage_shift;
331 
332         /*
333          * We won't find hugepages here, iomem
334          */
335         ptep = find_linux_pte_or_hugepte(init_mm.pgd, token, &hugepage_shift);
336         if (!ptep)
337                 return token;
338         WARN_ON(hugepage_shift);
339         pa = pte_pfn(*ptep) << PAGE_SHIFT;
340 
341         return pa | (token & (PAGE_SIZE-1));
342 }
343 
344 /*
345  * On PowerNV platform, we might already have fenced PHB there.
346  * For that case, it's meaningless to recover frozen PE. Intead,
347  * We have to handle fenced PHB firstly.
348  */
349 static int eeh_phb_check_failure(struct eeh_pe *pe)
350 {
351         struct eeh_pe *phb_pe;
352         unsigned long flags;
353         int ret;
354 
355         if (!eeh_has_flag(EEH_PROBE_MODE_DEV))
356                 return -EPERM;
357 
358         /* Find the PHB PE */
359         phb_pe = eeh_phb_pe_get(pe->phb);
360         if (!phb_pe) {
361                 pr_warn("%s Can't find PE for PHB#%d\n",
362                         __func__, pe->phb->global_number);
363                 return -EEXIST;
364         }
365 
366         /* If the PHB has been in problematic state */
367         eeh_serialize_lock(&flags);
368         if (phb_pe->state & EEH_PE_ISOLATED) {
369                 ret = 0;
370                 goto out;
371         }
372 
373         /* Check PHB state */
374         ret = eeh_ops->get_state(phb_pe, NULL);
375         if ((ret < 0) ||
376             (ret == EEH_STATE_NOT_SUPPORT) ||
377             (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
378             (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
379                 ret = 0;
380                 goto out;
381         }
382 
383         /* Isolate the PHB and send event */
384         eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED);
385         eeh_serialize_unlock(flags);
386 
387         pr_err("EEH: PHB#%x failure detected, location: %s\n",
388                 phb_pe->phb->global_number, eeh_pe_loc_get(phb_pe));
389         dump_stack();
390         eeh_send_failure_event(phb_pe);
391 
392         return 1;
393 out:
394         eeh_serialize_unlock(flags);
395         return ret;
396 }
397 
398 /**
399  * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze
400  * @edev: eeh device
401  *
402  * Check for an EEH failure for the given device node.  Call this
403  * routine if the result of a read was all 0xff's and you want to
404  * find out if this is due to an EEH slot freeze.  This routine
405  * will query firmware for the EEH status.
406  *
407  * Returns 0 if there has not been an EEH error; otherwise returns
408  * a non-zero value and queues up a slot isolation event notification.
409  *
410  * It is safe to call this routine in an interrupt context.
411  */
412 int eeh_dev_check_failure(struct eeh_dev *edev)
413 {
414         int ret;
415         int active_flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
416         unsigned long flags;
417         struct device_node *dn;
418         struct pci_dev *dev;
419         struct eeh_pe *pe, *parent_pe, *phb_pe;
420         int rc = 0;
421         const char *location;
422 
423         eeh_stats.total_mmio_ffs++;
424 
425         if (!eeh_enabled())
426                 return 0;
427 
428         if (!edev) {
429                 eeh_stats.no_dn++;
430                 return 0;
431         }
432         dn = eeh_dev_to_of_node(edev);
433         dev = eeh_dev_to_pci_dev(edev);
434         pe = eeh_dev_to_pe(edev);
435 
436         /* Access to IO BARs might get this far and still not want checking. */
437         if (!pe) {
438                 eeh_stats.ignored_check++;
439                 pr_debug("EEH: Ignored check for %s %s\n",
440                         eeh_pci_name(dev), dn->full_name);
441                 return 0;
442         }
443 
444         if (!pe->addr && !pe->config_addr) {
445                 eeh_stats.no_cfg_addr++;
446                 return 0;
447         }
448 
449         /*
450          * On PowerNV platform, we might already have fenced PHB
451          * there and we need take care of that firstly.
452          */
453         ret = eeh_phb_check_failure(pe);
454         if (ret > 0)
455                 return ret;
456 
457         /*
458          * If the PE isn't owned by us, we shouldn't check the
459          * state. Instead, let the owner handle it if the PE has
460          * been frozen.
461          */
462         if (eeh_pe_passed(pe))
463                 return 0;
464 
465         /* If we already have a pending isolation event for this
466          * slot, we know it's bad already, we don't need to check.
467          * Do this checking under a lock; as multiple PCI devices
468          * in one slot might report errors simultaneously, and we
469          * only want one error recovery routine running.
470          */
471         eeh_serialize_lock(&flags);
472         rc = 1;
473         if (pe->state & EEH_PE_ISOLATED) {
474                 pe->check_count++;
475                 if (pe->check_count % EEH_MAX_FAILS == 0) {
476                         location = of_get_property(dn, "ibm,loc-code", NULL);
477                         printk(KERN_ERR "EEH: %d reads ignored for recovering device at "
478                                 "location=%s driver=%s pci addr=%s\n",
479                                 pe->check_count, location,
480                                 eeh_driver_name(dev), eeh_pci_name(dev));
481                         printk(KERN_ERR "EEH: Might be infinite loop in %s driver\n",
482                                 eeh_driver_name(dev));
483                         dump_stack();
484                 }
485                 goto dn_unlock;
486         }
487 
488         /*
489          * Now test for an EEH failure.  This is VERY expensive.
490          * Note that the eeh_config_addr may be a parent device
491          * in the case of a device behind a bridge, or it may be
492          * function zero of a multi-function device.
493          * In any case they must share a common PHB.
494          */
495         ret = eeh_ops->get_state(pe, NULL);
496 
497         /* Note that config-io to empty slots may fail;
498          * they are empty when they don't have children.
499          * We will punt with the following conditions: Failure to get
500          * PE's state, EEH not support and Permanently unavailable
501          * state, PE is in good state.
502          */
503         if ((ret < 0) ||
504             (ret == EEH_STATE_NOT_SUPPORT) ||
505             ((ret & active_flags) == active_flags)) {
506                 eeh_stats.false_positives++;
507                 pe->false_positives++;
508                 rc = 0;
509                 goto dn_unlock;
510         }
511 
512         /*
513          * It should be corner case that the parent PE has been
514          * put into frozen state as well. We should take care
515          * that at first.
516          */
517         parent_pe = pe->parent;
518         while (parent_pe) {
519                 /* Hit the ceiling ? */
520                 if (parent_pe->type & EEH_PE_PHB)
521                         break;
522 
523                 /* Frozen parent PE ? */
524                 ret = eeh_ops->get_state(parent_pe, NULL);
525                 if (ret > 0 &&
526                     (ret & active_flags) != active_flags)
527                         pe = parent_pe;
528 
529                 /* Next parent level */
530                 parent_pe = parent_pe->parent;
531         }
532 
533         eeh_stats.slot_resets++;
534 
535         /* Avoid repeated reports of this failure, including problems
536          * with other functions on this device, and functions under
537          * bridges.
538          */
539         eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
540         eeh_serialize_unlock(flags);
541 
542         /* Most EEH events are due to device driver bugs.  Having
543          * a stack trace will help the device-driver authors figure
544          * out what happened.  So print that out.
545          */
546         phb_pe = eeh_phb_pe_get(pe->phb);
547         pr_err("EEH: Frozen PHB#%x-PE#%x detected\n",
548                pe->phb->global_number, pe->addr);
549         pr_err("EEH: PE location: %s, PHB location: %s\n",
550                eeh_pe_loc_get(pe), eeh_pe_loc_get(phb_pe));
551         dump_stack();
552 
553         eeh_send_failure_event(pe);
554 
555         return 1;
556 
557 dn_unlock:
558         eeh_serialize_unlock(flags);
559         return rc;
560 }
561 
562 EXPORT_SYMBOL_GPL(eeh_dev_check_failure);
563 
564 /**
565  * eeh_check_failure - Check if all 1's data is due to EEH slot freeze
566  * @token: I/O address
567  *
568  * Check for an EEH failure at the given I/O address. Call this
569  * routine if the result of a read was all 0xff's and you want to
570  * find out if this is due to an EEH slot freeze event. This routine
571  * will query firmware for the EEH status.
572  *
573  * Note this routine is safe to call in an interrupt context.
574  */
575 int eeh_check_failure(const volatile void __iomem *token)
576 {
577         unsigned long addr;
578         struct eeh_dev *edev;
579 
580         /* Finding the phys addr + pci device; this is pretty quick. */
581         addr = eeh_token_to_phys((unsigned long __force) token);
582         edev = eeh_addr_cache_get_dev(addr);
583         if (!edev) {
584                 eeh_stats.no_device++;
585                 return 0;
586         }
587 
588         return eeh_dev_check_failure(edev);
589 }
590 EXPORT_SYMBOL(eeh_check_failure);
591 
592 
593 /**
594  * eeh_pci_enable - Enable MMIO or DMA transfers for this slot
595  * @pe: EEH PE
596  *
597  * This routine should be called to reenable frozen MMIO or DMA
598  * so that it would work correctly again. It's useful while doing
599  * recovery or log collection on the indicated device.
600  */
601 int eeh_pci_enable(struct eeh_pe *pe, int function)
602 {
603         int active_flag, rc;
604 
605         /*
606          * pHyp doesn't allow to enable IO or DMA on unfrozen PE.
607          * Also, it's pointless to enable them on unfrozen PE. So
608          * we have to check before enabling IO or DMA.
609          */
610         switch (function) {
611         case EEH_OPT_THAW_MMIO:
612                 active_flag = EEH_STATE_MMIO_ACTIVE;
613                 break;
614         case EEH_OPT_THAW_DMA:
615                 active_flag = EEH_STATE_DMA_ACTIVE;
616                 break;
617         case EEH_OPT_DISABLE:
618         case EEH_OPT_ENABLE:
619         case EEH_OPT_FREEZE_PE:
620                 active_flag = 0;
621                 break;
622         default:
623                 pr_warn("%s: Invalid function %d\n",
624                         __func__, function);
625                 return -EINVAL;
626         }
627 
628         /*
629          * Check if IO or DMA has been enabled before
630          * enabling them.
631          */
632         if (active_flag) {
633                 rc = eeh_ops->get_state(pe, NULL);
634                 if (rc < 0)
635                         return rc;
636 
637                 /* Needn't enable it at all */
638                 if (rc == EEH_STATE_NOT_SUPPORT)
639                         return 0;
640 
641                 /* It's already enabled */
642                 if (rc & active_flag)
643                         return 0;
644         }
645 
646 
647         /* Issue the request */
648         rc = eeh_ops->set_option(pe, function);
649         if (rc)
650                 pr_warn("%s: Unexpected state change %d on "
651                         "PHB#%d-PE#%x, err=%d\n",
652                         __func__, function, pe->phb->global_number,
653                         pe->addr, rc);
654 
655         /* Check if the request is finished successfully */
656         if (active_flag) {
657                 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
658                 if (rc <= 0)
659                         return rc;
660 
661                 if (rc & active_flag)
662                         return 0;
663 
664                 return -EIO;
665         }
666 
667         return rc;
668 }
669 
670 /**
671  * pcibios_set_pcie_slot_reset - Set PCI-E reset state
672  * @dev: pci device struct
673  * @state: reset state to enter
674  *
675  * Return value:
676  *      0 if success
677  */
678 int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state)
679 {
680         struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
681         struct eeh_pe *pe = eeh_dev_to_pe(edev);
682 
683         if (!pe) {
684                 pr_err("%s: No PE found on PCI device %s\n",
685                         __func__, pci_name(dev));
686                 return -EINVAL;
687         }
688 
689         switch (state) {
690         case pcie_deassert_reset:
691                 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
692                 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
693                 break;
694         case pcie_hot_reset:
695                 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
696                 eeh_ops->reset(pe, EEH_RESET_HOT);
697                 break;
698         case pcie_warm_reset:
699                 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
700                 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
701                 break;
702         default:
703                 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
704                 return -EINVAL;
705         };
706 
707         return 0;
708 }
709 
710 /**
711  * eeh_set_pe_freset - Check the required reset for the indicated device
712  * @data: EEH device
713  * @flag: return value
714  *
715  * Each device might have its preferred reset type: fundamental or
716  * hot reset. The routine is used to collected the information for
717  * the indicated device and its children so that the bunch of the
718  * devices could be reset properly.
719  */
720 static void *eeh_set_dev_freset(void *data, void *flag)
721 {
722         struct pci_dev *dev;
723         unsigned int *freset = (unsigned int *)flag;
724         struct eeh_dev *edev = (struct eeh_dev *)data;
725 
726         dev = eeh_dev_to_pci_dev(edev);
727         if (dev)
728                 *freset |= dev->needs_freset;
729 
730         return NULL;
731 }
732 
733 /**
734  * eeh_reset_pe_once - Assert the pci #RST line for 1/4 second
735  * @pe: EEH PE
736  *
737  * Assert the PCI #RST line for 1/4 second.
738  */
739 static void eeh_reset_pe_once(struct eeh_pe *pe)
740 {
741         unsigned int freset = 0;
742 
743         /* Determine type of EEH reset required for
744          * Partitionable Endpoint, a hot-reset (1)
745          * or a fundamental reset (3).
746          * A fundamental reset required by any device under
747          * Partitionable Endpoint trumps hot-reset.
748          */
749         eeh_pe_dev_traverse(pe, eeh_set_dev_freset, &freset);
750 
751         if (freset)
752                 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
753         else
754                 eeh_ops->reset(pe, EEH_RESET_HOT);
755 
756         eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
757 }
758 
759 /**
760  * eeh_reset_pe - Reset the indicated PE
761  * @pe: EEH PE
762  *
763  * This routine should be called to reset indicated device, including
764  * PE. A PE might include multiple PCI devices and sometimes PCI bridges
765  * might be involved as well.
766  */
767 int eeh_reset_pe(struct eeh_pe *pe)
768 {
769         int flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
770         int i, state, ret;
771 
772         /* Mark as reset and block config space */
773         eeh_pe_state_mark(pe, EEH_PE_RESET | EEH_PE_CFG_BLOCKED);
774 
775         /* Take three shots at resetting the bus */
776         for (i = 0; i < 3; i++) {
777                 eeh_reset_pe_once(pe);
778 
779                 /*
780                  * EEH_PE_ISOLATED is expected to be removed after
781                  * BAR restore.
782                  */
783                 state = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
784                 if ((state & flags) == flags) {
785                         ret = 0;
786                         goto out;
787                 }
788 
789                 if (state < 0) {
790                         pr_warn("%s: Unrecoverable slot failure on PHB#%d-PE#%x",
791                                 __func__, pe->phb->global_number, pe->addr);
792                         ret = -ENOTRECOVERABLE;
793                         goto out;
794                 }
795 
796                 /* We might run out of credits */
797                 ret = -EIO;
798                 pr_warn("%s: Failure %d resetting PHB#%x-PE#%x\n (%d)\n",
799                         __func__, state, pe->phb->global_number, pe->addr, (i + 1));
800         }
801 
802 out:
803         eeh_pe_state_clear(pe, EEH_PE_RESET | EEH_PE_CFG_BLOCKED);
804         return ret;
805 }
806 
807 /**
808  * eeh_save_bars - Save device bars
809  * @edev: PCI device associated EEH device
810  *
811  * Save the values of the device bars. Unlike the restore
812  * routine, this routine is *not* recursive. This is because
813  * PCI devices are added individually; but, for the restore,
814  * an entire slot is reset at a time.
815  */
816 void eeh_save_bars(struct eeh_dev *edev)
817 {
818         int i;
819         struct device_node *dn;
820 
821         if (!edev)
822                 return;
823         dn = eeh_dev_to_of_node(edev);
824 
825         for (i = 0; i < 16; i++)
826                 eeh_ops->read_config(dn, i * 4, 4, &edev->config_space[i]);
827 
828         /*
829          * For PCI bridges including root port, we need enable bus
830          * master explicitly. Otherwise, it can't fetch IODA table
831          * entries correctly. So we cache the bit in advance so that
832          * we can restore it after reset, either PHB range or PE range.
833          */
834         if (edev->mode & EEH_DEV_BRIDGE)
835                 edev->config_space[1] |= PCI_COMMAND_MASTER;
836 }
837 
838 /**
839  * eeh_ops_register - Register platform dependent EEH operations
840  * @ops: platform dependent EEH operations
841  *
842  * Register the platform dependent EEH operation callback
843  * functions. The platform should call this function before
844  * any other EEH operations.
845  */
846 int __init eeh_ops_register(struct eeh_ops *ops)
847 {
848         if (!ops->name) {
849                 pr_warn("%s: Invalid EEH ops name for %p\n",
850                         __func__, ops);
851                 return -EINVAL;
852         }
853 
854         if (eeh_ops && eeh_ops != ops) {
855                 pr_warn("%s: EEH ops of platform %s already existing (%s)\n",
856                         __func__, eeh_ops->name, ops->name);
857                 return -EEXIST;
858         }
859 
860         eeh_ops = ops;
861 
862         return 0;
863 }
864 
865 /**
866  * eeh_ops_unregister - Unreigster platform dependent EEH operations
867  * @name: name of EEH platform operations
868  *
869  * Unregister the platform dependent EEH operation callback
870  * functions.
871  */
872 int __exit eeh_ops_unregister(const char *name)
873 {
874         if (!name || !strlen(name)) {
875                 pr_warn("%s: Invalid EEH ops name\n",
876                         __func__);
877                 return -EINVAL;
878         }
879 
880         if (eeh_ops && !strcmp(eeh_ops->name, name)) {
881                 eeh_ops = NULL;
882                 return 0;
883         }
884 
885         return -EEXIST;
886 }
887 
888 static int eeh_reboot_notifier(struct notifier_block *nb,
889                                unsigned long action, void *unused)
890 {
891         eeh_clear_flag(EEH_ENABLED);
892         return NOTIFY_DONE;
893 }
894 
895 static struct notifier_block eeh_reboot_nb = {
896         .notifier_call = eeh_reboot_notifier,
897 };
898 
899 /**
900  * eeh_init - EEH initialization
901  *
902  * Initialize EEH by trying to enable it for all of the adapters in the system.
903  * As a side effect we can determine here if eeh is supported at all.
904  * Note that we leave EEH on so failed config cycles won't cause a machine
905  * check.  If a user turns off EEH for a particular adapter they are really
906  * telling Linux to ignore errors.  Some hardware (e.g. POWER5) won't
907  * grant access to a slot if EEH isn't enabled, and so we always enable
908  * EEH for all slots/all devices.
909  *
910  * The eeh-force-off option disables EEH checking globally, for all slots.
911  * Even if force-off is set, the EEH hardware is still enabled, so that
912  * newer systems can boot.
913  */
914 int eeh_init(void)
915 {
916         struct pci_controller *hose, *tmp;
917         struct device_node *phb;
918         static int cnt = 0;
919         int ret = 0;
920 
921         /*
922          * We have to delay the initialization on PowerNV after
923          * the PCI hierarchy tree has been built because the PEs
924          * are figured out based on PCI devices instead of device
925          * tree nodes
926          */
927         if (machine_is(powernv) && cnt++ <= 0)
928                 return ret;
929 
930         /* Register reboot notifier */
931         ret = register_reboot_notifier(&eeh_reboot_nb);
932         if (ret) {
933                 pr_warn("%s: Failed to register notifier (%d)\n",
934                         __func__, ret);
935                 return ret;
936         }
937 
938         /* call platform initialization function */
939         if (!eeh_ops) {
940                 pr_warn("%s: Platform EEH operation not found\n",
941                         __func__);
942                 return -EEXIST;
943         } else if ((ret = eeh_ops->init()))
944                 return ret;
945 
946         /* Initialize EEH event */
947         ret = eeh_event_init();
948         if (ret)
949                 return ret;
950 
951         /* Enable EEH for all adapters */
952         if (eeh_has_flag(EEH_PROBE_MODE_DEVTREE)) {
953                 list_for_each_entry_safe(hose, tmp,
954                         &hose_list, list_node) {
955                         phb = hose->dn;
956                         traverse_pci_devices(phb, eeh_ops->of_probe, NULL);
957                 }
958         } else if (eeh_has_flag(EEH_PROBE_MODE_DEV)) {
959                 list_for_each_entry_safe(hose, tmp,
960                         &hose_list, list_node)
961                         pci_walk_bus(hose->bus, eeh_ops->dev_probe, NULL);
962         } else {
963                 pr_warn("%s: Invalid probe mode %x",
964                         __func__, eeh_subsystem_flags);
965                 return -EINVAL;
966         }
967 
968         /*
969          * Call platform post-initialization. Actually, It's good chance
970          * to inform platform that EEH is ready to supply service if the
971          * I/O cache stuff has been built up.
972          */
973         if (eeh_ops->post_init) {
974                 ret = eeh_ops->post_init();
975                 if (ret)
976                         return ret;
977         }
978 
979         if (eeh_enabled())
980                 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
981         else
982                 pr_warn("EEH: No capable adapters found\n");
983 
984         return ret;
985 }
986 
987 core_initcall_sync(eeh_init);
988 
989 /**
990  * eeh_add_device_early - Enable EEH for the indicated device_node
991  * @dn: device node for which to set up EEH
992  *
993  * This routine must be used to perform EEH initialization for PCI
994  * devices that were added after system boot (e.g. hotplug, dlpar).
995  * This routine must be called before any i/o is performed to the
996  * adapter (inluding any config-space i/o).
997  * Whether this actually enables EEH or not for this device depends
998  * on the CEC architecture, type of the device, on earlier boot
999  * command-line arguments & etc.
1000  */
1001 void eeh_add_device_early(struct device_node *dn)
1002 {
1003         struct pci_controller *phb;
1004 
1005         /*
1006          * If we're doing EEH probe based on PCI device, we
1007          * would delay the probe until late stage because
1008          * the PCI device isn't available this moment.
1009          */
1010         if (!eeh_has_flag(EEH_PROBE_MODE_DEVTREE))
1011                 return;
1012 
1013         if (!of_node_to_eeh_dev(dn))
1014                 return;
1015         phb = of_node_to_eeh_dev(dn)->phb;
1016 
1017         /* USB Bus children of PCI devices will not have BUID's */
1018         if (NULL == phb || 0 == phb->buid)
1019                 return;
1020 
1021         eeh_ops->of_probe(dn, NULL);
1022 }
1023 
1024 /**
1025  * eeh_add_device_tree_early - Enable EEH for the indicated device
1026  * @dn: device node
1027  *
1028  * This routine must be used to perform EEH initialization for the
1029  * indicated PCI device that was added after system boot (e.g.
1030  * hotplug, dlpar).
1031  */
1032 void eeh_add_device_tree_early(struct device_node *dn)
1033 {
1034         struct device_node *sib;
1035 
1036         for_each_child_of_node(dn, sib)
1037                 eeh_add_device_tree_early(sib);
1038         eeh_add_device_early(dn);
1039 }
1040 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
1041 
1042 /**
1043  * eeh_add_device_late - Perform EEH initialization for the indicated pci device
1044  * @dev: pci device for which to set up EEH
1045  *
1046  * This routine must be used to complete EEH initialization for PCI
1047  * devices that were added after system boot (e.g. hotplug, dlpar).
1048  */
1049 void eeh_add_device_late(struct pci_dev *dev)
1050 {
1051         struct device_node *dn;
1052         struct eeh_dev *edev;
1053 
1054         if (!dev || !eeh_enabled())
1055                 return;
1056 
1057         pr_debug("EEH: Adding device %s\n", pci_name(dev));
1058 
1059         dn = pci_device_to_OF_node(dev);
1060         edev = of_node_to_eeh_dev(dn);
1061         if (edev->pdev == dev) {
1062                 pr_debug("EEH: Already referenced !\n");
1063                 return;
1064         }
1065 
1066         /*
1067          * The EEH cache might not be removed correctly because of
1068          * unbalanced kref to the device during unplug time, which
1069          * relies on pcibios_release_device(). So we have to remove
1070          * that here explicitly.
1071          */
1072         if (edev->pdev) {
1073                 eeh_rmv_from_parent_pe(edev);
1074                 eeh_addr_cache_rmv_dev(edev->pdev);
1075                 eeh_sysfs_remove_device(edev->pdev);
1076                 edev->mode &= ~EEH_DEV_SYSFS;
1077 
1078                 /*
1079                  * We definitely should have the PCI device removed
1080                  * though it wasn't correctly. So we needn't call
1081                  * into error handler afterwards.
1082                  */
1083                 edev->mode |= EEH_DEV_NO_HANDLER;
1084 
1085                 edev->pdev = NULL;
1086                 dev->dev.archdata.edev = NULL;
1087         }
1088 
1089         edev->pdev = dev;
1090         dev->dev.archdata.edev = edev;
1091 
1092         /*
1093          * We have to do the EEH probe here because the PCI device
1094          * hasn't been created yet in the early stage.
1095          */
1096         if (eeh_has_flag(EEH_PROBE_MODE_DEV))
1097                 eeh_ops->dev_probe(dev, NULL);
1098 
1099         eeh_addr_cache_insert_dev(dev);
1100 }
1101 
1102 /**
1103  * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
1104  * @bus: PCI bus
1105  *
1106  * This routine must be used to perform EEH initialization for PCI
1107  * devices which are attached to the indicated PCI bus. The PCI bus
1108  * is added after system boot through hotplug or dlpar.
1109  */
1110 void eeh_add_device_tree_late(struct pci_bus *bus)
1111 {
1112         struct pci_dev *dev;
1113 
1114         list_for_each_entry(dev, &bus->devices, bus_list) {
1115                 eeh_add_device_late(dev);
1116                 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1117                         struct pci_bus *subbus = dev->subordinate;
1118                         if (subbus)
1119                                 eeh_add_device_tree_late(subbus);
1120                 }
1121         }
1122 }
1123 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
1124 
1125 /**
1126  * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus
1127  * @bus: PCI bus
1128  *
1129  * This routine must be used to add EEH sysfs files for PCI
1130  * devices which are attached to the indicated PCI bus. The PCI bus
1131  * is added after system boot through hotplug or dlpar.
1132  */
1133 void eeh_add_sysfs_files(struct pci_bus *bus)
1134 {
1135         struct pci_dev *dev;
1136 
1137         list_for_each_entry(dev, &bus->devices, bus_list) {
1138                 eeh_sysfs_add_device(dev);
1139                 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1140                         struct pci_bus *subbus = dev->subordinate;
1141                         if (subbus)
1142                                 eeh_add_sysfs_files(subbus);
1143                 }
1144         }
1145 }
1146 EXPORT_SYMBOL_GPL(eeh_add_sysfs_files);
1147 
1148 /**
1149  * eeh_remove_device - Undo EEH setup for the indicated pci device
1150  * @dev: pci device to be removed
1151  *
1152  * This routine should be called when a device is removed from
1153  * a running system (e.g. by hotplug or dlpar).  It unregisters
1154  * the PCI device from the EEH subsystem.  I/O errors affecting
1155  * this device will no longer be detected after this call; thus,
1156  * i/o errors affecting this slot may leave this device unusable.
1157  */
1158 void eeh_remove_device(struct pci_dev *dev)
1159 {
1160         struct eeh_dev *edev;
1161 
1162         if (!dev || !eeh_enabled())
1163                 return;
1164         edev = pci_dev_to_eeh_dev(dev);
1165 
1166         /* Unregister the device with the EEH/PCI address search system */
1167         pr_debug("EEH: Removing device %s\n", pci_name(dev));
1168 
1169         if (!edev || !edev->pdev || !edev->pe) {
1170                 pr_debug("EEH: Not referenced !\n");
1171                 return;
1172         }
1173 
1174         /*
1175          * During the hotplug for EEH error recovery, we need the EEH
1176          * device attached to the parent PE in order for BAR restore
1177          * a bit later. So we keep it for BAR restore and remove it
1178          * from the parent PE during the BAR resotre.
1179          */
1180         edev->pdev = NULL;
1181         dev->dev.archdata.edev = NULL;
1182         if (!(edev->pe->state & EEH_PE_KEEP))
1183                 eeh_rmv_from_parent_pe(edev);
1184         else
1185                 edev->mode |= EEH_DEV_DISCONNECTED;
1186 
1187         /*
1188          * We're removing from the PCI subsystem, that means
1189          * the PCI device driver can't support EEH or not
1190          * well. So we rely on hotplug completely to do recovery
1191          * for the specific PCI device.
1192          */
1193         edev->mode |= EEH_DEV_NO_HANDLER;
1194 
1195         eeh_addr_cache_rmv_dev(dev);
1196         eeh_sysfs_remove_device(dev);
1197         edev->mode &= ~EEH_DEV_SYSFS;
1198 }
1199 
1200 int eeh_unfreeze_pe(struct eeh_pe *pe, bool sw_state)
1201 {
1202         int ret;
1203 
1204         ret = eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
1205         if (ret) {
1206                 pr_warn("%s: Failure %d enabling IO on PHB#%x-PE#%x\n",
1207                         __func__, ret, pe->phb->global_number, pe->addr);
1208                 return ret;
1209         }
1210 
1211         ret = eeh_pci_enable(pe, EEH_OPT_THAW_DMA);
1212         if (ret) {
1213                 pr_warn("%s: Failure %d enabling DMA on PHB#%x-PE#%x\n",
1214                         __func__, ret, pe->phb->global_number, pe->addr);
1215                 return ret;
1216         }
1217 
1218         /* Clear software isolated state */
1219         if (sw_state && (pe->state & EEH_PE_ISOLATED))
1220                 eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
1221 
1222         return ret;
1223 }
1224 
1225 
1226 static struct pci_device_id eeh_reset_ids[] = {
1227         { PCI_DEVICE(0x19a2, 0x0710) }, /* Emulex, BE     */
1228         { PCI_DEVICE(0x10df, 0xe220) }, /* Emulex, Lancer */
1229         { PCI_DEVICE(0x14e4, 0x1657) }, /* Broadcom BCM5719 */
1230         { 0 }
1231 };
1232 
1233 static int eeh_pe_change_owner(struct eeh_pe *pe)
1234 {
1235         struct eeh_dev *edev, *tmp;
1236         struct pci_dev *pdev;
1237         struct pci_device_id *id;
1238         int flags, ret;
1239 
1240         /* Check PE state */
1241         flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
1242         ret = eeh_ops->get_state(pe, NULL);
1243         if (ret < 0 || ret == EEH_STATE_NOT_SUPPORT)
1244                 return 0;
1245 
1246         /* Unfrozen PE, nothing to do */
1247         if ((ret & flags) == flags)
1248                 return 0;
1249 
1250         /* Frozen PE, check if it needs PE level reset */
1251         eeh_pe_for_each_dev(pe, edev, tmp) {
1252                 pdev = eeh_dev_to_pci_dev(edev);
1253                 if (!pdev)
1254                         continue;
1255 
1256                 for (id = &eeh_reset_ids[0]; id->vendor != 0; id++) {
1257                         if (id->vendor != PCI_ANY_ID &&
1258                             id->vendor != pdev->vendor)
1259                                 continue;
1260                         if (id->device != PCI_ANY_ID &&
1261                             id->device != pdev->device)
1262                                 continue;
1263                         if (id->subvendor != PCI_ANY_ID &&
1264                             id->subvendor != pdev->subsystem_vendor)
1265                                 continue;
1266                         if (id->subdevice != PCI_ANY_ID &&
1267                             id->subdevice != pdev->subsystem_device)
1268                                 continue;
1269 
1270                         goto reset;
1271                 }
1272         }
1273 
1274         return eeh_unfreeze_pe(pe, true);
1275 
1276 reset:
1277         return eeh_pe_reset_and_recover(pe);
1278 }
1279 
1280 /**
1281  * eeh_dev_open - Increase count of pass through devices for PE
1282  * @pdev: PCI device
1283  *
1284  * Increase count of passed through devices for the indicated
1285  * PE. In the result, the EEH errors detected on the PE won't be
1286  * reported. The PE owner will be responsible for detection
1287  * and recovery.
1288  */
1289 int eeh_dev_open(struct pci_dev *pdev)
1290 {
1291         struct eeh_dev *edev;
1292         int ret = -ENODEV;
1293 
1294         mutex_lock(&eeh_dev_mutex);
1295 
1296         /* No PCI device ? */
1297         if (!pdev)
1298                 goto out;
1299 
1300         /* No EEH device or PE ? */
1301         edev = pci_dev_to_eeh_dev(pdev);
1302         if (!edev || !edev->pe)
1303                 goto out;
1304 
1305         /*
1306          * The PE might have been put into frozen state, but we
1307          * didn't detect that yet. The passed through PCI devices
1308          * in frozen PE won't work properly. Clear the frozen state
1309          * in advance.
1310          */
1311         ret = eeh_pe_change_owner(edev->pe);
1312         if (ret)
1313                 goto out;
1314 
1315         /* Increase PE's pass through count */
1316         atomic_inc(&edev->pe->pass_dev_cnt);
1317         mutex_unlock(&eeh_dev_mutex);
1318 
1319         return 0;
1320 out:
1321         mutex_unlock(&eeh_dev_mutex);
1322         return ret;
1323 }
1324 EXPORT_SYMBOL_GPL(eeh_dev_open);
1325 
1326 /**
1327  * eeh_dev_release - Decrease count of pass through devices for PE
1328  * @pdev: PCI device
1329  *
1330  * Decrease count of pass through devices for the indicated PE. If
1331  * there is no passed through device in PE, the EEH errors detected
1332  * on the PE will be reported and handled as usual.
1333  */
1334 void eeh_dev_release(struct pci_dev *pdev)
1335 {
1336         struct eeh_dev *edev;
1337 
1338         mutex_lock(&eeh_dev_mutex);
1339 
1340         /* No PCI device ? */
1341         if (!pdev)
1342                 goto out;
1343 
1344         /* No EEH device ? */
1345         edev = pci_dev_to_eeh_dev(pdev);
1346         if (!edev || !edev->pe || !eeh_pe_passed(edev->pe))
1347                 goto out;
1348 
1349         /* Decrease PE's pass through count */
1350         atomic_dec(&edev->pe->pass_dev_cnt);
1351         WARN_ON(atomic_read(&edev->pe->pass_dev_cnt) < 0);
1352         eeh_pe_change_owner(edev->pe);
1353 out:
1354         mutex_unlock(&eeh_dev_mutex);
1355 }
1356 EXPORT_SYMBOL(eeh_dev_release);
1357 
1358 #ifdef CONFIG_IOMMU_API
1359 
1360 static int dev_has_iommu_table(struct device *dev, void *data)
1361 {
1362         struct pci_dev *pdev = to_pci_dev(dev);
1363         struct pci_dev **ppdev = data;
1364         struct iommu_table *tbl;
1365 
1366         if (!dev)
1367                 return 0;
1368 
1369         tbl = get_iommu_table_base(dev);
1370         if (tbl && tbl->it_group) {
1371                 *ppdev = pdev;
1372                 return 1;
1373         }
1374 
1375         return 0;
1376 }
1377 
1378 /**
1379  * eeh_iommu_group_to_pe - Convert IOMMU group to EEH PE
1380  * @group: IOMMU group
1381  *
1382  * The routine is called to convert IOMMU group to EEH PE.
1383  */
1384 struct eeh_pe *eeh_iommu_group_to_pe(struct iommu_group *group)
1385 {
1386         struct pci_dev *pdev = NULL;
1387         struct eeh_dev *edev;
1388         int ret;
1389 
1390         /* No IOMMU group ? */
1391         if (!group)
1392                 return NULL;
1393 
1394         ret = iommu_group_for_each_dev(group, &pdev, dev_has_iommu_table);
1395         if (!ret || !pdev)
1396                 return NULL;
1397 
1398         /* No EEH device or PE ? */
1399         edev = pci_dev_to_eeh_dev(pdev);
1400         if (!edev || !edev->pe)
1401                 return NULL;
1402 
1403         return edev->pe;
1404 }
1405 EXPORT_SYMBOL_GPL(eeh_iommu_group_to_pe);
1406 
1407 #endif /* CONFIG_IOMMU_API */
1408 
1409 /**
1410  * eeh_pe_set_option - Set options for the indicated PE
1411  * @pe: EEH PE
1412  * @option: requested option
1413  *
1414  * The routine is called to enable or disable EEH functionality
1415  * on the indicated PE, to enable IO or DMA for the frozen PE.
1416  */
1417 int eeh_pe_set_option(struct eeh_pe *pe, int option)
1418 {
1419         int ret = 0;
1420 
1421         /* Invalid PE ? */
1422         if (!pe)
1423                 return -ENODEV;
1424 
1425         /*
1426          * EEH functionality could possibly be disabled, just
1427          * return error for the case. And the EEH functinality
1428          * isn't expected to be disabled on one specific PE.
1429          */
1430         switch (option) {
1431         case EEH_OPT_ENABLE:
1432                 if (eeh_enabled()) {
1433                         ret = eeh_pe_change_owner(pe);
1434                         break;
1435                 }
1436                 ret = -EIO;
1437                 break;
1438         case EEH_OPT_DISABLE:
1439                 break;
1440         case EEH_OPT_THAW_MMIO:
1441         case EEH_OPT_THAW_DMA:
1442                 if (!eeh_ops || !eeh_ops->set_option) {
1443                         ret = -ENOENT;
1444                         break;
1445                 }
1446 
1447                 ret = eeh_pci_enable(pe, option);
1448                 break;
1449         default:
1450                 pr_debug("%s: Option %d out of range (%d, %d)\n",
1451                         __func__, option, EEH_OPT_DISABLE, EEH_OPT_THAW_DMA);
1452                 ret = -EINVAL;
1453         }
1454 
1455         return ret;
1456 }
1457 EXPORT_SYMBOL_GPL(eeh_pe_set_option);
1458 
1459 /**
1460  * eeh_pe_get_state - Retrieve PE's state
1461  * @pe: EEH PE
1462  *
1463  * Retrieve the PE's state, which includes 3 aspects: enabled
1464  * DMA, enabled IO and asserted reset.
1465  */
1466 int eeh_pe_get_state(struct eeh_pe *pe)
1467 {
1468         int result, ret = 0;
1469         bool rst_active, dma_en, mmio_en;
1470 
1471         /* Existing PE ? */
1472         if (!pe)
1473                 return -ENODEV;
1474 
1475         if (!eeh_ops || !eeh_ops->get_state)
1476                 return -ENOENT;
1477 
1478         result = eeh_ops->get_state(pe, NULL);
1479         rst_active = !!(result & EEH_STATE_RESET_ACTIVE);
1480         dma_en = !!(result & EEH_STATE_DMA_ENABLED);
1481         mmio_en = !!(result & EEH_STATE_MMIO_ENABLED);
1482 
1483         if (rst_active)
1484                 ret = EEH_PE_STATE_RESET;
1485         else if (dma_en && mmio_en)
1486                 ret = EEH_PE_STATE_NORMAL;
1487         else if (!dma_en && !mmio_en)
1488                 ret = EEH_PE_STATE_STOPPED_IO_DMA;
1489         else if (!dma_en && mmio_en)
1490                 ret = EEH_PE_STATE_STOPPED_DMA;
1491         else
1492                 ret = EEH_PE_STATE_UNAVAIL;
1493 
1494         return ret;
1495 }
1496 EXPORT_SYMBOL_GPL(eeh_pe_get_state);
1497 
1498 static int eeh_pe_reenable_devices(struct eeh_pe *pe)
1499 {
1500         struct eeh_dev *edev, *tmp;
1501         struct pci_dev *pdev;
1502         int ret = 0;
1503 
1504         /* Restore config space */
1505         eeh_pe_restore_bars(pe);
1506 
1507         /*
1508          * Reenable PCI devices as the devices passed
1509          * through are always enabled before the reset.
1510          */
1511         eeh_pe_for_each_dev(pe, edev, tmp) {
1512                 pdev = eeh_dev_to_pci_dev(edev);
1513                 if (!pdev)
1514                         continue;
1515 
1516                 ret = pci_reenable_device(pdev);
1517                 if (ret) {
1518                         pr_warn("%s: Failure %d reenabling %s\n",
1519                                 __func__, ret, pci_name(pdev));
1520                         return ret;
1521                 }
1522         }
1523 
1524         /* The PE is still in frozen state */
1525         return eeh_unfreeze_pe(pe, true);
1526 }
1527 
1528 /**
1529  * eeh_pe_reset - Issue PE reset according to specified type
1530  * @pe: EEH PE
1531  * @option: reset type
1532  *
1533  * The routine is called to reset the specified PE with the
1534  * indicated type, either fundamental reset or hot reset.
1535  * PE reset is the most important part for error recovery.
1536  */
1537 int eeh_pe_reset(struct eeh_pe *pe, int option)
1538 {
1539         int ret = 0;
1540 
1541         /* Invalid PE ? */
1542         if (!pe)
1543                 return -ENODEV;
1544 
1545         if (!eeh_ops || !eeh_ops->set_option || !eeh_ops->reset)
1546                 return -ENOENT;
1547 
1548         switch (option) {
1549         case EEH_RESET_DEACTIVATE:
1550                 ret = eeh_ops->reset(pe, option);
1551                 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
1552                 if (ret)
1553                         break;
1554 
1555                 ret = eeh_pe_reenable_devices(pe);
1556                 break;
1557         case EEH_RESET_HOT:
1558         case EEH_RESET_FUNDAMENTAL:
1559                 /*
1560                  * Proactively freeze the PE to drop all MMIO access
1561                  * during reset, which should be banned as it's always
1562                  * cause recursive EEH error.
1563                  */
1564                 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
1565 
1566                 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
1567                 ret = eeh_ops->reset(pe, option);
1568                 break;
1569         default:
1570                 pr_debug("%s: Unsupported option %d\n",
1571                         __func__, option);
1572                 ret = -EINVAL;
1573         }
1574 
1575         return ret;
1576 }
1577 EXPORT_SYMBOL_GPL(eeh_pe_reset);
1578 
1579 /**
1580  * eeh_pe_configure - Configure PCI bridges after PE reset
1581  * @pe: EEH PE
1582  *
1583  * The routine is called to restore the PCI config space for
1584  * those PCI devices, especially PCI bridges affected by PE
1585  * reset issued previously.
1586  */
1587 int eeh_pe_configure(struct eeh_pe *pe)
1588 {
1589         int ret = 0;
1590 
1591         /* Invalid PE ? */
1592         if (!pe)
1593                 return -ENODEV;
1594 
1595         return ret;
1596 }
1597 EXPORT_SYMBOL_GPL(eeh_pe_configure);
1598 
1599 static int proc_eeh_show(struct seq_file *m, void *v)
1600 {
1601         if (!eeh_enabled()) {
1602                 seq_printf(m, "EEH Subsystem is globally disabled\n");
1603                 seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs);
1604         } else {
1605                 seq_printf(m, "EEH Subsystem is enabled\n");
1606                 seq_printf(m,
1607                                 "no device=%llu\n"
1608                                 "no device node=%llu\n"
1609                                 "no config address=%llu\n"
1610                                 "check not wanted=%llu\n"
1611                                 "eeh_total_mmio_ffs=%llu\n"
1612                                 "eeh_false_positives=%llu\n"
1613                                 "eeh_slot_resets=%llu\n",
1614                                 eeh_stats.no_device,
1615                                 eeh_stats.no_dn,
1616                                 eeh_stats.no_cfg_addr,
1617                                 eeh_stats.ignored_check,
1618                                 eeh_stats.total_mmio_ffs,
1619                                 eeh_stats.false_positives,
1620                                 eeh_stats.slot_resets);
1621         }
1622 
1623         return 0;
1624 }
1625 
1626 static int proc_eeh_open(struct inode *inode, struct file *file)
1627 {
1628         return single_open(file, proc_eeh_show, NULL);
1629 }
1630 
1631 static const struct file_operations proc_eeh_operations = {
1632         .open      = proc_eeh_open,
1633         .read      = seq_read,
1634         .llseek    = seq_lseek,
1635         .release   = single_release,
1636 };
1637 
1638 #ifdef CONFIG_DEBUG_FS
1639 static int eeh_enable_dbgfs_set(void *data, u64 val)
1640 {
1641         if (val)
1642                 eeh_clear_flag(EEH_FORCE_DISABLED);
1643         else
1644                 eeh_add_flag(EEH_FORCE_DISABLED);
1645 
1646         /* Notify the backend */
1647         if (eeh_ops->post_init)
1648                 eeh_ops->post_init();
1649 
1650         return 0;
1651 }
1652 
1653 static int eeh_enable_dbgfs_get(void *data, u64 *val)
1654 {
1655         if (eeh_enabled())
1656                 *val = 0x1ul;
1657         else
1658                 *val = 0x0ul;
1659         return 0;
1660 }
1661 
1662 static int eeh_freeze_dbgfs_set(void *data, u64 val)
1663 {
1664         eeh_max_freezes = val;
1665         return 0;
1666 }
1667 
1668 static int eeh_freeze_dbgfs_get(void *data, u64 *val)
1669 {
1670         *val = eeh_max_freezes;
1671         return 0;
1672 }
1673 
1674 DEFINE_SIMPLE_ATTRIBUTE(eeh_enable_dbgfs_ops, eeh_enable_dbgfs_get,
1675                         eeh_enable_dbgfs_set, "0x%llx\n");
1676 DEFINE_SIMPLE_ATTRIBUTE(eeh_freeze_dbgfs_ops, eeh_freeze_dbgfs_get,
1677                         eeh_freeze_dbgfs_set, "0x%llx\n");
1678 #endif
1679 
1680 static int __init eeh_init_proc(void)
1681 {
1682         if (machine_is(pseries) || machine_is(powernv)) {
1683                 proc_create("powerpc/eeh", 0, NULL, &proc_eeh_operations);
1684 #ifdef CONFIG_DEBUG_FS
1685                 debugfs_create_file("eeh_enable", 0600,
1686                                     powerpc_debugfs_root, NULL,
1687                                     &eeh_enable_dbgfs_ops);
1688                 debugfs_create_file("eeh_max_freezes", 0600,
1689                                     powerpc_debugfs_root, NULL,
1690                                     &eeh_freeze_dbgfs_ops);
1691 #endif
1692         }
1693 
1694         return 0;
1695 }
1696 __initcall(eeh_init_proc);
1697 

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