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Linux/arch/powerpc/kernel/irq.c

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  1 /*
  2  *  Derived from arch/i386/kernel/irq.c
  3  *    Copyright (C) 1992 Linus Torvalds
  4  *  Adapted from arch/i386 by Gary Thomas
  5  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  6  *  Updated and modified by Cort Dougan <cort@fsmlabs.com>
  7  *    Copyright (C) 1996-2001 Cort Dougan
  8  *  Adapted for Power Macintosh by Paul Mackerras
  9  *    Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
 10  *
 11  * This program is free software; you can redistribute it and/or
 12  * modify it under the terms of the GNU General Public License
 13  * as published by the Free Software Foundation; either version
 14  * 2 of the License, or (at your option) any later version.
 15  *
 16  * This file contains the code used by various IRQ handling routines:
 17  * asking for different IRQ's should be done through these routines
 18  * instead of just grabbing them. Thus setups with different IRQ numbers
 19  * shouldn't result in any weird surprises, and installing new handlers
 20  * should be easier.
 21  *
 22  * The MPC8xx has an interrupt mask in the SIU.  If a bit is set, the
 23  * interrupt is _enabled_.  As expected, IRQ0 is bit 0 in the 32-bit
 24  * mask register (of which only 16 are defined), hence the weird shifting
 25  * and complement of the cached_irq_mask.  I want to be able to stuff
 26  * this right into the SIU SMASK register.
 27  * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
 28  * to reduce code space and undefined function references.
 29  */
 30 
 31 #undef DEBUG
 32 
 33 #include <linux/export.h>
 34 #include <linux/threads.h>
 35 #include <linux/kernel_stat.h>
 36 #include <linux/signal.h>
 37 #include <linux/sched.h>
 38 #include <linux/ptrace.h>
 39 #include <linux/ioport.h>
 40 #include <linux/interrupt.h>
 41 #include <linux/timex.h>
 42 #include <linux/init.h>
 43 #include <linux/slab.h>
 44 #include <linux/delay.h>
 45 #include <linux/irq.h>
 46 #include <linux/seq_file.h>
 47 #include <linux/cpumask.h>
 48 #include <linux/profile.h>
 49 #include <linux/bitops.h>
 50 #include <linux/list.h>
 51 #include <linux/radix-tree.h>
 52 #include <linux/mutex.h>
 53 #include <linux/bootmem.h>
 54 #include <linux/pci.h>
 55 #include <linux/debugfs.h>
 56 #include <linux/of.h>
 57 #include <linux/of_irq.h>
 58 
 59 #include <asm/uaccess.h>
 60 #include <asm/io.h>
 61 #include <asm/pgtable.h>
 62 #include <asm/irq.h>
 63 #include <asm/cache.h>
 64 #include <asm/prom.h>
 65 #include <asm/ptrace.h>
 66 #include <asm/machdep.h>
 67 #include <asm/udbg.h>
 68 #include <asm/smp.h>
 69 #include <asm/debug.h>
 70 
 71 #ifdef CONFIG_PPC64
 72 #include <asm/paca.h>
 73 #include <asm/firmware.h>
 74 #include <asm/lv1call.h>
 75 #endif
 76 #define CREATE_TRACE_POINTS
 77 #include <asm/trace.h>
 78 
 79 DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
 80 EXPORT_PER_CPU_SYMBOL(irq_stat);
 81 
 82 int __irq_offset_value;
 83 
 84 #ifdef CONFIG_PPC32
 85 EXPORT_SYMBOL(__irq_offset_value);
 86 atomic_t ppc_n_lost_interrupts;
 87 
 88 #ifdef CONFIG_TAU_INT
 89 extern int tau_initialized;
 90 extern int tau_interrupts(int);
 91 #endif
 92 #endif /* CONFIG_PPC32 */
 93 
 94 #ifdef CONFIG_PPC64
 95 
 96 int distribute_irqs = 1;
 97 
 98 static inline notrace unsigned long get_irq_happened(void)
 99 {
100         unsigned long happened;
101 
102         __asm__ __volatile__("lbz %0,%1(13)"
103         : "=r" (happened) : "i" (offsetof(struct paca_struct, irq_happened)));
104 
105         return happened;
106 }
107 
108 static inline notrace void set_soft_enabled(unsigned long enable)
109 {
110         __asm__ __volatile__("stb %0,%1(13)"
111         : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled)));
112 }
113 
114 static inline notrace int decrementer_check_overflow(void)
115 {
116         u64 now = get_tb_or_rtc();
117         u64 *next_tb = &__get_cpu_var(decrementers_next_tb);
118  
119         return now >= *next_tb;
120 }
121 
122 /* This is called whenever we are re-enabling interrupts
123  * and returns either 0 (nothing to do) or 500/900/280/a00/e80 if
124  * there's an EE, DEC or DBELL to generate.
125  *
126  * This is called in two contexts: From arch_local_irq_restore()
127  * before soft-enabling interrupts, and from the exception exit
128  * path when returning from an interrupt from a soft-disabled to
129  * a soft enabled context. In both case we have interrupts hard
130  * disabled.
131  *
132  * We take care of only clearing the bits we handled in the
133  * PACA irq_happened field since we can only re-emit one at a
134  * time and we don't want to "lose" one.
135  */
136 notrace unsigned int __check_irq_replay(void)
137 {
138         /*
139          * We use local_paca rather than get_paca() to avoid all
140          * the debug_smp_processor_id() business in this low level
141          * function
142          */
143         unsigned char happened = local_paca->irq_happened;
144 
145         /* Clear bit 0 which we wouldn't clear otherwise */
146         local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS;
147 
148         /*
149          * Force the delivery of pending soft-disabled interrupts on PS3.
150          * Any HV call will have this side effect.
151          */
152         if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
153                 u64 tmp, tmp2;
154                 lv1_get_version_info(&tmp, &tmp2);
155         }
156 
157         /*
158          * We may have missed a decrementer interrupt. We check the
159          * decrementer itself rather than the paca irq_happened field
160          * in case we also had a rollover while hard disabled
161          */
162         local_paca->irq_happened &= ~PACA_IRQ_DEC;
163         if ((happened & PACA_IRQ_DEC) || decrementer_check_overflow())
164                 return 0x900;
165 
166         /* Finally check if an external interrupt happened */
167         local_paca->irq_happened &= ~PACA_IRQ_EE;
168         if (happened & PACA_IRQ_EE)
169                 return 0x500;
170 
171 #ifdef CONFIG_PPC_BOOK3E
172         /* Finally check if an EPR external interrupt happened
173          * this bit is typically set if we need to handle another
174          * "edge" interrupt from within the MPIC "EPR" handler
175          */
176         local_paca->irq_happened &= ~PACA_IRQ_EE_EDGE;
177         if (happened & PACA_IRQ_EE_EDGE)
178                 return 0x500;
179 
180         local_paca->irq_happened &= ~PACA_IRQ_DBELL;
181         if (happened & PACA_IRQ_DBELL)
182                 return 0x280;
183 #else
184         local_paca->irq_happened &= ~PACA_IRQ_DBELL;
185         if (happened & PACA_IRQ_DBELL) {
186                 if (cpu_has_feature(CPU_FTR_HVMODE))
187                         return 0xe80;
188                 return 0xa00;
189         }
190 #endif /* CONFIG_PPC_BOOK3E */
191 
192         /* There should be nothing left ! */
193         BUG_ON(local_paca->irq_happened != 0);
194 
195         return 0;
196 }
197 
198 notrace void arch_local_irq_restore(unsigned long en)
199 {
200         unsigned char irq_happened;
201         unsigned int replay;
202 
203         /* Write the new soft-enabled value */
204         set_soft_enabled(en);
205         if (!en)
206                 return;
207         /*
208          * From this point onward, we can take interrupts, preempt,
209          * etc... unless we got hard-disabled. We check if an event
210          * happened. If none happened, we know we can just return.
211          *
212          * We may have preempted before the check below, in which case
213          * we are checking the "new" CPU instead of the old one. This
214          * is only a problem if an event happened on the "old" CPU.
215          *
216          * External interrupt events will have caused interrupts to
217          * be hard-disabled, so there is no problem, we
218          * cannot have preempted.
219          */
220         irq_happened = get_irq_happened();
221         if (!irq_happened)
222                 return;
223 
224         /*
225          * We need to hard disable to get a trusted value from
226          * __check_irq_replay(). We also need to soft-disable
227          * again to avoid warnings in there due to the use of
228          * per-cpu variables.
229          *
230          * We know that if the value in irq_happened is exactly 0x01
231          * then we are already hard disabled (there are other less
232          * common cases that we'll ignore for now), so we skip the
233          * (expensive) mtmsrd.
234          */
235         if (unlikely(irq_happened != PACA_IRQ_HARD_DIS))
236                 __hard_irq_disable();
237 #ifdef CONFIG_TRACE_IRQFLAGS
238         else {
239                 /*
240                  * We should already be hard disabled here. We had bugs
241                  * where that wasn't the case so let's dbl check it and
242                  * warn if we are wrong. Only do that when IRQ tracing
243                  * is enabled as mfmsr() can be costly.
244                  */
245                 if (WARN_ON(mfmsr() & MSR_EE))
246                         __hard_irq_disable();
247         }
248 #endif /* CONFIG_TRACE_IRQFLAG */
249 
250         set_soft_enabled(0);
251 
252         /*
253          * Check if anything needs to be re-emitted. We haven't
254          * soft-enabled yet to avoid warnings in decrementer_check_overflow
255          * accessing per-cpu variables
256          */
257         replay = __check_irq_replay();
258 
259         /* We can soft-enable now */
260         set_soft_enabled(1);
261 
262         /*
263          * And replay if we have to. This will return with interrupts
264          * hard-enabled.
265          */
266         if (replay) {
267                 __replay_interrupt(replay);
268                 return;
269         }
270 
271         /* Finally, let's ensure we are hard enabled */
272         __hard_irq_enable();
273 }
274 EXPORT_SYMBOL(arch_local_irq_restore);
275 
276 /*
277  * This is specifically called by assembly code to re-enable interrupts
278  * if they are currently disabled. This is typically called before
279  * schedule() or do_signal() when returning to userspace. We do it
280  * in C to avoid the burden of dealing with lockdep etc...
281  *
282  * NOTE: This is called with interrupts hard disabled but not marked
283  * as such in paca->irq_happened, so we need to resync this.
284  */
285 void notrace restore_interrupts(void)
286 {
287         if (irqs_disabled()) {
288                 local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
289                 local_irq_enable();
290         } else
291                 __hard_irq_enable();
292 }
293 
294 /*
295  * This is a helper to use when about to go into idle low-power
296  * when the latter has the side effect of re-enabling interrupts
297  * (such as calling H_CEDE under pHyp).
298  *
299  * You call this function with interrupts soft-disabled (this is
300  * already the case when ppc_md.power_save is called). The function
301  * will return whether to enter power save or just return.
302  *
303  * In the former case, it will have notified lockdep of interrupts
304  * being re-enabled and generally sanitized the lazy irq state,
305  * and in the latter case it will leave with interrupts hard
306  * disabled and marked as such, so the local_irq_enable() call
307  * in cpu_idle() will properly re-enable everything.
308  */
309 bool prep_irq_for_idle(void)
310 {
311         /*
312          * First we need to hard disable to ensure no interrupt
313          * occurs before we effectively enter the low power state
314          */
315         hard_irq_disable();
316 
317         /*
318          * If anything happened while we were soft-disabled,
319          * we return now and do not enter the low power state.
320          */
321         if (lazy_irq_pending())
322                 return false;
323 
324         /* Tell lockdep we are about to re-enable */
325         trace_hardirqs_on();
326 
327         /*
328          * Mark interrupts as soft-enabled and clear the
329          * PACA_IRQ_HARD_DIS from the pending mask since we
330          * are about to hard enable as well as a side effect
331          * of entering the low power state.
332          */
333         local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS;
334         local_paca->soft_enabled = 1;
335 
336         /* Tell the caller to enter the low power state */
337         return true;
338 }
339 
340 #endif /* CONFIG_PPC64 */
341 
342 int arch_show_interrupts(struct seq_file *p, int prec)
343 {
344         int j;
345 
346 #if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT)
347         if (tau_initialized) {
348                 seq_printf(p, "%*s: ", prec, "TAU");
349                 for_each_online_cpu(j)
350                         seq_printf(p, "%10u ", tau_interrupts(j));
351                 seq_puts(p, "  PowerPC             Thermal Assist (cpu temp)\n");
352         }
353 #endif /* CONFIG_PPC32 && CONFIG_TAU_INT */
354 
355         seq_printf(p, "%*s: ", prec, "LOC");
356         for_each_online_cpu(j)
357                 seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs);
358         seq_printf(p, "  Local timer interrupts\n");
359 
360         seq_printf(p, "%*s: ", prec, "SPU");
361         for_each_online_cpu(j)
362                 seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs);
363         seq_printf(p, "  Spurious interrupts\n");
364 
365         seq_printf(p, "%*s: ", prec, "PMI");
366         for_each_online_cpu(j)
367                 seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs);
368         seq_printf(p, "  Performance monitoring interrupts\n");
369 
370         seq_printf(p, "%*s: ", prec, "MCE");
371         for_each_online_cpu(j)
372                 seq_printf(p, "%10u ", per_cpu(irq_stat, j).mce_exceptions);
373         seq_printf(p, "  Machine check exceptions\n");
374 
375 #ifdef CONFIG_PPC_DOORBELL
376         if (cpu_has_feature(CPU_FTR_DBELL)) {
377                 seq_printf(p, "%*s: ", prec, "DBL");
378                 for_each_online_cpu(j)
379                         seq_printf(p, "%10u ", per_cpu(irq_stat, j).doorbell_irqs);
380                 seq_printf(p, "  Doorbell interrupts\n");
381         }
382 #endif
383 
384         return 0;
385 }
386 
387 /*
388  * /proc/stat helpers
389  */
390 u64 arch_irq_stat_cpu(unsigned int cpu)
391 {
392         u64 sum = per_cpu(irq_stat, cpu).timer_irqs;
393 
394         sum += per_cpu(irq_stat, cpu).pmu_irqs;
395         sum += per_cpu(irq_stat, cpu).mce_exceptions;
396         sum += per_cpu(irq_stat, cpu).spurious_irqs;
397 #ifdef CONFIG_PPC_DOORBELL
398         sum += per_cpu(irq_stat, cpu).doorbell_irqs;
399 #endif
400 
401         return sum;
402 }
403 
404 #ifdef CONFIG_HOTPLUG_CPU
405 void migrate_irqs(void)
406 {
407         struct irq_desc *desc;
408         unsigned int irq;
409         static int warned;
410         cpumask_var_t mask;
411         const struct cpumask *map = cpu_online_mask;
412 
413         alloc_cpumask_var(&mask, GFP_KERNEL);
414 
415         for_each_irq_desc(irq, desc) {
416                 struct irq_data *data;
417                 struct irq_chip *chip;
418 
419                 data = irq_desc_get_irq_data(desc);
420                 if (irqd_is_per_cpu(data))
421                         continue;
422 
423                 chip = irq_data_get_irq_chip(data);
424 
425                 cpumask_and(mask, data->affinity, map);
426                 if (cpumask_any(mask) >= nr_cpu_ids) {
427                         printk("Breaking affinity for irq %i\n", irq);
428                         cpumask_copy(mask, map);
429                 }
430                 if (chip->irq_set_affinity)
431                         chip->irq_set_affinity(data, mask, true);
432                 else if (desc->action && !(warned++))
433                         printk("Cannot set affinity for irq %i\n", irq);
434         }
435 
436         free_cpumask_var(mask);
437 
438         local_irq_enable();
439         mdelay(1);
440         local_irq_disable();
441 }
442 #endif
443 
444 static inline void handle_one_irq(unsigned int irq)
445 {
446         struct thread_info *curtp, *irqtp;
447         unsigned long saved_sp_limit;
448         struct irq_desc *desc;
449 
450         desc = irq_to_desc(irq);
451         if (!desc)
452                 return;
453 
454         /* Switch to the irq stack to handle this */
455         curtp = current_thread_info();
456         irqtp = hardirq_ctx[smp_processor_id()];
457 
458         if (curtp == irqtp) {
459                 /* We're already on the irq stack, just handle it */
460                 desc->handle_irq(irq, desc);
461                 return;
462         }
463 
464         saved_sp_limit = current->thread.ksp_limit;
465 
466         irqtp->task = curtp->task;
467         irqtp->flags = 0;
468 
469         /* Copy the softirq bits in preempt_count so that the
470          * softirq checks work in the hardirq context. */
471         irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) |
472                                (curtp->preempt_count & SOFTIRQ_MASK);
473 
474         current->thread.ksp_limit = (unsigned long)irqtp +
475                 _ALIGN_UP(sizeof(struct thread_info), 16);
476 
477         call_handle_irq(irq, desc, irqtp, desc->handle_irq);
478         current->thread.ksp_limit = saved_sp_limit;
479         irqtp->task = NULL;
480 
481         /* Set any flag that may have been set on the
482          * alternate stack
483          */
484         if (irqtp->flags)
485                 set_bits(irqtp->flags, &curtp->flags);
486 }
487 
488 static inline void check_stack_overflow(void)
489 {
490 #ifdef CONFIG_DEBUG_STACKOVERFLOW
491         long sp;
492 
493         sp = __get_SP() & (THREAD_SIZE-1);
494 
495         /* check for stack overflow: is there less than 2KB free? */
496         if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
497                 printk("do_IRQ: stack overflow: %ld\n",
498                         sp - sizeof(struct thread_info));
499                 dump_stack();
500         }
501 #endif
502 }
503 
504 void do_IRQ(struct pt_regs *regs)
505 {
506         struct pt_regs *old_regs = set_irq_regs(regs);
507         unsigned int irq;
508 
509         irq_enter();
510 
511         trace_irq_entry(regs);
512 
513         check_stack_overflow();
514 
515         /*
516          * Query the platform PIC for the interrupt & ack it.
517          *
518          * This will typically lower the interrupt line to the CPU
519          */
520         irq = ppc_md.get_irq();
521 
522         /* We can hard enable interrupts now */
523         may_hard_irq_enable();
524 
525         /* And finally process it */
526         if (irq != NO_IRQ)
527                 handle_one_irq(irq);
528         else
529                 __get_cpu_var(irq_stat).spurious_irqs++;
530 
531         trace_irq_exit(regs);
532 
533         irq_exit();
534         set_irq_regs(old_regs);
535 }
536 
537 void __init init_IRQ(void)
538 {
539         if (ppc_md.init_IRQ)
540                 ppc_md.init_IRQ();
541 
542         exc_lvl_ctx_init();
543 
544         irq_ctx_init();
545 }
546 
547 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
548 struct thread_info   *critirq_ctx[NR_CPUS] __read_mostly;
549 struct thread_info    *dbgirq_ctx[NR_CPUS] __read_mostly;
550 struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly;
551 
552 void exc_lvl_ctx_init(void)
553 {
554         struct thread_info *tp;
555         int i, cpu_nr;
556 
557         for_each_possible_cpu(i) {
558 #ifdef CONFIG_PPC64
559                 cpu_nr = i;
560 #else
561                 cpu_nr = get_hard_smp_processor_id(i);
562 #endif
563                 memset((void *)critirq_ctx[cpu_nr], 0, THREAD_SIZE);
564                 tp = critirq_ctx[cpu_nr];
565                 tp->cpu = cpu_nr;
566                 tp->preempt_count = 0;
567 
568 #ifdef CONFIG_BOOKE
569                 memset((void *)dbgirq_ctx[cpu_nr], 0, THREAD_SIZE);
570                 tp = dbgirq_ctx[cpu_nr];
571                 tp->cpu = cpu_nr;
572                 tp->preempt_count = 0;
573 
574                 memset((void *)mcheckirq_ctx[cpu_nr], 0, THREAD_SIZE);
575                 tp = mcheckirq_ctx[cpu_nr];
576                 tp->cpu = cpu_nr;
577                 tp->preempt_count = HARDIRQ_OFFSET;
578 #endif
579         }
580 }
581 #endif
582 
583 struct thread_info *softirq_ctx[NR_CPUS] __read_mostly;
584 struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly;
585 
586 void irq_ctx_init(void)
587 {
588         struct thread_info *tp;
589         int i;
590 
591         for_each_possible_cpu(i) {
592                 memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
593                 tp = softirq_ctx[i];
594                 tp->cpu = i;
595                 tp->preempt_count = 0;
596 
597                 memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
598                 tp = hardirq_ctx[i];
599                 tp->cpu = i;
600                 tp->preempt_count = HARDIRQ_OFFSET;
601         }
602 }
603 
604 static inline void do_softirq_onstack(void)
605 {
606         struct thread_info *curtp, *irqtp;
607         unsigned long saved_sp_limit = current->thread.ksp_limit;
608 
609         curtp = current_thread_info();
610         irqtp = softirq_ctx[smp_processor_id()];
611         irqtp->task = curtp->task;
612         irqtp->flags = 0;
613         current->thread.ksp_limit = (unsigned long)irqtp +
614                                     _ALIGN_UP(sizeof(struct thread_info), 16);
615         call_do_softirq(irqtp);
616         current->thread.ksp_limit = saved_sp_limit;
617         irqtp->task = NULL;
618 
619         /* Set any flag that may have been set on the
620          * alternate stack
621          */
622         if (irqtp->flags)
623                 set_bits(irqtp->flags, &curtp->flags);
624 }
625 
626 void do_softirq(void)
627 {
628         unsigned long flags;
629 
630         if (in_interrupt())
631                 return;
632 
633         local_irq_save(flags);
634 
635         if (local_softirq_pending())
636                 do_softirq_onstack();
637 
638         local_irq_restore(flags);
639 }
640 
641 irq_hw_number_t virq_to_hw(unsigned int virq)
642 {
643         struct irq_data *irq_data = irq_get_irq_data(virq);
644         return WARN_ON(!irq_data) ? 0 : irq_data->hwirq;
645 }
646 EXPORT_SYMBOL_GPL(virq_to_hw);
647 
648 #ifdef CONFIG_SMP
649 int irq_choose_cpu(const struct cpumask *mask)
650 {
651         int cpuid;
652 
653         if (cpumask_equal(mask, cpu_online_mask)) {
654                 static int irq_rover;
655                 static DEFINE_RAW_SPINLOCK(irq_rover_lock);
656                 unsigned long flags;
657 
658                 /* Round-robin distribution... */
659 do_round_robin:
660                 raw_spin_lock_irqsave(&irq_rover_lock, flags);
661 
662                 irq_rover = cpumask_next(irq_rover, cpu_online_mask);
663                 if (irq_rover >= nr_cpu_ids)
664                         irq_rover = cpumask_first(cpu_online_mask);
665 
666                 cpuid = irq_rover;
667 
668                 raw_spin_unlock_irqrestore(&irq_rover_lock, flags);
669         } else {
670                 cpuid = cpumask_first_and(mask, cpu_online_mask);
671                 if (cpuid >= nr_cpu_ids)
672                         goto do_round_robin;
673         }
674 
675         return get_hard_smp_processor_id(cpuid);
676 }
677 #else
678 int irq_choose_cpu(const struct cpumask *mask)
679 {
680         return hard_smp_processor_id();
681 }
682 #endif
683 
684 int arch_early_irq_init(void)
685 {
686         return 0;
687 }
688 
689 #ifdef CONFIG_PPC64
690 static int __init setup_noirqdistrib(char *str)
691 {
692         distribute_irqs = 0;
693         return 1;
694 }
695 
696 __setup("noirqdistrib", setup_noirqdistrib);
697 #endif /* CONFIG_PPC64 */
698 

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