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Linux/arch/powerpc/kernel/ptrace.c

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  1 /*
  2  *  PowerPC version
  3  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  4  *
  5  *  Derived from "arch/m68k/kernel/ptrace.c"
  6  *  Copyright (C) 1994 by Hamish Macdonald
  7  *  Taken from linux/kernel/ptrace.c and modified for M680x0.
  8  *  linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
  9  *
 10  * Modified by Cort Dougan (cort@hq.fsmlabs.com)
 11  * and Paul Mackerras (paulus@samba.org).
 12  *
 13  * This file is subject to the terms and conditions of the GNU General
 14  * Public License.  See the file README.legal in the main directory of
 15  * this archive for more details.
 16  */
 17 
 18 #include <linux/kernel.h>
 19 #include <linux/sched.h>
 20 #include <linux/mm.h>
 21 #include <linux/smp.h>
 22 #include <linux/errno.h>
 23 #include <linux/ptrace.h>
 24 #include <linux/regset.h>
 25 #include <linux/tracehook.h>
 26 #include <linux/elf.h>
 27 #include <linux/user.h>
 28 #include <linux/security.h>
 29 #include <linux/signal.h>
 30 #include <linux/seccomp.h>
 31 #include <linux/audit.h>
 32 #include <trace/syscall.h>
 33 #include <linux/hw_breakpoint.h>
 34 #include <linux/perf_event.h>
 35 #include <linux/context_tracking.h>
 36 #include <linux/nospec.h>
 37 
 38 #include <linux/uaccess.h>
 39 #include <linux/pkeys.h>
 40 #include <asm/page.h>
 41 #include <asm/pgtable.h>
 42 #include <asm/switch_to.h>
 43 #include <asm/tm.h>
 44 #include <asm/asm-prototypes.h>
 45 #include <asm/debug.h>
 46 #include <asm/hw_breakpoint.h>
 47 
 48 #define CREATE_TRACE_POINTS
 49 #include <trace/events/syscalls.h>
 50 
 51 /*
 52  * The parameter save area on the stack is used to store arguments being passed
 53  * to callee function and is located at fixed offset from stack pointer.
 54  */
 55 #ifdef CONFIG_PPC32
 56 #define PARAMETER_SAVE_AREA_OFFSET      24  /* bytes */
 57 #else /* CONFIG_PPC32 */
 58 #define PARAMETER_SAVE_AREA_OFFSET      48  /* bytes */
 59 #endif
 60 
 61 struct pt_regs_offset {
 62         const char *name;
 63         int offset;
 64 };
 65 
 66 #define STR(s)  #s                      /* convert to string */
 67 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
 68 #define GPR_OFFSET_NAME(num)    \
 69         {.name = STR(r##num), .offset = offsetof(struct pt_regs, gpr[num])}, \
 70         {.name = STR(gpr##num), .offset = offsetof(struct pt_regs, gpr[num])}
 71 #define REG_OFFSET_END {.name = NULL, .offset = 0}
 72 
 73 #define TVSO(f) (offsetof(struct thread_vr_state, f))
 74 #define TFSO(f) (offsetof(struct thread_fp_state, f))
 75 #define TSO(f)  (offsetof(struct thread_struct, f))
 76 
 77 static const struct pt_regs_offset regoffset_table[] = {
 78         GPR_OFFSET_NAME(0),
 79         GPR_OFFSET_NAME(1),
 80         GPR_OFFSET_NAME(2),
 81         GPR_OFFSET_NAME(3),
 82         GPR_OFFSET_NAME(4),
 83         GPR_OFFSET_NAME(5),
 84         GPR_OFFSET_NAME(6),
 85         GPR_OFFSET_NAME(7),
 86         GPR_OFFSET_NAME(8),
 87         GPR_OFFSET_NAME(9),
 88         GPR_OFFSET_NAME(10),
 89         GPR_OFFSET_NAME(11),
 90         GPR_OFFSET_NAME(12),
 91         GPR_OFFSET_NAME(13),
 92         GPR_OFFSET_NAME(14),
 93         GPR_OFFSET_NAME(15),
 94         GPR_OFFSET_NAME(16),
 95         GPR_OFFSET_NAME(17),
 96         GPR_OFFSET_NAME(18),
 97         GPR_OFFSET_NAME(19),
 98         GPR_OFFSET_NAME(20),
 99         GPR_OFFSET_NAME(21),
100         GPR_OFFSET_NAME(22),
101         GPR_OFFSET_NAME(23),
102         GPR_OFFSET_NAME(24),
103         GPR_OFFSET_NAME(25),
104         GPR_OFFSET_NAME(26),
105         GPR_OFFSET_NAME(27),
106         GPR_OFFSET_NAME(28),
107         GPR_OFFSET_NAME(29),
108         GPR_OFFSET_NAME(30),
109         GPR_OFFSET_NAME(31),
110         REG_OFFSET_NAME(nip),
111         REG_OFFSET_NAME(msr),
112         REG_OFFSET_NAME(ctr),
113         REG_OFFSET_NAME(link),
114         REG_OFFSET_NAME(xer),
115         REG_OFFSET_NAME(ccr),
116 #ifdef CONFIG_PPC64
117         REG_OFFSET_NAME(softe),
118 #else
119         REG_OFFSET_NAME(mq),
120 #endif
121         REG_OFFSET_NAME(trap),
122         REG_OFFSET_NAME(dar),
123         REG_OFFSET_NAME(dsisr),
124         REG_OFFSET_END,
125 };
126 
127 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
128 static void flush_tmregs_to_thread(struct task_struct *tsk)
129 {
130         /*
131          * If task is not current, it will have been flushed already to
132          * it's thread_struct during __switch_to().
133          *
134          * A reclaim flushes ALL the state or if not in TM save TM SPRs
135          * in the appropriate thread structures from live.
136          */
137 
138         if ((!cpu_has_feature(CPU_FTR_TM)) || (tsk != current))
139                 return;
140 
141         if (MSR_TM_SUSPENDED(mfmsr())) {
142                 tm_reclaim_current(TM_CAUSE_SIGNAL);
143         } else {
144                 tm_enable();
145                 tm_save_sprs(&(tsk->thread));
146         }
147 }
148 #else
149 static inline void flush_tmregs_to_thread(struct task_struct *tsk) { }
150 #endif
151 
152 /**
153  * regs_query_register_offset() - query register offset from its name
154  * @name:       the name of a register
155  *
156  * regs_query_register_offset() returns the offset of a register in struct
157  * pt_regs from its name. If the name is invalid, this returns -EINVAL;
158  */
159 int regs_query_register_offset(const char *name)
160 {
161         const struct pt_regs_offset *roff;
162         for (roff = regoffset_table; roff->name != NULL; roff++)
163                 if (!strcmp(roff->name, name))
164                         return roff->offset;
165         return -EINVAL;
166 }
167 
168 /**
169  * regs_query_register_name() - query register name from its offset
170  * @offset:     the offset of a register in struct pt_regs.
171  *
172  * regs_query_register_name() returns the name of a register from its
173  * offset in struct pt_regs. If the @offset is invalid, this returns NULL;
174  */
175 const char *regs_query_register_name(unsigned int offset)
176 {
177         const struct pt_regs_offset *roff;
178         for (roff = regoffset_table; roff->name != NULL; roff++)
179                 if (roff->offset == offset)
180                         return roff->name;
181         return NULL;
182 }
183 
184 /*
185  * does not yet catch signals sent when the child dies.
186  * in exit.c or in signal.c.
187  */
188 
189 /*
190  * Set of msr bits that gdb can change on behalf of a process.
191  */
192 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
193 #define MSR_DEBUGCHANGE 0
194 #else
195 #define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
196 #endif
197 
198 /*
199  * Max register writeable via put_reg
200  */
201 #ifdef CONFIG_PPC32
202 #define PT_MAX_PUT_REG  PT_MQ
203 #else
204 #define PT_MAX_PUT_REG  PT_CCR
205 #endif
206 
207 static unsigned long get_user_msr(struct task_struct *task)
208 {
209         return task->thread.regs->msr | task->thread.fpexc_mode;
210 }
211 
212 static int set_user_msr(struct task_struct *task, unsigned long msr)
213 {
214         task->thread.regs->msr &= ~MSR_DEBUGCHANGE;
215         task->thread.regs->msr |= msr & MSR_DEBUGCHANGE;
216         return 0;
217 }
218 
219 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
220 static unsigned long get_user_ckpt_msr(struct task_struct *task)
221 {
222         return task->thread.ckpt_regs.msr | task->thread.fpexc_mode;
223 }
224 
225 static int set_user_ckpt_msr(struct task_struct *task, unsigned long msr)
226 {
227         task->thread.ckpt_regs.msr &= ~MSR_DEBUGCHANGE;
228         task->thread.ckpt_regs.msr |= msr & MSR_DEBUGCHANGE;
229         return 0;
230 }
231 
232 static int set_user_ckpt_trap(struct task_struct *task, unsigned long trap)
233 {
234         task->thread.ckpt_regs.trap = trap & 0xfff0;
235         return 0;
236 }
237 #endif
238 
239 #ifdef CONFIG_PPC64
240 static int get_user_dscr(struct task_struct *task, unsigned long *data)
241 {
242         *data = task->thread.dscr;
243         return 0;
244 }
245 
246 static int set_user_dscr(struct task_struct *task, unsigned long dscr)
247 {
248         task->thread.dscr = dscr;
249         task->thread.dscr_inherit = 1;
250         return 0;
251 }
252 #else
253 static int get_user_dscr(struct task_struct *task, unsigned long *data)
254 {
255         return -EIO;
256 }
257 
258 static int set_user_dscr(struct task_struct *task, unsigned long dscr)
259 {
260         return -EIO;
261 }
262 #endif
263 
264 /*
265  * We prevent mucking around with the reserved area of trap
266  * which are used internally by the kernel.
267  */
268 static int set_user_trap(struct task_struct *task, unsigned long trap)
269 {
270         task->thread.regs->trap = trap & 0xfff0;
271         return 0;
272 }
273 
274 /*
275  * Get contents of register REGNO in task TASK.
276  */
277 int ptrace_get_reg(struct task_struct *task, int regno, unsigned long *data)
278 {
279         unsigned int regs_max;
280 
281         if ((task->thread.regs == NULL) || !data)
282                 return -EIO;
283 
284         if (regno == PT_MSR) {
285                 *data = get_user_msr(task);
286                 return 0;
287         }
288 
289         if (regno == PT_DSCR)
290                 return get_user_dscr(task, data);
291 
292 #ifdef CONFIG_PPC64
293         /*
294          * softe copies paca->irq_soft_mask variable state. Since irq_soft_mask is
295          * no more used as a flag, lets force usr to alway see the softe value as 1
296          * which means interrupts are not soft disabled.
297          */
298         if (regno == PT_SOFTE) {
299                 *data = 1;
300                 return  0;
301         }
302 #endif
303 
304         regs_max = sizeof(struct user_pt_regs) / sizeof(unsigned long);
305         if (regno < regs_max) {
306                 regno = array_index_nospec(regno, regs_max);
307                 *data = ((unsigned long *)task->thread.regs)[regno];
308                 return 0;
309         }
310 
311         return -EIO;
312 }
313 
314 /*
315  * Write contents of register REGNO in task TASK.
316  */
317 int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
318 {
319         if (task->thread.regs == NULL)
320                 return -EIO;
321 
322         if (regno == PT_MSR)
323                 return set_user_msr(task, data);
324         if (regno == PT_TRAP)
325                 return set_user_trap(task, data);
326         if (regno == PT_DSCR)
327                 return set_user_dscr(task, data);
328 
329         if (regno <= PT_MAX_PUT_REG) {
330                 regno = array_index_nospec(regno, PT_MAX_PUT_REG + 1);
331                 ((unsigned long *)task->thread.regs)[regno] = data;
332                 return 0;
333         }
334         return -EIO;
335 }
336 
337 static int gpr_get(struct task_struct *target, const struct user_regset *regset,
338                    unsigned int pos, unsigned int count,
339                    void *kbuf, void __user *ubuf)
340 {
341         int i, ret;
342 
343         if (target->thread.regs == NULL)
344                 return -EIO;
345 
346         if (!FULL_REGS(target->thread.regs)) {
347                 /* We have a partial register set.  Fill 14-31 with bogus values */
348                 for (i = 14; i < 32; i++)
349                         target->thread.regs->gpr[i] = NV_REG_POISON;
350         }
351 
352         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
353                                   target->thread.regs,
354                                   0, offsetof(struct pt_regs, msr));
355         if (!ret) {
356                 unsigned long msr = get_user_msr(target);
357                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
358                                           offsetof(struct pt_regs, msr),
359                                           offsetof(struct pt_regs, msr) +
360                                           sizeof(msr));
361         }
362 
363         BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
364                      offsetof(struct pt_regs, msr) + sizeof(long));
365 
366         if (!ret)
367                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
368                                           &target->thread.regs->orig_gpr3,
369                                           offsetof(struct pt_regs, orig_gpr3),
370                                           sizeof(struct user_pt_regs));
371         if (!ret)
372                 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
373                                                sizeof(struct user_pt_regs), -1);
374 
375         return ret;
376 }
377 
378 static int gpr_set(struct task_struct *target, const struct user_regset *regset,
379                    unsigned int pos, unsigned int count,
380                    const void *kbuf, const void __user *ubuf)
381 {
382         unsigned long reg;
383         int ret;
384 
385         if (target->thread.regs == NULL)
386                 return -EIO;
387 
388         CHECK_FULL_REGS(target->thread.regs);
389 
390         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
391                                  target->thread.regs,
392                                  0, PT_MSR * sizeof(reg));
393 
394         if (!ret && count > 0) {
395                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
396                                          PT_MSR * sizeof(reg),
397                                          (PT_MSR + 1) * sizeof(reg));
398                 if (!ret)
399                         ret = set_user_msr(target, reg);
400         }
401 
402         BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
403                      offsetof(struct pt_regs, msr) + sizeof(long));
404 
405         if (!ret)
406                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
407                                          &target->thread.regs->orig_gpr3,
408                                          PT_ORIG_R3 * sizeof(reg),
409                                          (PT_MAX_PUT_REG + 1) * sizeof(reg));
410 
411         if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
412                 ret = user_regset_copyin_ignore(
413                         &pos, &count, &kbuf, &ubuf,
414                         (PT_MAX_PUT_REG + 1) * sizeof(reg),
415                         PT_TRAP * sizeof(reg));
416 
417         if (!ret && count > 0) {
418                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
419                                          PT_TRAP * sizeof(reg),
420                                          (PT_TRAP + 1) * sizeof(reg));
421                 if (!ret)
422                         ret = set_user_trap(target, reg);
423         }
424 
425         if (!ret)
426                 ret = user_regset_copyin_ignore(
427                         &pos, &count, &kbuf, &ubuf,
428                         (PT_TRAP + 1) * sizeof(reg), -1);
429 
430         return ret;
431 }
432 
433 /*
434  * Regardless of transactions, 'fp_state' holds the current running
435  * value of all FPR registers and 'ckfp_state' holds the last checkpointed
436  * value of all FPR registers for the current transaction.
437  *
438  * Userspace interface buffer layout:
439  *
440  * struct data {
441  *      u64     fpr[32];
442  *      u64     fpscr;
443  * };
444  */
445 static int fpr_get(struct task_struct *target, const struct user_regset *regset,
446                    unsigned int pos, unsigned int count,
447                    void *kbuf, void __user *ubuf)
448 {
449 #ifdef CONFIG_VSX
450         u64 buf[33];
451         int i;
452 
453         flush_fp_to_thread(target);
454 
455         /* copy to local buffer then write that out */
456         for (i = 0; i < 32 ; i++)
457                 buf[i] = target->thread.TS_FPR(i);
458         buf[32] = target->thread.fp_state.fpscr;
459         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
460 #else
461         BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=
462                      offsetof(struct thread_fp_state, fpr[32]));
463 
464         flush_fp_to_thread(target);
465 
466         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
467                                    &target->thread.fp_state, 0, -1);
468 #endif
469 }
470 
471 /*
472  * Regardless of transactions, 'fp_state' holds the current running
473  * value of all FPR registers and 'ckfp_state' holds the last checkpointed
474  * value of all FPR registers for the current transaction.
475  *
476  * Userspace interface buffer layout:
477  *
478  * struct data {
479  *      u64     fpr[32];
480  *      u64     fpscr;
481  * };
482  *
483  */
484 static int fpr_set(struct task_struct *target, const struct user_regset *regset,
485                    unsigned int pos, unsigned int count,
486                    const void *kbuf, const void __user *ubuf)
487 {
488 #ifdef CONFIG_VSX
489         u64 buf[33];
490         int i;
491 
492         flush_fp_to_thread(target);
493 
494         for (i = 0; i < 32 ; i++)
495                 buf[i] = target->thread.TS_FPR(i);
496         buf[32] = target->thread.fp_state.fpscr;
497 
498         /* copy to local buffer then write that out */
499         i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
500         if (i)
501                 return i;
502 
503         for (i = 0; i < 32 ; i++)
504                 target->thread.TS_FPR(i) = buf[i];
505         target->thread.fp_state.fpscr = buf[32];
506         return 0;
507 #else
508         BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=
509                      offsetof(struct thread_fp_state, fpr[32]));
510 
511         flush_fp_to_thread(target);
512 
513         return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
514                                   &target->thread.fp_state, 0, -1);
515 #endif
516 }
517 
518 #ifdef CONFIG_ALTIVEC
519 /*
520  * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
521  * The transfer totals 34 quadword.  Quadwords 0-31 contain the
522  * corresponding vector registers.  Quadword 32 contains the vscr as the
523  * last word (offset 12) within that quadword.  Quadword 33 contains the
524  * vrsave as the first word (offset 0) within the quadword.
525  *
526  * This definition of the VMX state is compatible with the current PPC32
527  * ptrace interface.  This allows signal handling and ptrace to use the
528  * same structures.  This also simplifies the implementation of a bi-arch
529  * (combined (32- and 64-bit) gdb.
530  */
531 
532 static int vr_active(struct task_struct *target,
533                      const struct user_regset *regset)
534 {
535         flush_altivec_to_thread(target);
536         return target->thread.used_vr ? regset->n : 0;
537 }
538 
539 /*
540  * Regardless of transactions, 'vr_state' holds the current running
541  * value of all the VMX registers and 'ckvr_state' holds the last
542  * checkpointed value of all the VMX registers for the current
543  * transaction to fall back on in case it aborts.
544  *
545  * Userspace interface buffer layout:
546  *
547  * struct data {
548  *      vector128       vr[32];
549  *      vector128       vscr;
550  *      vector128       vrsave;
551  * };
552  */
553 static int vr_get(struct task_struct *target, const struct user_regset *regset,
554                   unsigned int pos, unsigned int count,
555                   void *kbuf, void __user *ubuf)
556 {
557         int ret;
558 
559         flush_altivec_to_thread(target);
560 
561         BUILD_BUG_ON(offsetof(struct thread_vr_state, vscr) !=
562                      offsetof(struct thread_vr_state, vr[32]));
563 
564         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
565                                   &target->thread.vr_state, 0,
566                                   33 * sizeof(vector128));
567         if (!ret) {
568                 /*
569                  * Copy out only the low-order word of vrsave.
570                  */
571                 int start, end;
572                 union {
573                         elf_vrreg_t reg;
574                         u32 word;
575                 } vrsave;
576                 memset(&vrsave, 0, sizeof(vrsave));
577 
578                 vrsave.word = target->thread.vrsave;
579 
580                 start = 33 * sizeof(vector128);
581                 end = start + sizeof(vrsave);
582                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
583                                           start, end);
584         }
585 
586         return ret;
587 }
588 
589 /*
590  * Regardless of transactions, 'vr_state' holds the current running
591  * value of all the VMX registers and 'ckvr_state' holds the last
592  * checkpointed value of all the VMX registers for the current
593  * transaction to fall back on in case it aborts.
594  *
595  * Userspace interface buffer layout:
596  *
597  * struct data {
598  *      vector128       vr[32];
599  *      vector128       vscr;
600  *      vector128       vrsave;
601  * };
602  */
603 static int vr_set(struct task_struct *target, const struct user_regset *regset,
604                   unsigned int pos, unsigned int count,
605                   const void *kbuf, const void __user *ubuf)
606 {
607         int ret;
608 
609         flush_altivec_to_thread(target);
610 
611         BUILD_BUG_ON(offsetof(struct thread_vr_state, vscr) !=
612                      offsetof(struct thread_vr_state, vr[32]));
613 
614         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
615                                  &target->thread.vr_state, 0,
616                                  33 * sizeof(vector128));
617         if (!ret && count > 0) {
618                 /*
619                  * We use only the first word of vrsave.
620                  */
621                 int start, end;
622                 union {
623                         elf_vrreg_t reg;
624                         u32 word;
625                 } vrsave;
626                 memset(&vrsave, 0, sizeof(vrsave));
627 
628                 vrsave.word = target->thread.vrsave;
629 
630                 start = 33 * sizeof(vector128);
631                 end = start + sizeof(vrsave);
632                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
633                                          start, end);
634                 if (!ret)
635                         target->thread.vrsave = vrsave.word;
636         }
637 
638         return ret;
639 }
640 #endif /* CONFIG_ALTIVEC */
641 
642 #ifdef CONFIG_VSX
643 /*
644  * Currently to set and and get all the vsx state, you need to call
645  * the fp and VMX calls as well.  This only get/sets the lower 32
646  * 128bit VSX registers.
647  */
648 
649 static int vsr_active(struct task_struct *target,
650                       const struct user_regset *regset)
651 {
652         flush_vsx_to_thread(target);
653         return target->thread.used_vsr ? regset->n : 0;
654 }
655 
656 /*
657  * Regardless of transactions, 'fp_state' holds the current running
658  * value of all FPR registers and 'ckfp_state' holds the last
659  * checkpointed value of all FPR registers for the current
660  * transaction.
661  *
662  * Userspace interface buffer layout:
663  *
664  * struct data {
665  *      u64     vsx[32];
666  * };
667  */
668 static int vsr_get(struct task_struct *target, const struct user_regset *regset,
669                    unsigned int pos, unsigned int count,
670                    void *kbuf, void __user *ubuf)
671 {
672         u64 buf[32];
673         int ret, i;
674 
675         flush_tmregs_to_thread(target);
676         flush_fp_to_thread(target);
677         flush_altivec_to_thread(target);
678         flush_vsx_to_thread(target);
679 
680         for (i = 0; i < 32 ; i++)
681                 buf[i] = target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET];
682 
683         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
684                                   buf, 0, 32 * sizeof(double));
685 
686         return ret;
687 }
688 
689 /*
690  * Regardless of transactions, 'fp_state' holds the current running
691  * value of all FPR registers and 'ckfp_state' holds the last
692  * checkpointed value of all FPR registers for the current
693  * transaction.
694  *
695  * Userspace interface buffer layout:
696  *
697  * struct data {
698  *      u64     vsx[32];
699  * };
700  */
701 static int vsr_set(struct task_struct *target, const struct user_regset *regset,
702                    unsigned int pos, unsigned int count,
703                    const void *kbuf, const void __user *ubuf)
704 {
705         u64 buf[32];
706         int ret,i;
707 
708         flush_tmregs_to_thread(target);
709         flush_fp_to_thread(target);
710         flush_altivec_to_thread(target);
711         flush_vsx_to_thread(target);
712 
713         for (i = 0; i < 32 ; i++)
714                 buf[i] = target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET];
715 
716         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
717                                  buf, 0, 32 * sizeof(double));
718         if (!ret)
719                 for (i = 0; i < 32 ; i++)
720                         target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i];
721 
722         return ret;
723 }
724 #endif /* CONFIG_VSX */
725 
726 #ifdef CONFIG_SPE
727 
728 /*
729  * For get_evrregs/set_evrregs functions 'data' has the following layout:
730  *
731  * struct {
732  *   u32 evr[32];
733  *   u64 acc;
734  *   u32 spefscr;
735  * }
736  */
737 
738 static int evr_active(struct task_struct *target,
739                       const struct user_regset *regset)
740 {
741         flush_spe_to_thread(target);
742         return target->thread.used_spe ? regset->n : 0;
743 }
744 
745 static int evr_get(struct task_struct *target, const struct user_regset *regset,
746                    unsigned int pos, unsigned int count,
747                    void *kbuf, void __user *ubuf)
748 {
749         int ret;
750 
751         flush_spe_to_thread(target);
752 
753         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
754                                   &target->thread.evr,
755                                   0, sizeof(target->thread.evr));
756 
757         BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
758                      offsetof(struct thread_struct, spefscr));
759 
760         if (!ret)
761                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
762                                           &target->thread.acc,
763                                           sizeof(target->thread.evr), -1);
764 
765         return ret;
766 }
767 
768 static int evr_set(struct task_struct *target, const struct user_regset *regset,
769                    unsigned int pos, unsigned int count,
770                    const void *kbuf, const void __user *ubuf)
771 {
772         int ret;
773 
774         flush_spe_to_thread(target);
775 
776         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
777                                  &target->thread.evr,
778                                  0, sizeof(target->thread.evr));
779 
780         BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
781                      offsetof(struct thread_struct, spefscr));
782 
783         if (!ret)
784                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
785                                          &target->thread.acc,
786                                          sizeof(target->thread.evr), -1);
787 
788         return ret;
789 }
790 #endif /* CONFIG_SPE */
791 
792 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
793 /**
794  * tm_cgpr_active - get active number of registers in CGPR
795  * @target:     The target task.
796  * @regset:     The user regset structure.
797  *
798  * This function checks for the active number of available
799  * regisers in transaction checkpointed GPR category.
800  */
801 static int tm_cgpr_active(struct task_struct *target,
802                           const struct user_regset *regset)
803 {
804         if (!cpu_has_feature(CPU_FTR_TM))
805                 return -ENODEV;
806 
807         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
808                 return 0;
809 
810         return regset->n;
811 }
812 
813 /**
814  * tm_cgpr_get - get CGPR registers
815  * @target:     The target task.
816  * @regset:     The user regset structure.
817  * @pos:        The buffer position.
818  * @count:      Number of bytes to copy.
819  * @kbuf:       Kernel buffer to copy from.
820  * @ubuf:       User buffer to copy into.
821  *
822  * This function gets transaction checkpointed GPR registers.
823  *
824  * When the transaction is active, 'ckpt_regs' holds all the checkpointed
825  * GPR register values for the current transaction to fall back on if it
826  * aborts in between. This function gets those checkpointed GPR registers.
827  * The userspace interface buffer layout is as follows.
828  *
829  * struct data {
830  *      struct pt_regs ckpt_regs;
831  * };
832  */
833 static int tm_cgpr_get(struct task_struct *target,
834                         const struct user_regset *regset,
835                         unsigned int pos, unsigned int count,
836                         void *kbuf, void __user *ubuf)
837 {
838         int ret;
839 
840         if (!cpu_has_feature(CPU_FTR_TM))
841                 return -ENODEV;
842 
843         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
844                 return -ENODATA;
845 
846         flush_tmregs_to_thread(target);
847         flush_fp_to_thread(target);
848         flush_altivec_to_thread(target);
849 
850         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
851                                   &target->thread.ckpt_regs,
852                                   0, offsetof(struct pt_regs, msr));
853         if (!ret) {
854                 unsigned long msr = get_user_ckpt_msr(target);
855 
856                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
857                                           offsetof(struct pt_regs, msr),
858                                           offsetof(struct pt_regs, msr) +
859                                           sizeof(msr));
860         }
861 
862         BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
863                      offsetof(struct pt_regs, msr) + sizeof(long));
864 
865         if (!ret)
866                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
867                                           &target->thread.ckpt_regs.orig_gpr3,
868                                           offsetof(struct pt_regs, orig_gpr3),
869                                           sizeof(struct user_pt_regs));
870         if (!ret)
871                 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
872                                                sizeof(struct user_pt_regs), -1);
873 
874         return ret;
875 }
876 
877 /*
878  * tm_cgpr_set - set the CGPR registers
879  * @target:     The target task.
880  * @regset:     The user regset structure.
881  * @pos:        The buffer position.
882  * @count:      Number of bytes to copy.
883  * @kbuf:       Kernel buffer to copy into.
884  * @ubuf:       User buffer to copy from.
885  *
886  * This function sets in transaction checkpointed GPR registers.
887  *
888  * When the transaction is active, 'ckpt_regs' holds the checkpointed
889  * GPR register values for the current transaction to fall back on if it
890  * aborts in between. This function sets those checkpointed GPR registers.
891  * The userspace interface buffer layout is as follows.
892  *
893  * struct data {
894  *      struct pt_regs ckpt_regs;
895  * };
896  */
897 static int tm_cgpr_set(struct task_struct *target,
898                         const struct user_regset *regset,
899                         unsigned int pos, unsigned int count,
900                         const void *kbuf, const void __user *ubuf)
901 {
902         unsigned long reg;
903         int ret;
904 
905         if (!cpu_has_feature(CPU_FTR_TM))
906                 return -ENODEV;
907 
908         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
909                 return -ENODATA;
910 
911         flush_tmregs_to_thread(target);
912         flush_fp_to_thread(target);
913         flush_altivec_to_thread(target);
914 
915         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
916                                  &target->thread.ckpt_regs,
917                                  0, PT_MSR * sizeof(reg));
918 
919         if (!ret && count > 0) {
920                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
921                                          PT_MSR * sizeof(reg),
922                                          (PT_MSR + 1) * sizeof(reg));
923                 if (!ret)
924                         ret = set_user_ckpt_msr(target, reg);
925         }
926 
927         BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
928                      offsetof(struct pt_regs, msr) + sizeof(long));
929 
930         if (!ret)
931                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
932                                          &target->thread.ckpt_regs.orig_gpr3,
933                                          PT_ORIG_R3 * sizeof(reg),
934                                          (PT_MAX_PUT_REG + 1) * sizeof(reg));
935 
936         if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
937                 ret = user_regset_copyin_ignore(
938                         &pos, &count, &kbuf, &ubuf,
939                         (PT_MAX_PUT_REG + 1) * sizeof(reg),
940                         PT_TRAP * sizeof(reg));
941 
942         if (!ret && count > 0) {
943                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
944                                          PT_TRAP * sizeof(reg),
945                                          (PT_TRAP + 1) * sizeof(reg));
946                 if (!ret)
947                         ret = set_user_ckpt_trap(target, reg);
948         }
949 
950         if (!ret)
951                 ret = user_regset_copyin_ignore(
952                         &pos, &count, &kbuf, &ubuf,
953                         (PT_TRAP + 1) * sizeof(reg), -1);
954 
955         return ret;
956 }
957 
958 /**
959  * tm_cfpr_active - get active number of registers in CFPR
960  * @target:     The target task.
961  * @regset:     The user regset structure.
962  *
963  * This function checks for the active number of available
964  * regisers in transaction checkpointed FPR category.
965  */
966 static int tm_cfpr_active(struct task_struct *target,
967                                 const struct user_regset *regset)
968 {
969         if (!cpu_has_feature(CPU_FTR_TM))
970                 return -ENODEV;
971 
972         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
973                 return 0;
974 
975         return regset->n;
976 }
977 
978 /**
979  * tm_cfpr_get - get CFPR registers
980  * @target:     The target task.
981  * @regset:     The user regset structure.
982  * @pos:        The buffer position.
983  * @count:      Number of bytes to copy.
984  * @kbuf:       Kernel buffer to copy from.
985  * @ubuf:       User buffer to copy into.
986  *
987  * This function gets in transaction checkpointed FPR registers.
988  *
989  * When the transaction is active 'ckfp_state' holds the checkpointed
990  * values for the current transaction to fall back on if it aborts
991  * in between. This function gets those checkpointed FPR registers.
992  * The userspace interface buffer layout is as follows.
993  *
994  * struct data {
995  *      u64     fpr[32];
996  *      u64     fpscr;
997  *};
998  */
999 static int tm_cfpr_get(struct task_struct *target,
1000                         const struct user_regset *regset,
1001                         unsigned int pos, unsigned int count,
1002                         void *kbuf, void __user *ubuf)
1003 {
1004         u64 buf[33];
1005         int i;
1006 
1007         if (!cpu_has_feature(CPU_FTR_TM))
1008                 return -ENODEV;
1009 
1010         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1011                 return -ENODATA;
1012 
1013         flush_tmregs_to_thread(target);
1014         flush_fp_to_thread(target);
1015         flush_altivec_to_thread(target);
1016 
1017         /* copy to local buffer then write that out */
1018         for (i = 0; i < 32 ; i++)
1019                 buf[i] = target->thread.TS_CKFPR(i);
1020         buf[32] = target->thread.ckfp_state.fpscr;
1021         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
1022 }
1023 
1024 /**
1025  * tm_cfpr_set - set CFPR registers
1026  * @target:     The target task.
1027  * @regset:     The user regset structure.
1028  * @pos:        The buffer position.
1029  * @count:      Number of bytes to copy.
1030  * @kbuf:       Kernel buffer to copy into.
1031  * @ubuf:       User buffer to copy from.
1032  *
1033  * This function sets in transaction checkpointed FPR registers.
1034  *
1035  * When the transaction is active 'ckfp_state' holds the checkpointed
1036  * FPR register values for the current transaction to fall back on
1037  * if it aborts in between. This function sets these checkpointed
1038  * FPR registers. The userspace interface buffer layout is as follows.
1039  *
1040  * struct data {
1041  *      u64     fpr[32];
1042  *      u64     fpscr;
1043  *};
1044  */
1045 static int tm_cfpr_set(struct task_struct *target,
1046                         const struct user_regset *regset,
1047                         unsigned int pos, unsigned int count,
1048                         const void *kbuf, const void __user *ubuf)
1049 {
1050         u64 buf[33];
1051         int i;
1052 
1053         if (!cpu_has_feature(CPU_FTR_TM))
1054                 return -ENODEV;
1055 
1056         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1057                 return -ENODATA;
1058 
1059         flush_tmregs_to_thread(target);
1060         flush_fp_to_thread(target);
1061         flush_altivec_to_thread(target);
1062 
1063         for (i = 0; i < 32; i++)
1064                 buf[i] = target->thread.TS_CKFPR(i);
1065         buf[32] = target->thread.ckfp_state.fpscr;
1066 
1067         /* copy to local buffer then write that out */
1068         i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
1069         if (i)
1070                 return i;
1071         for (i = 0; i < 32 ; i++)
1072                 target->thread.TS_CKFPR(i) = buf[i];
1073         target->thread.ckfp_state.fpscr = buf[32];
1074         return 0;
1075 }
1076 
1077 /**
1078  * tm_cvmx_active - get active number of registers in CVMX
1079  * @target:     The target task.
1080  * @regset:     The user regset structure.
1081  *
1082  * This function checks for the active number of available
1083  * regisers in checkpointed VMX category.
1084  */
1085 static int tm_cvmx_active(struct task_struct *target,
1086                                 const struct user_regset *regset)
1087 {
1088         if (!cpu_has_feature(CPU_FTR_TM))
1089                 return -ENODEV;
1090 
1091         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1092                 return 0;
1093 
1094         return regset->n;
1095 }
1096 
1097 /**
1098  * tm_cvmx_get - get CMVX registers
1099  * @target:     The target task.
1100  * @regset:     The user regset structure.
1101  * @pos:        The buffer position.
1102  * @count:      Number of bytes to copy.
1103  * @kbuf:       Kernel buffer to copy from.
1104  * @ubuf:       User buffer to copy into.
1105  *
1106  * This function gets in transaction checkpointed VMX registers.
1107  *
1108  * When the transaction is active 'ckvr_state' and 'ckvrsave' hold
1109  * the checkpointed values for the current transaction to fall
1110  * back on if it aborts in between. The userspace interface buffer
1111  * layout is as follows.
1112  *
1113  * struct data {
1114  *      vector128       vr[32];
1115  *      vector128       vscr;
1116  *      vector128       vrsave;
1117  *};
1118  */
1119 static int tm_cvmx_get(struct task_struct *target,
1120                         const struct user_regset *regset,
1121                         unsigned int pos, unsigned int count,
1122                         void *kbuf, void __user *ubuf)
1123 {
1124         int ret;
1125 
1126         BUILD_BUG_ON(TVSO(vscr) != TVSO(vr[32]));
1127 
1128         if (!cpu_has_feature(CPU_FTR_TM))
1129                 return -ENODEV;
1130 
1131         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1132                 return -ENODATA;
1133 
1134         /* Flush the state */
1135         flush_tmregs_to_thread(target);
1136         flush_fp_to_thread(target);
1137         flush_altivec_to_thread(target);
1138 
1139         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1140                                         &target->thread.ckvr_state, 0,
1141                                         33 * sizeof(vector128));
1142         if (!ret) {
1143                 /*
1144                  * Copy out only the low-order word of vrsave.
1145                  */
1146                 union {
1147                         elf_vrreg_t reg;
1148                         u32 word;
1149                 } vrsave;
1150                 memset(&vrsave, 0, sizeof(vrsave));
1151                 vrsave.word = target->thread.ckvrsave;
1152                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
1153                                                 33 * sizeof(vector128), -1);
1154         }
1155 
1156         return ret;
1157 }
1158 
1159 /**
1160  * tm_cvmx_set - set CMVX registers
1161  * @target:     The target task.
1162  * @regset:     The user regset structure.
1163  * @pos:        The buffer position.
1164  * @count:      Number of bytes to copy.
1165  * @kbuf:       Kernel buffer to copy into.
1166  * @ubuf:       User buffer to copy from.
1167  *
1168  * This function sets in transaction checkpointed VMX registers.
1169  *
1170  * When the transaction is active 'ckvr_state' and 'ckvrsave' hold
1171  * the checkpointed values for the current transaction to fall
1172  * back on if it aborts in between. The userspace interface buffer
1173  * layout is as follows.
1174  *
1175  * struct data {
1176  *      vector128       vr[32];
1177  *      vector128       vscr;
1178  *      vector128       vrsave;
1179  *};
1180  */
1181 static int tm_cvmx_set(struct task_struct *target,
1182                         const struct user_regset *regset,
1183                         unsigned int pos, unsigned int count,
1184                         const void *kbuf, const void __user *ubuf)
1185 {
1186         int ret;
1187 
1188         BUILD_BUG_ON(TVSO(vscr) != TVSO(vr[32]));
1189 
1190         if (!cpu_has_feature(CPU_FTR_TM))
1191                 return -ENODEV;
1192 
1193         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1194                 return -ENODATA;
1195 
1196         flush_tmregs_to_thread(target);
1197         flush_fp_to_thread(target);
1198         flush_altivec_to_thread(target);
1199 
1200         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1201                                         &target->thread.ckvr_state, 0,
1202                                         33 * sizeof(vector128));
1203         if (!ret && count > 0) {
1204                 /*
1205                  * We use only the low-order word of vrsave.
1206                  */
1207                 union {
1208                         elf_vrreg_t reg;
1209                         u32 word;
1210                 } vrsave;
1211                 memset(&vrsave, 0, sizeof(vrsave));
1212                 vrsave.word = target->thread.ckvrsave;
1213                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
1214                                                 33 * sizeof(vector128), -1);
1215                 if (!ret)
1216                         target->thread.ckvrsave = vrsave.word;
1217         }
1218 
1219         return ret;
1220 }
1221 
1222 /**
1223  * tm_cvsx_active - get active number of registers in CVSX
1224  * @target:     The target task.
1225  * @regset:     The user regset structure.
1226  *
1227  * This function checks for the active number of available
1228  * regisers in transaction checkpointed VSX category.
1229  */
1230 static int tm_cvsx_active(struct task_struct *target,
1231                                 const struct user_regset *regset)
1232 {
1233         if (!cpu_has_feature(CPU_FTR_TM))
1234                 return -ENODEV;
1235 
1236         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1237                 return 0;
1238 
1239         flush_vsx_to_thread(target);
1240         return target->thread.used_vsr ? regset->n : 0;
1241 }
1242 
1243 /**
1244  * tm_cvsx_get - get CVSX registers
1245  * @target:     The target task.
1246  * @regset:     The user regset structure.
1247  * @pos:        The buffer position.
1248  * @count:      Number of bytes to copy.
1249  * @kbuf:       Kernel buffer to copy from.
1250  * @ubuf:       User buffer to copy into.
1251  *
1252  * This function gets in transaction checkpointed VSX registers.
1253  *
1254  * When the transaction is active 'ckfp_state' holds the checkpointed
1255  * values for the current transaction to fall back on if it aborts
1256  * in between. This function gets those checkpointed VSX registers.
1257  * The userspace interface buffer layout is as follows.
1258  *
1259  * struct data {
1260  *      u64     vsx[32];
1261  *};
1262  */
1263 static int tm_cvsx_get(struct task_struct *target,
1264                         const struct user_regset *regset,
1265                         unsigned int pos, unsigned int count,
1266                         void *kbuf, void __user *ubuf)
1267 {
1268         u64 buf[32];
1269         int ret, i;
1270 
1271         if (!cpu_has_feature(CPU_FTR_TM))
1272                 return -ENODEV;
1273 
1274         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1275                 return -ENODATA;
1276 
1277         /* Flush the state */
1278         flush_tmregs_to_thread(target);
1279         flush_fp_to_thread(target);
1280         flush_altivec_to_thread(target);
1281         flush_vsx_to_thread(target);
1282 
1283         for (i = 0; i < 32 ; i++)
1284                 buf[i] = target->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET];
1285         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1286                                   buf, 0, 32 * sizeof(double));
1287 
1288         return ret;
1289 }
1290 
1291 /**
1292  * tm_cvsx_set - set CFPR registers
1293  * @target:     The target task.
1294  * @regset:     The user regset structure.
1295  * @pos:        The buffer position.
1296  * @count:      Number of bytes to copy.
1297  * @kbuf:       Kernel buffer to copy into.
1298  * @ubuf:       User buffer to copy from.
1299  *
1300  * This function sets in transaction checkpointed VSX registers.
1301  *
1302  * When the transaction is active 'ckfp_state' holds the checkpointed
1303  * VSX register values for the current transaction to fall back on
1304  * if it aborts in between. This function sets these checkpointed
1305  * FPR registers. The userspace interface buffer layout is as follows.
1306  *
1307  * struct data {
1308  *      u64     vsx[32];
1309  *};
1310  */
1311 static int tm_cvsx_set(struct task_struct *target,
1312                         const struct user_regset *regset,
1313                         unsigned int pos, unsigned int count,
1314                         const void *kbuf, const void __user *ubuf)
1315 {
1316         u64 buf[32];
1317         int ret, i;
1318 
1319         if (!cpu_has_feature(CPU_FTR_TM))
1320                 return -ENODEV;
1321 
1322         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1323                 return -ENODATA;
1324 
1325         /* Flush the state */
1326         flush_tmregs_to_thread(target);
1327         flush_fp_to_thread(target);
1328         flush_altivec_to_thread(target);
1329         flush_vsx_to_thread(target);
1330 
1331         for (i = 0; i < 32 ; i++)
1332                 buf[i] = target->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET];
1333 
1334         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1335                                  buf, 0, 32 * sizeof(double));
1336         if (!ret)
1337                 for (i = 0; i < 32 ; i++)
1338                         target->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i];
1339 
1340         return ret;
1341 }
1342 
1343 /**
1344  * tm_spr_active - get active number of registers in TM SPR
1345  * @target:     The target task.
1346  * @regset:     The user regset structure.
1347  *
1348  * This function checks the active number of available
1349  * regisers in the transactional memory SPR category.
1350  */
1351 static int tm_spr_active(struct task_struct *target,
1352                          const struct user_regset *regset)
1353 {
1354         if (!cpu_has_feature(CPU_FTR_TM))
1355                 return -ENODEV;
1356 
1357         return regset->n;
1358 }
1359 
1360 /**
1361  * tm_spr_get - get the TM related SPR registers
1362  * @target:     The target task.
1363  * @regset:     The user regset structure.
1364  * @pos:        The buffer position.
1365  * @count:      Number of bytes to copy.
1366  * @kbuf:       Kernel buffer to copy from.
1367  * @ubuf:       User buffer to copy into.
1368  *
1369  * This function gets transactional memory related SPR registers.
1370  * The userspace interface buffer layout is as follows.
1371  *
1372  * struct {
1373  *      u64             tm_tfhar;
1374  *      u64             tm_texasr;
1375  *      u64             tm_tfiar;
1376  * };
1377  */
1378 static int tm_spr_get(struct task_struct *target,
1379                       const struct user_regset *regset,
1380                       unsigned int pos, unsigned int count,
1381                       void *kbuf, void __user *ubuf)
1382 {
1383         int ret;
1384 
1385         /* Build tests */
1386         BUILD_BUG_ON(TSO(tm_tfhar) + sizeof(u64) != TSO(tm_texasr));
1387         BUILD_BUG_ON(TSO(tm_texasr) + sizeof(u64) != TSO(tm_tfiar));
1388         BUILD_BUG_ON(TSO(tm_tfiar) + sizeof(u64) != TSO(ckpt_regs));
1389 
1390         if (!cpu_has_feature(CPU_FTR_TM))
1391                 return -ENODEV;
1392 
1393         /* Flush the states */
1394         flush_tmregs_to_thread(target);
1395         flush_fp_to_thread(target);
1396         flush_altivec_to_thread(target);
1397 
1398         /* TFHAR register */
1399         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1400                                 &target->thread.tm_tfhar, 0, sizeof(u64));
1401 
1402         /* TEXASR register */
1403         if (!ret)
1404                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1405                                 &target->thread.tm_texasr, sizeof(u64),
1406                                 2 * sizeof(u64));
1407 
1408         /* TFIAR register */
1409         if (!ret)
1410                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1411                                 &target->thread.tm_tfiar,
1412                                 2 * sizeof(u64), 3 * sizeof(u64));
1413         return ret;
1414 }
1415 
1416 /**
1417  * tm_spr_set - set the TM related SPR registers
1418  * @target:     The target task.
1419  * @regset:     The user regset structure.
1420  * @pos:        The buffer position.
1421  * @count:      Number of bytes to copy.
1422  * @kbuf:       Kernel buffer to copy into.
1423  * @ubuf:       User buffer to copy from.
1424  *
1425  * This function sets transactional memory related SPR registers.
1426  * The userspace interface buffer layout is as follows.
1427  *
1428  * struct {
1429  *      u64             tm_tfhar;
1430  *      u64             tm_texasr;
1431  *      u64             tm_tfiar;
1432  * };
1433  */
1434 static int tm_spr_set(struct task_struct *target,
1435                       const struct user_regset *regset,
1436                       unsigned int pos, unsigned int count,
1437                       const void *kbuf, const void __user *ubuf)
1438 {
1439         int ret;
1440 
1441         /* Build tests */
1442         BUILD_BUG_ON(TSO(tm_tfhar) + sizeof(u64) != TSO(tm_texasr));
1443         BUILD_BUG_ON(TSO(tm_texasr) + sizeof(u64) != TSO(tm_tfiar));
1444         BUILD_BUG_ON(TSO(tm_tfiar) + sizeof(u64) != TSO(ckpt_regs));
1445 
1446         if (!cpu_has_feature(CPU_FTR_TM))
1447                 return -ENODEV;
1448 
1449         /* Flush the states */
1450         flush_tmregs_to_thread(target);
1451         flush_fp_to_thread(target);
1452         flush_altivec_to_thread(target);
1453 
1454         /* TFHAR register */
1455         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1456                                 &target->thread.tm_tfhar, 0, sizeof(u64));
1457 
1458         /* TEXASR register */
1459         if (!ret)
1460                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1461                                 &target->thread.tm_texasr, sizeof(u64),
1462                                 2 * sizeof(u64));
1463 
1464         /* TFIAR register */
1465         if (!ret)
1466                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1467                                 &target->thread.tm_tfiar,
1468                                  2 * sizeof(u64), 3 * sizeof(u64));
1469         return ret;
1470 }
1471 
1472 static int tm_tar_active(struct task_struct *target,
1473                          const struct user_regset *regset)
1474 {
1475         if (!cpu_has_feature(CPU_FTR_TM))
1476                 return -ENODEV;
1477 
1478         if (MSR_TM_ACTIVE(target->thread.regs->msr))
1479                 return regset->n;
1480 
1481         return 0;
1482 }
1483 
1484 static int tm_tar_get(struct task_struct *target,
1485                       const struct user_regset *regset,
1486                       unsigned int pos, unsigned int count,
1487                       void *kbuf, void __user *ubuf)
1488 {
1489         int ret;
1490 
1491         if (!cpu_has_feature(CPU_FTR_TM))
1492                 return -ENODEV;
1493 
1494         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1495                 return -ENODATA;
1496 
1497         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1498                                 &target->thread.tm_tar, 0, sizeof(u64));
1499         return ret;
1500 }
1501 
1502 static int tm_tar_set(struct task_struct *target,
1503                       const struct user_regset *regset,
1504                       unsigned int pos, unsigned int count,
1505                       const void *kbuf, const void __user *ubuf)
1506 {
1507         int ret;
1508 
1509         if (!cpu_has_feature(CPU_FTR_TM))
1510                 return -ENODEV;
1511 
1512         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1513                 return -ENODATA;
1514 
1515         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1516                                 &target->thread.tm_tar, 0, sizeof(u64));
1517         return ret;
1518 }
1519 
1520 static int tm_ppr_active(struct task_struct *target,
1521                          const struct user_regset *regset)
1522 {
1523         if (!cpu_has_feature(CPU_FTR_TM))
1524                 return -ENODEV;
1525 
1526         if (MSR_TM_ACTIVE(target->thread.regs->msr))
1527                 return regset->n;
1528 
1529         return 0;
1530 }
1531 
1532 
1533 static int tm_ppr_get(struct task_struct *target,
1534                       const struct user_regset *regset,
1535                       unsigned int pos, unsigned int count,
1536                       void *kbuf, void __user *ubuf)
1537 {
1538         int ret;
1539 
1540         if (!cpu_has_feature(CPU_FTR_TM))
1541                 return -ENODEV;
1542 
1543         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1544                 return -ENODATA;
1545 
1546         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1547                                 &target->thread.tm_ppr, 0, sizeof(u64));
1548         return ret;
1549 }
1550 
1551 static int tm_ppr_set(struct task_struct *target,
1552                       const struct user_regset *regset,
1553                       unsigned int pos, unsigned int count,
1554                       const void *kbuf, const void __user *ubuf)
1555 {
1556         int ret;
1557 
1558         if (!cpu_has_feature(CPU_FTR_TM))
1559                 return -ENODEV;
1560 
1561         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1562                 return -ENODATA;
1563 
1564         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1565                                 &target->thread.tm_ppr, 0, sizeof(u64));
1566         return ret;
1567 }
1568 
1569 static int tm_dscr_active(struct task_struct *target,
1570                          const struct user_regset *regset)
1571 {
1572         if (!cpu_has_feature(CPU_FTR_TM))
1573                 return -ENODEV;
1574 
1575         if (MSR_TM_ACTIVE(target->thread.regs->msr))
1576                 return regset->n;
1577 
1578         return 0;
1579 }
1580 
1581 static int tm_dscr_get(struct task_struct *target,
1582                       const struct user_regset *regset,
1583                       unsigned int pos, unsigned int count,
1584                       void *kbuf, void __user *ubuf)
1585 {
1586         int ret;
1587 
1588         if (!cpu_has_feature(CPU_FTR_TM))
1589                 return -ENODEV;
1590 
1591         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1592                 return -ENODATA;
1593 
1594         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1595                                 &target->thread.tm_dscr, 0, sizeof(u64));
1596         return ret;
1597 }
1598 
1599 static int tm_dscr_set(struct task_struct *target,
1600                       const struct user_regset *regset,
1601                       unsigned int pos, unsigned int count,
1602                       const void *kbuf, const void __user *ubuf)
1603 {
1604         int ret;
1605 
1606         if (!cpu_has_feature(CPU_FTR_TM))
1607                 return -ENODEV;
1608 
1609         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1610                 return -ENODATA;
1611 
1612         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1613                                 &target->thread.tm_dscr, 0, sizeof(u64));
1614         return ret;
1615 }
1616 #endif  /* CONFIG_PPC_TRANSACTIONAL_MEM */
1617 
1618 #ifdef CONFIG_PPC64
1619 static int ppr_get(struct task_struct *target,
1620                       const struct user_regset *regset,
1621                       unsigned int pos, unsigned int count,
1622                       void *kbuf, void __user *ubuf)
1623 {
1624         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1625                                    &target->thread.regs->ppr, 0, sizeof(u64));
1626 }
1627 
1628 static int ppr_set(struct task_struct *target,
1629                       const struct user_regset *regset,
1630                       unsigned int pos, unsigned int count,
1631                       const void *kbuf, const void __user *ubuf)
1632 {
1633         return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1634                                   &target->thread.regs->ppr, 0, sizeof(u64));
1635 }
1636 
1637 static int dscr_get(struct task_struct *target,
1638                       const struct user_regset *regset,
1639                       unsigned int pos, unsigned int count,
1640                       void *kbuf, void __user *ubuf)
1641 {
1642         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1643                                    &target->thread.dscr, 0, sizeof(u64));
1644 }
1645 static int dscr_set(struct task_struct *target,
1646                       const struct user_regset *regset,
1647                       unsigned int pos, unsigned int count,
1648                       const void *kbuf, const void __user *ubuf)
1649 {
1650         return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1651                                   &target->thread.dscr, 0, sizeof(u64));
1652 }
1653 #endif
1654 #ifdef CONFIG_PPC_BOOK3S_64
1655 static int tar_get(struct task_struct *target,
1656                       const struct user_regset *regset,
1657                       unsigned int pos, unsigned int count,
1658                       void *kbuf, void __user *ubuf)
1659 {
1660         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1661                                    &target->thread.tar, 0, sizeof(u64));
1662 }
1663 static int tar_set(struct task_struct *target,
1664                       const struct user_regset *regset,
1665                       unsigned int pos, unsigned int count,
1666                       const void *kbuf, const void __user *ubuf)
1667 {
1668         return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1669                                   &target->thread.tar, 0, sizeof(u64));
1670 }
1671 
1672 static int ebb_active(struct task_struct *target,
1673                          const struct user_regset *regset)
1674 {
1675         if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1676                 return -ENODEV;
1677 
1678         if (target->thread.used_ebb)
1679                 return regset->n;
1680 
1681         return 0;
1682 }
1683 
1684 static int ebb_get(struct task_struct *target,
1685                       const struct user_regset *regset,
1686                       unsigned int pos, unsigned int count,
1687                       void *kbuf, void __user *ubuf)
1688 {
1689         /* Build tests */
1690         BUILD_BUG_ON(TSO(ebbrr) + sizeof(unsigned long) != TSO(ebbhr));
1691         BUILD_BUG_ON(TSO(ebbhr) + sizeof(unsigned long) != TSO(bescr));
1692 
1693         if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1694                 return -ENODEV;
1695 
1696         if (!target->thread.used_ebb)
1697                 return -ENODATA;
1698 
1699         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1700                         &target->thread.ebbrr, 0, 3 * sizeof(unsigned long));
1701 }
1702 
1703 static int ebb_set(struct task_struct *target,
1704                       const struct user_regset *regset,
1705                       unsigned int pos, unsigned int count,
1706                       const void *kbuf, const void __user *ubuf)
1707 {
1708         int ret = 0;
1709 
1710         /* Build tests */
1711         BUILD_BUG_ON(TSO(ebbrr) + sizeof(unsigned long) != TSO(ebbhr));
1712         BUILD_BUG_ON(TSO(ebbhr) + sizeof(unsigned long) != TSO(bescr));
1713 
1714         if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1715                 return -ENODEV;
1716 
1717         if (target->thread.used_ebb)
1718                 return -ENODATA;
1719 
1720         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1721                         &target->thread.ebbrr, 0, sizeof(unsigned long));
1722 
1723         if (!ret)
1724                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1725                         &target->thread.ebbhr, sizeof(unsigned long),
1726                         2 * sizeof(unsigned long));
1727 
1728         if (!ret)
1729                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1730                         &target->thread.bescr,
1731                         2 * sizeof(unsigned long), 3 * sizeof(unsigned long));
1732 
1733         return ret;
1734 }
1735 static int pmu_active(struct task_struct *target,
1736                          const struct user_regset *regset)
1737 {
1738         if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1739                 return -ENODEV;
1740 
1741         return regset->n;
1742 }
1743 
1744 static int pmu_get(struct task_struct *target,
1745                       const struct user_regset *regset,
1746                       unsigned int pos, unsigned int count,
1747                       void *kbuf, void __user *ubuf)
1748 {
1749         /* Build tests */
1750         BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
1751         BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
1752         BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
1753         BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
1754 
1755         if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1756                 return -ENODEV;
1757 
1758         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1759                         &target->thread.siar, 0,
1760                         5 * sizeof(unsigned long));
1761 }
1762 
1763 static int pmu_set(struct task_struct *target,
1764                       const struct user_regset *regset,
1765                       unsigned int pos, unsigned int count,
1766                       const void *kbuf, const void __user *ubuf)
1767 {
1768         int ret = 0;
1769 
1770         /* Build tests */
1771         BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
1772         BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
1773         BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
1774         BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
1775 
1776         if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1777                 return -ENODEV;
1778 
1779         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1780                         &target->thread.siar, 0,
1781                         sizeof(unsigned long));
1782 
1783         if (!ret)
1784                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1785                         &target->thread.sdar, sizeof(unsigned long),
1786                         2 * sizeof(unsigned long));
1787 
1788         if (!ret)
1789                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1790                         &target->thread.sier, 2 * sizeof(unsigned long),
1791                         3 * sizeof(unsigned long));
1792 
1793         if (!ret)
1794                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1795                         &target->thread.mmcr2, 3 * sizeof(unsigned long),
1796                         4 * sizeof(unsigned long));
1797 
1798         if (!ret)
1799                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1800                         &target->thread.mmcr0, 4 * sizeof(unsigned long),
1801                         5 * sizeof(unsigned long));
1802         return ret;
1803 }
1804 #endif
1805 
1806 #ifdef CONFIG_PPC_MEM_KEYS
1807 static int pkey_active(struct task_struct *target,
1808                        const struct user_regset *regset)
1809 {
1810         if (!arch_pkeys_enabled())
1811                 return -ENODEV;
1812 
1813         return regset->n;
1814 }
1815 
1816 static int pkey_get(struct task_struct *target,
1817                     const struct user_regset *regset,
1818                     unsigned int pos, unsigned int count,
1819                     void *kbuf, void __user *ubuf)
1820 {
1821         BUILD_BUG_ON(TSO(amr) + sizeof(unsigned long) != TSO(iamr));
1822         BUILD_BUG_ON(TSO(iamr) + sizeof(unsigned long) != TSO(uamor));
1823 
1824         if (!arch_pkeys_enabled())
1825                 return -ENODEV;
1826 
1827         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1828                                    &target->thread.amr, 0,
1829                                    ELF_NPKEY * sizeof(unsigned long));
1830 }
1831 
1832 static int pkey_set(struct task_struct *target,
1833                       const struct user_regset *regset,
1834                       unsigned int pos, unsigned int count,
1835                       const void *kbuf, const void __user *ubuf)
1836 {
1837         u64 new_amr;
1838         int ret;
1839 
1840         if (!arch_pkeys_enabled())
1841                 return -ENODEV;
1842 
1843         /* Only the AMR can be set from userspace */
1844         if (pos != 0 || count != sizeof(new_amr))
1845                 return -EINVAL;
1846 
1847         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1848                                  &new_amr, 0, sizeof(new_amr));
1849         if (ret)
1850                 return ret;
1851 
1852         /* UAMOR determines which bits of the AMR can be set from userspace. */
1853         target->thread.amr = (new_amr & target->thread.uamor) |
1854                 (target->thread.amr & ~target->thread.uamor);
1855 
1856         return 0;
1857 }
1858 #endif /* CONFIG_PPC_MEM_KEYS */
1859 
1860 /*
1861  * These are our native regset flavors.
1862  */
1863 enum powerpc_regset {
1864         REGSET_GPR,
1865         REGSET_FPR,
1866 #ifdef CONFIG_ALTIVEC
1867         REGSET_VMX,
1868 #endif
1869 #ifdef CONFIG_VSX
1870         REGSET_VSX,
1871 #endif
1872 #ifdef CONFIG_SPE
1873         REGSET_SPE,
1874 #endif
1875 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1876         REGSET_TM_CGPR,         /* TM checkpointed GPR registers */
1877         REGSET_TM_CFPR,         /* TM checkpointed FPR registers */
1878         REGSET_TM_CVMX,         /* TM checkpointed VMX registers */
1879         REGSET_TM_CVSX,         /* TM checkpointed VSX registers */
1880         REGSET_TM_SPR,          /* TM specific SPR registers */
1881         REGSET_TM_CTAR,         /* TM checkpointed TAR register */
1882         REGSET_TM_CPPR,         /* TM checkpointed PPR register */
1883         REGSET_TM_CDSCR,        /* TM checkpointed DSCR register */
1884 #endif
1885 #ifdef CONFIG_PPC64
1886         REGSET_PPR,             /* PPR register */
1887         REGSET_DSCR,            /* DSCR register */
1888 #endif
1889 #ifdef CONFIG_PPC_BOOK3S_64
1890         REGSET_TAR,             /* TAR register */
1891         REGSET_EBB,             /* EBB registers */
1892         REGSET_PMR,             /* Performance Monitor Registers */
1893 #endif
1894 #ifdef CONFIG_PPC_MEM_KEYS
1895         REGSET_PKEY,            /* AMR register */
1896 #endif
1897 };
1898 
1899 static const struct user_regset native_regsets[] = {
1900         [REGSET_GPR] = {
1901                 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
1902                 .size = sizeof(long), .align = sizeof(long),
1903                 .get = gpr_get, .set = gpr_set
1904         },
1905         [REGSET_FPR] = {
1906                 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
1907                 .size = sizeof(double), .align = sizeof(double),
1908                 .get = fpr_get, .set = fpr_set
1909         },
1910 #ifdef CONFIG_ALTIVEC
1911         [REGSET_VMX] = {
1912                 .core_note_type = NT_PPC_VMX, .n = 34,
1913                 .size = sizeof(vector128), .align = sizeof(vector128),
1914                 .active = vr_active, .get = vr_get, .set = vr_set
1915         },
1916 #endif
1917 #ifdef CONFIG_VSX
1918         [REGSET_VSX] = {
1919                 .core_note_type = NT_PPC_VSX, .n = 32,
1920                 .size = sizeof(double), .align = sizeof(double),
1921                 .active = vsr_active, .get = vsr_get, .set = vsr_set
1922         },
1923 #endif
1924 #ifdef CONFIG_SPE
1925         [REGSET_SPE] = {
1926                 .core_note_type = NT_PPC_SPE, .n = 35,
1927                 .size = sizeof(u32), .align = sizeof(u32),
1928                 .active = evr_active, .get = evr_get, .set = evr_set
1929         },
1930 #endif
1931 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1932         [REGSET_TM_CGPR] = {
1933                 .core_note_type = NT_PPC_TM_CGPR, .n = ELF_NGREG,
1934                 .size = sizeof(long), .align = sizeof(long),
1935                 .active = tm_cgpr_active, .get = tm_cgpr_get, .set = tm_cgpr_set
1936         },
1937         [REGSET_TM_CFPR] = {
1938                 .core_note_type = NT_PPC_TM_CFPR, .n = ELF_NFPREG,
1939                 .size = sizeof(double), .align = sizeof(double),
1940                 .active = tm_cfpr_active, .get = tm_cfpr_get, .set = tm_cfpr_set
1941         },
1942         [REGSET_TM_CVMX] = {
1943                 .core_note_type = NT_PPC_TM_CVMX, .n = ELF_NVMX,
1944                 .size = sizeof(vector128), .align = sizeof(vector128),
1945                 .active = tm_cvmx_active, .get = tm_cvmx_get, .set = tm_cvmx_set
1946         },
1947         [REGSET_TM_CVSX] = {
1948                 .core_note_type = NT_PPC_TM_CVSX, .n = ELF_NVSX,
1949                 .size = sizeof(double), .align = sizeof(double),
1950                 .active = tm_cvsx_active, .get = tm_cvsx_get, .set = tm_cvsx_set
1951         },
1952         [REGSET_TM_SPR] = {
1953                 .core_note_type = NT_PPC_TM_SPR, .n = ELF_NTMSPRREG,
1954                 .size = sizeof(u64), .align = sizeof(u64),
1955                 .active = tm_spr_active, .get = tm_spr_get, .set = tm_spr_set
1956         },
1957         [REGSET_TM_CTAR] = {
1958                 .core_note_type = NT_PPC_TM_CTAR, .n = 1,
1959                 .size = sizeof(u64), .align = sizeof(u64),
1960                 .active = tm_tar_active, .get = tm_tar_get, .set = tm_tar_set
1961         },
1962         [REGSET_TM_CPPR] = {
1963                 .core_note_type = NT_PPC_TM_CPPR, .n = 1,
1964                 .size = sizeof(u64), .align = sizeof(u64),
1965                 .active = tm_ppr_active, .get = tm_ppr_get, .set = tm_ppr_set
1966         },
1967         [REGSET_TM_CDSCR] = {
1968                 .core_note_type = NT_PPC_TM_CDSCR, .n = 1,
1969                 .size = sizeof(u64), .align = sizeof(u64),
1970                 .active = tm_dscr_active, .get = tm_dscr_get, .set = tm_dscr_set
1971         },
1972 #endif
1973 #ifdef CONFIG_PPC64
1974         [REGSET_PPR] = {
1975                 .core_note_type = NT_PPC_PPR, .n = 1,
1976                 .size = sizeof(u64), .align = sizeof(u64),
1977                 .get = ppr_get, .set = ppr_set
1978         },
1979         [REGSET_DSCR] = {
1980                 .core_note_type = NT_PPC_DSCR, .n = 1,
1981                 .size = sizeof(u64), .align = sizeof(u64),
1982                 .get = dscr_get, .set = dscr_set
1983         },
1984 #endif
1985 #ifdef CONFIG_PPC_BOOK3S_64
1986         [REGSET_TAR] = {
1987                 .core_note_type = NT_PPC_TAR, .n = 1,
1988                 .size = sizeof(u64), .align = sizeof(u64),
1989                 .get = tar_get, .set = tar_set
1990         },
1991         [REGSET_EBB] = {
1992                 .core_note_type = NT_PPC_EBB, .n = ELF_NEBB,
1993                 .size = sizeof(u64), .align = sizeof(u64),
1994                 .active = ebb_active, .get = ebb_get, .set = ebb_set
1995         },
1996         [REGSET_PMR] = {
1997                 .core_note_type = NT_PPC_PMU, .n = ELF_NPMU,
1998                 .size = sizeof(u64), .align = sizeof(u64),
1999                 .active = pmu_active, .get = pmu_get, .set = pmu_set
2000         },
2001 #endif
2002 #ifdef CONFIG_PPC_MEM_KEYS
2003         [REGSET_PKEY] = {
2004                 .core_note_type = NT_PPC_PKEY, .n = ELF_NPKEY,
2005                 .size = sizeof(u64), .align = sizeof(u64),
2006                 .active = pkey_active, .get = pkey_get, .set = pkey_set
2007         },
2008 #endif
2009 };
2010 
2011 static const struct user_regset_view user_ppc_native_view = {
2012         .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
2013         .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
2014 };
2015 
2016 #ifdef CONFIG_PPC64
2017 #include <linux/compat.h>
2018 
2019 static int gpr32_get_common(struct task_struct *target,
2020                      const struct user_regset *regset,
2021                      unsigned int pos, unsigned int count,
2022                             void *kbuf, void __user *ubuf,
2023                             unsigned long *regs)
2024 {
2025         compat_ulong_t *k = kbuf;
2026         compat_ulong_t __user *u = ubuf;
2027         compat_ulong_t reg;
2028 
2029         pos /= sizeof(reg);
2030         count /= sizeof(reg);
2031 
2032         if (kbuf)
2033                 for (; count > 0 && pos < PT_MSR; --count)
2034                         *k++ = regs[pos++];
2035         else
2036                 for (; count > 0 && pos < PT_MSR; --count)
2037                         if (__put_user((compat_ulong_t) regs[pos++], u++))
2038                                 return -EFAULT;
2039 
2040         if (count > 0 && pos == PT_MSR) {
2041                 reg = get_user_msr(target);
2042                 if (kbuf)
2043                         *k++ = reg;
2044                 else if (__put_user(reg, u++))
2045                         return -EFAULT;
2046                 ++pos;
2047                 --count;
2048         }
2049 
2050         if (kbuf)
2051                 for (; count > 0 && pos < PT_REGS_COUNT; --count)
2052                         *k++ = regs[pos++];
2053         else
2054                 for (; count > 0 && pos < PT_REGS_COUNT; --count)
2055                         if (__put_user((compat_ulong_t) regs[pos++], u++))
2056                                 return -EFAULT;
2057 
2058         kbuf = k;
2059         ubuf = u;
2060         pos *= sizeof(reg);
2061         count *= sizeof(reg);
2062         return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
2063                                         PT_REGS_COUNT * sizeof(reg), -1);
2064 }
2065 
2066 static int gpr32_set_common(struct task_struct *target,
2067                      const struct user_regset *regset,
2068                      unsigned int pos, unsigned int count,
2069                      const void *kbuf, const void __user *ubuf,
2070                      unsigned long *regs)
2071 {
2072         const compat_ulong_t *k = kbuf;
2073         const compat_ulong_t __user *u = ubuf;
2074         compat_ulong_t reg;
2075 
2076         pos /= sizeof(reg);
2077         count /= sizeof(reg);
2078 
2079         if (kbuf)
2080                 for (; count > 0 && pos < PT_MSR; --count)
2081                         regs[pos++] = *k++;
2082         else
2083                 for (; count > 0 && pos < PT_MSR; --count) {
2084                         if (__get_user(reg, u++))
2085                                 return -EFAULT;
2086                         regs[pos++] = reg;
2087                 }
2088 
2089 
2090         if (count > 0 && pos == PT_MSR) {
2091                 if (kbuf)
2092                         reg = *k++;
2093                 else if (__get_user(reg, u++))
2094                         return -EFAULT;
2095                 set_user_msr(target, reg);
2096                 ++pos;
2097                 --count;
2098         }
2099 
2100         if (kbuf) {
2101                 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count)
2102                         regs[pos++] = *k++;
2103                 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
2104                         ++k;
2105         } else {
2106                 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) {
2107                         if (__get_user(reg, u++))
2108                                 return -EFAULT;
2109                         regs[pos++] = reg;
2110                 }
2111                 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
2112                         if (__get_user(reg, u++))
2113                                 return -EFAULT;
2114         }
2115 
2116         if (count > 0 && pos == PT_TRAP) {
2117                 if (kbuf)
2118                         reg = *k++;
2119                 else if (__get_user(reg, u++))
2120                         return -EFAULT;
2121                 set_user_trap(target, reg);
2122                 ++pos;
2123                 --count;
2124         }
2125 
2126         kbuf = k;
2127         ubuf = u;
2128         pos *= sizeof(reg);
2129         count *= sizeof(reg);
2130         return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
2131                                          (PT_TRAP + 1) * sizeof(reg), -1);
2132 }
2133 
2134 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
2135 static int tm_cgpr32_get(struct task_struct *target,
2136                      const struct user_regset *regset,
2137                      unsigned int pos, unsigned int count,
2138                      void *kbuf, void __user *ubuf)
2139 {
2140         return gpr32_get_common(target, regset, pos, count, kbuf, ubuf,
2141                         &target->thread.ckpt_regs.gpr[0]);
2142 }
2143 
2144 static int tm_cgpr32_set(struct task_struct *target,
2145                      const struct user_regset *regset,
2146                      unsigned int pos, unsigned int count,
2147                      const void *kbuf, const void __user *ubuf)
2148 {
2149         return gpr32_set_common(target, regset, pos, count, kbuf, ubuf,
2150                         &target->thread.ckpt_regs.gpr[0]);
2151 }
2152 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
2153 
2154 static int gpr32_get(struct task_struct *target,
2155                      const struct user_regset *regset,
2156                      unsigned int pos, unsigned int count,
2157                      void *kbuf, void __user *ubuf)
2158 {
2159         int i;
2160 
2161         if (target->thread.regs == NULL)
2162                 return -EIO;
2163 
2164         if (!FULL_REGS(target->thread.regs)) {
2165                 /*
2166                  * We have a partial register set.
2167                  * Fill 14-31 with bogus values.
2168                  */
2169                 for (i = 14; i < 32; i++)
2170                         target->thread.regs->gpr[i] = NV_REG_POISON;
2171         }
2172         return gpr32_get_common(target, regset, pos, count, kbuf, ubuf,
2173                         &target->thread.regs->gpr[0]);
2174 }
2175 
2176 static int gpr32_set(struct task_struct *target,
2177                      const struct user_regset *regset,
2178                      unsigned int pos, unsigned int count,
2179                      const void *kbuf, const void __user *ubuf)
2180 {
2181         if (target->thread.regs == NULL)
2182                 return -EIO;
2183 
2184         CHECK_FULL_REGS(target->thread.regs);
2185         return gpr32_set_common(target, regset, pos, count, kbuf, ubuf,
2186                         &target->thread.regs->gpr[0]);
2187 }
2188 
2189 /*
2190  * These are the regset flavors matching the CONFIG_PPC32 native set.
2191  */
2192 static const struct user_regset compat_regsets[] = {
2193         [REGSET_GPR] = {
2194                 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
2195                 .size = sizeof(compat_long_t), .align = sizeof(compat_long_t),
2196                 .get = gpr32_get, .set = gpr32_set
2197         },
2198         [REGSET_FPR] = {
2199                 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
2200                 .size = sizeof(double), .align = sizeof(double),
2201                 .get = fpr_get, .set = fpr_set
2202         },
2203 #ifdef CONFIG_ALTIVEC
2204         [REGSET_VMX] = {
2205                 .core_note_type = NT_PPC_VMX, .n = 34,
2206                 .size = sizeof(vector128), .align = sizeof(vector128),
2207                 .active = vr_active, .get = vr_get, .set = vr_set
2208         },
2209 #endif
2210 #ifdef CONFIG_SPE
2211         [REGSET_SPE] = {
2212                 .core_note_type = NT_PPC_SPE, .n = 35,
2213                 .size = sizeof(u32), .align = sizeof(u32),
2214                 .active = evr_active, .get = evr_get, .set = evr_set
2215         },
2216 #endif
2217 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
2218         [REGSET_TM_CGPR] = {
2219                 .core_note_type = NT_PPC_TM_CGPR, .n = ELF_NGREG,
2220                 .size = sizeof(long), .align = sizeof(long),
2221                 .active = tm_cgpr_active,
2222                 .get = tm_cgpr32_get, .set = tm_cgpr32_set
2223         },
2224         [REGSET_TM_CFPR] = {
2225                 .core_note_type = NT_PPC_TM_CFPR, .n = ELF_NFPREG,
2226                 .size = sizeof(double), .align = sizeof(double),
2227                 .active = tm_cfpr_active, .get = tm_cfpr_get, .set = tm_cfpr_set
2228         },
2229         [REGSET_TM_CVMX] = {
2230                 .core_note_type = NT_PPC_TM_CVMX, .n = ELF_NVMX,
2231                 .size = sizeof(vector128), .align = sizeof(vector128),
2232                 .active = tm_cvmx_active, .get = tm_cvmx_get, .set = tm_cvmx_set
2233         },
2234         [REGSET_TM_CVSX] = {
2235                 .core_note_type = NT_PPC_TM_CVSX, .n = ELF_NVSX,
2236                 .size = sizeof(double), .align = sizeof(double),
2237                 .active = tm_cvsx_active, .get = tm_cvsx_get, .set = tm_cvsx_set
2238         },
2239         [REGSET_TM_SPR] = {
2240                 .core_note_type = NT_PPC_TM_SPR, .n = ELF_NTMSPRREG,
2241                 .size = sizeof(u64), .align = sizeof(u64),
2242                 .active = tm_spr_active, .get = tm_spr_get, .set = tm_spr_set
2243         },
2244         [REGSET_TM_CTAR] = {
2245                 .core_note_type = NT_PPC_TM_CTAR, .n = 1,
2246                 .size = sizeof(u64), .align = sizeof(u64),
2247                 .active = tm_tar_active, .get = tm_tar_get, .set = tm_tar_set
2248         },
2249         [REGSET_TM_CPPR] = {
2250                 .core_note_type = NT_PPC_TM_CPPR, .n = 1,
2251                 .size = sizeof(u64), .align = sizeof(u64),
2252                 .active = tm_ppr_active, .get = tm_ppr_get, .set = tm_ppr_set
2253         },
2254         [REGSET_TM_CDSCR] = {
2255                 .core_note_type = NT_PPC_TM_CDSCR, .n = 1,
2256                 .size = sizeof(u64), .align = sizeof(u64),
2257                 .active = tm_dscr_active, .get = tm_dscr_get, .set = tm_dscr_set
2258         },
2259 #endif
2260 #ifdef CONFIG_PPC64
2261         [REGSET_PPR] = {
2262                 .core_note_type = NT_PPC_PPR, .n = 1,
2263                 .size = sizeof(u64), .align = sizeof(u64),
2264                 .get = ppr_get, .set = ppr_set
2265         },
2266         [REGSET_DSCR] = {
2267                 .core_note_type = NT_PPC_DSCR, .n = 1,
2268                 .size = sizeof(u64), .align = sizeof(u64),
2269                 .get = dscr_get, .set = dscr_set
2270         },
2271 #endif
2272 #ifdef CONFIG_PPC_BOOK3S_64
2273         [REGSET_TAR] = {
2274                 .core_note_type = NT_PPC_TAR, .n = 1,
2275                 .size = sizeof(u64), .align = sizeof(u64),
2276                 .get = tar_get, .set = tar_set
2277         },
2278         [REGSET_EBB] = {
2279                 .core_note_type = NT_PPC_EBB, .n = ELF_NEBB,
2280                 .size = sizeof(u64), .align = sizeof(u64),
2281                 .active = ebb_active, .get = ebb_get, .set = ebb_set
2282         },
2283 #endif
2284 };
2285 
2286 static const struct user_regset_view user_ppc_compat_view = {
2287         .name = "ppc", .e_machine = EM_PPC, .ei_osabi = ELF_OSABI,
2288         .regsets = compat_regsets, .n = ARRAY_SIZE(compat_regsets)
2289 };
2290 #endif  /* CONFIG_PPC64 */
2291 
2292 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
2293 {
2294 #ifdef CONFIG_PPC64
2295         if (test_tsk_thread_flag(task, TIF_32BIT))
2296                 return &user_ppc_compat_view;
2297 #endif
2298         return &user_ppc_native_view;
2299 }
2300 
2301 
2302 void user_enable_single_step(struct task_struct *task)
2303 {
2304         struct pt_regs *regs = task->thread.regs;
2305 
2306         if (regs != NULL) {
2307 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
2308                 task->thread.debug.dbcr0 &= ~DBCR0_BT;
2309                 task->thread.debug.dbcr0 |= DBCR0_IDM | DBCR0_IC;
2310                 regs->msr |= MSR_DE;
2311 #else
2312                 regs->msr &= ~MSR_BE;
2313                 regs->msr |= MSR_SE;
2314 #endif
2315         }
2316         set_tsk_thread_flag(task, TIF_SINGLESTEP);
2317 }
2318 
2319 void user_enable_block_step(struct task_struct *task)
2320 {
2321         struct pt_regs *regs = task->thread.regs;
2322 
2323         if (regs != NULL) {
2324 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
2325                 task->thread.debug.dbcr0 &= ~DBCR0_IC;
2326                 task->thread.debug.dbcr0 = DBCR0_IDM | DBCR0_BT;
2327                 regs->msr |= MSR_DE;
2328 #else
2329                 regs->msr &= ~MSR_SE;
2330                 regs->msr |= MSR_BE;
2331 #endif
2332         }
2333         set_tsk_thread_flag(task, TIF_SINGLESTEP);
2334 }
2335 
2336 void user_disable_single_step(struct task_struct *task)
2337 {
2338         struct pt_regs *regs = task->thread.regs;
2339 
2340         if (regs != NULL) {
2341 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
2342                 /*
2343                  * The logic to disable single stepping should be as
2344                  * simple as turning off the Instruction Complete flag.
2345                  * And, after doing so, if all debug flags are off, turn
2346                  * off DBCR0(IDM) and MSR(DE) .... Torez
2347                  */
2348                 task->thread.debug.dbcr0 &= ~(DBCR0_IC|DBCR0_BT);
2349                 /*
2350                  * Test to see if any of the DBCR_ACTIVE_EVENTS bits are set.
2351                  */
2352                 if (!DBCR_ACTIVE_EVENTS(task->thread.debug.dbcr0,
2353                                         task->thread.debug.dbcr1)) {
2354                         /*
2355                          * All debug events were off.....
2356                          */
2357                         task->thread.debug.dbcr0 &= ~DBCR0_IDM;
2358                         regs->msr &= ~MSR_DE;
2359                 }
2360 #else
2361                 regs->msr &= ~(MSR_SE | MSR_BE);
2362 #endif
2363         }
2364         clear_tsk_thread_flag(task, TIF_SINGLESTEP);
2365 }
2366 
2367 #ifdef CONFIG_HAVE_HW_BREAKPOINT
2368 void ptrace_triggered(struct perf_event *bp,
2369                       struct perf_sample_data *data, struct pt_regs *regs)
2370 {
2371         struct perf_event_attr attr;
2372 
2373         /*
2374          * Disable the breakpoint request here since ptrace has defined a
2375          * one-shot behaviour for breakpoint exceptions in PPC64.
2376          * The SIGTRAP signal is generated automatically for us in do_dabr().
2377          * We don't have to do anything about that here
2378          */
2379         attr = bp->attr;
2380         attr.disabled = true;
2381         modify_user_hw_breakpoint(bp, &attr);
2382 }
2383 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
2384 
2385 static int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
2386                                unsigned long data)
2387 {
2388 #ifdef CONFIG_HAVE_HW_BREAKPOINT
2389         int ret;
2390         struct thread_struct *thread = &(task->thread);
2391         struct perf_event *bp;
2392         struct perf_event_attr attr;
2393 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
2394 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
2395         bool set_bp = true;
2396         struct arch_hw_breakpoint hw_brk;
2397 #endif
2398 
2399         /* For ppc64 we support one DABR and no IABR's at the moment (ppc64).
2400          *  For embedded processors we support one DAC and no IAC's at the
2401          *  moment.
2402          */
2403         if (addr > 0)
2404                 return -EINVAL;
2405 
2406         /* The bottom 3 bits in dabr are flags */
2407         if ((data & ~0x7UL) >= TASK_SIZE)
2408                 return -EIO;
2409 
2410 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
2411         /* For processors using DABR (i.e. 970), the bottom 3 bits are flags.
2412          *  It was assumed, on previous implementations, that 3 bits were
2413          *  passed together with the data address, fitting the design of the
2414          *  DABR register, as follows:
2415          *
2416          *  bit 0: Read flag
2417          *  bit 1: Write flag
2418          *  bit 2: Breakpoint translation
2419          *
2420          *  Thus, we use them here as so.
2421          */
2422 
2423         /* Ensure breakpoint translation bit is set */
2424         if (data && !(data & HW_BRK_TYPE_TRANSLATE))
2425                 return -EIO;
2426         hw_brk.address = data & (~HW_BRK_TYPE_DABR);
2427         hw_brk.type = (data & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
2428         hw_brk.len = 8;
2429         set_bp = (data) && (hw_brk.type & HW_BRK_TYPE_RDWR);
2430 #ifdef CONFIG_HAVE_HW_BREAKPOINT
2431         bp = thread->ptrace_bps[0];
2432         if (!set_bp) {
2433                 if (bp) {
2434                         unregister_hw_breakpoint(bp);
2435                         thread->ptrace_bps[0] = NULL;
2436                 }
2437                 return 0;
2438         }
2439         if (bp) {
2440                 attr = bp->attr;
2441                 attr.bp_addr = hw_brk.address;
2442                 arch_bp_generic_fields(hw_brk.type, &attr.bp_type);
2443 
2444                 /* Enable breakpoint */
2445                 attr.disabled = false;
2446 
2447                 ret =  modify_user_hw_breakpoint(bp, &attr);
2448                 if (ret) {
2449                         return ret;
2450                 }
2451                 thread->ptrace_bps[0] = bp;
2452                 thread->hw_brk = hw_brk;
2453                 return 0;
2454         }
2455 
2456         /* Create a new breakpoint request if one doesn't exist already */
2457         hw_breakpoint_init(&attr);
2458         attr.bp_addr = hw_brk.address;
2459         attr.bp_len = 8;
2460         arch_bp_generic_fields(hw_brk.type,
2461                                &attr.bp_type);
2462 
2463         thread->ptrace_bps[0] = bp = register_user_hw_breakpoint(&attr,
2464                                                ptrace_triggered, NULL, task);
2465         if (IS_ERR(bp)) {
2466                 thread->ptrace_bps[0] = NULL;
2467                 return PTR_ERR(bp);
2468         }
2469 
2470 #else /* !CONFIG_HAVE_HW_BREAKPOINT */
2471         if (set_bp && (!ppc_breakpoint_available()))
2472                 return -ENODEV;
2473 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
2474         task->thread.hw_brk = hw_brk;
2475 #else /* CONFIG_PPC_ADV_DEBUG_REGS */
2476         /* As described above, it was assumed 3 bits were passed with the data
2477          *  address, but we will assume only the mode bits will be passed
2478          *  as to not cause alignment restrictions for DAC-based processors.
2479          */
2480 
2481         /* DAC's hold the whole address without any mode flags */
2482         task->thread.debug.dac1 = data & ~0x3UL;
2483 
2484         if (task->thread.debug.dac1 == 0) {
2485                 dbcr_dac(task) &= ~(DBCR_DAC1R | DBCR_DAC1W);
2486                 if (!DBCR_ACTIVE_EVENTS(task->thread.debug.dbcr0,
2487                                         task->thread.debug.dbcr1)) {
2488                         task->thread.regs->msr &= ~MSR_DE;
2489                         task->thread.debug.dbcr0 &= ~DBCR0_IDM;
2490                 }
2491                 return 0;
2492         }
2493 
2494         /* Read or Write bits must be set */
2495 
2496         if (!(data & 0x3UL))
2497                 return -EINVAL;
2498 
2499         /* Set the Internal Debugging flag (IDM bit 1) for the DBCR0
2500            register */
2501         task->thread.debug.dbcr0 |= DBCR0_IDM;
2502 
2503         /* Check for write and read flags and set DBCR0
2504            accordingly */
2505         dbcr_dac(task) &= ~(DBCR_DAC1R|DBCR_DAC1W);
2506         if (data & 0x1UL)
2507                 dbcr_dac(task) |= DBCR_DAC1R;
2508         if (data & 0x2UL)
2509                 dbcr_dac(task) |= DBCR_DAC1W;
2510         task->thread.regs->msr |= MSR_DE;
2511 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
2512         return 0;
2513 }
2514 
2515 /*
2516  * Called by kernel/ptrace.c when detaching..
2517  *
2518  * Make sure single step bits etc are not set.
2519  */
2520 void ptrace_disable(struct task_struct *child)
2521 {
2522         /* make sure the single step bit is not set. */
2523         user_disable_single_step(child);
2524 }
2525 
2526 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
2527 static long set_instruction_bp(struct task_struct *child,
2528                               struct ppc_hw_breakpoint *bp_info)
2529 {
2530         int slot;
2531         int slot1_in_use = ((child->thread.debug.dbcr0 & DBCR0_IAC1) != 0);
2532         int slot2_in_use = ((child->thread.debug.dbcr0 & DBCR0_IAC2) != 0);
2533         int slot3_in_use = ((child->thread.debug.dbcr0 & DBCR0_IAC3) != 0);
2534         int slot4_in_use = ((child->thread.debug.dbcr0 & DBCR0_IAC4) != 0);
2535 
2536         if (dbcr_iac_range(child) & DBCR_IAC12MODE)
2537                 slot2_in_use = 1;
2538         if (dbcr_iac_range(child) & DBCR_IAC34MODE)
2539                 slot4_in_use = 1;
2540 
2541         if (bp_info->addr >= TASK_SIZE)
2542                 return -EIO;
2543 
2544         if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) {
2545 
2546                 /* Make sure range is valid. */
2547                 if (bp_info->addr2 >= TASK_SIZE)
2548                         return -EIO;
2549 
2550                 /* We need a pair of IAC regsisters */
2551                 if ((!slot1_in_use) && (!slot2_in_use)) {
2552                         slot = 1;
2553                         child->thread.debug.iac1 = bp_info->addr;
2554                         child->thread.debug.iac2 = bp_info->addr2;
2555                         child->thread.debug.dbcr0 |= DBCR0_IAC1;
2556                         if (bp_info->addr_mode ==
2557                                         PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
2558                                 dbcr_iac_range(child) |= DBCR_IAC12X;
2559                         else
2560                                 dbcr_iac_range(child) |= DBCR_IAC12I;
2561 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
2562                 } else if ((!slot3_in_use) && (!slot4_in_use)) {
2563                         slot = 3;
2564                         child->thread.debug.iac3 = bp_info->addr;
2565                         child->thread.debug.iac4 = bp_info->addr2;
2566                         child->thread.debug.dbcr0 |= DBCR0_IAC3;
2567                         if (bp_info->addr_mode ==
2568                                         PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
2569                                 dbcr_iac_range(child) |= DBCR_IAC34X;
2570                         else
2571                                 dbcr_iac_range(child) |= DBCR_IAC34I;
2572 #endif
2573                 } else
2574                         return -ENOSPC;
2575         } else {
2576                 /* We only need one.  If possible leave a pair free in
2577                  * case a range is needed later
2578                  */
2579                 if (!slot1_in_use) {
2580                         /*
2581                          * Don't use iac1 if iac1-iac2 are free and either
2582                          * iac3 or iac4 (but not both) are free
2583                          */
2584                         if (slot2_in_use || (slot3_in_use == slot4_in_use)) {
2585                                 slot = 1;
2586                                 child->thread.debug.iac1 = bp_info->addr;
2587                                 child->thread.debug.dbcr0 |= DBCR0_IAC1;
2588                                 goto out;
2589                         }
2590                 }
2591                 if (!slot2_in_use) {
2592                         slot = 2;
2593                         child->thread.debug.iac2 = bp_info->addr;
2594                         child->thread.debug.dbcr0 |= DBCR0_IAC2;
2595 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
2596                 } else if (!slot3_in_use) {
2597                         slot = 3;
2598                         child->thread.debug.iac3 = bp_info->addr;
2599                         child->thread.debug.dbcr0 |= DBCR0_IAC3;
2600                 } else if (!slot4_in_use) {
2601                         slot = 4;
2602                         child->thread.debug.iac4 = bp_info->addr;
2603                         child->thread.debug.dbcr0 |= DBCR0_IAC4;
2604 #endif
2605                 } else
2606                         return -ENOSPC;
2607         }
2608 out:
2609         child->thread.debug.dbcr0 |= DBCR0_IDM;
2610         child->thread.regs->msr |= MSR_DE;
2611 
2612         return slot;
2613 }
2614 
2615 static int del_instruction_bp(struct task_struct *child, int slot)
2616 {
2617         switch (slot) {
2618         case 1:
2619                 if ((child->thread.debug.dbcr0 & DBCR0_IAC1) == 0)
2620                         return -ENOENT;
2621 
2622                 if (dbcr_iac_range(child) & DBCR_IAC12MODE) {
2623                         /* address range - clear slots 1 & 2 */
2624                         child->thread.debug.iac2 = 0;
2625                         dbcr_iac_range(child) &= ~DBCR_IAC12MODE;
2626                 }
2627                 child->thread.debug.iac1 = 0;
2628                 child->thread.debug.dbcr0 &= ~DBCR0_IAC1;
2629                 break;
2630         case 2:
2631                 if ((child->thread.debug.dbcr0 & DBCR0_IAC2) == 0)
2632                         return -ENOENT;
2633 
2634                 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
2635                         /* used in a range */
2636                         return -EINVAL;
2637                 child->thread.debug.iac2 = 0;
2638                 child->thread.debug.dbcr0 &= ~DBCR0_IAC2;
2639                 break;
2640 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
2641         case 3:
2642                 if ((child->thread.debug.dbcr0 & DBCR0_IAC3) == 0)
2643                         return -ENOENT;
2644 
2645                 if (dbcr_iac_range(child) & DBCR_IAC34MODE) {
2646                         /* address range - clear slots 3 & 4 */
2647                         child->thread.debug.iac4 = 0;
2648                         dbcr_iac_range(child) &= ~DBCR_IAC34MODE;
2649                 }
2650                 child->thread.debug.iac3 = 0;
2651                 child->thread.debug.dbcr0 &= ~DBCR0_IAC3;
2652                 break;
2653         case 4:
2654                 if ((child->thread.debug.dbcr0 & DBCR0_IAC4) == 0)
2655                         return -ENOENT;
2656 
2657                 if (dbcr_iac_range(child) & DBCR_IAC34MODE)
2658                         /* Used in a range */
2659                         return -EINVAL;
2660                 child->thread.debug.iac4 = 0;
2661                 child->thread.debug.dbcr0 &= ~DBCR0_IAC4;
2662                 break;
2663 #endif
2664         default:
2665                 return -EINVAL;
2666         }
2667         return 0;
2668 }
2669 
2670 static int set_dac(struct task_struct *child, struct ppc_hw_breakpoint *bp_info)
2671 {
2672         int byte_enable =
2673                 (bp_info->condition_mode >> PPC_BREAKPOINT_CONDITION_BE_SHIFT)
2674                 & 0xf;
2675         int condition_mode =
2676                 bp_info->condition_mode & PPC_BREAKPOINT_CONDITION_MODE;
2677         int slot;
2678 
2679         if (byte_enable && (condition_mode == 0))
2680                 return -EINVAL;
2681 
2682         if (bp_info->addr >= TASK_SIZE)
2683                 return -EIO;
2684 
2685         if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0) {
2686                 slot = 1;
2687                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
2688                         dbcr_dac(child) |= DBCR_DAC1R;
2689                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
2690                         dbcr_dac(child) |= DBCR_DAC1W;
2691                 child->thread.debug.dac1 = (unsigned long)bp_info->addr;
2692 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
2693                 if (byte_enable) {
2694                         child->thread.debug.dvc1 =
2695                                 (unsigned long)bp_info->condition_value;
2696                         child->thread.debug.dbcr2 |=
2697                                 ((byte_enable << DBCR2_DVC1BE_SHIFT) |
2698                                  (condition_mode << DBCR2_DVC1M_SHIFT));
2699                 }
2700 #endif
2701 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
2702         } else if (child->thread.debug.dbcr2 & DBCR2_DAC12MODE) {
2703                 /* Both dac1 and dac2 are part of a range */
2704                 return -ENOSPC;
2705 #endif
2706         } else if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0) {
2707                 slot = 2;
2708                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
2709                         dbcr_dac(child) |= DBCR_DAC2R;
2710                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
2711                         dbcr_dac(child) |= DBCR_DAC2W;
2712                 child->thread.debug.dac2 = (unsigned long)bp_info->addr;
2713 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
2714                 if (byte_enable) {
2715                         child->thread.debug.dvc2 =
2716                                 (unsigned long)bp_info->condition_value;
2717                         child->thread.debug.dbcr2 |=
2718                                 ((byte_enable << DBCR2_DVC2BE_SHIFT) |
2719                                  (condition_mode << DBCR2_DVC2M_SHIFT));
2720                 }
2721 #endif
2722         } else
2723                 return -ENOSPC;
2724         child->thread.debug.dbcr0 |= DBCR0_IDM;
2725         child->thread.regs->msr |= MSR_DE;
2726 
2727         return slot + 4;
2728 }
2729 
2730 static int del_dac(struct task_struct *child, int slot)
2731 {
2732         if (slot == 1) {
2733                 if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0)
2734                         return -ENOENT;
2735 
2736                 child->thread.debug.dac1 = 0;
2737                 dbcr_dac(child) &= ~(DBCR_DAC1R | DBCR_DAC1W);
2738 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
2739                 if (child->thread.debug.dbcr2 & DBCR2_DAC12MODE) {
2740                         child->thread.debug.dac2 = 0;
2741                         child->thread.debug.dbcr2 &= ~DBCR2_DAC12MODE;
2742                 }
2743                 child->thread.debug.dbcr2 &= ~(DBCR2_DVC1M | DBCR2_DVC1BE);
2744 #endif
2745 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
2746                 child->thread.debug.dvc1 = 0;
2747 #endif
2748         } else if (slot == 2) {
2749                 if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0)
2750                         return -ENOENT;
2751 
2752 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
2753                 if (child->thread.debug.dbcr2 & DBCR2_DAC12MODE)
2754                         /* Part of a range */
2755                         return -EINVAL;
2756                 child->thread.debug.dbcr2 &= ~(DBCR2_DVC2M | DBCR2_DVC2BE);
2757 #endif
2758 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
2759                 child->thread.debug.dvc2 = 0;
2760 #endif
2761                 child->thread.debug.dac2 = 0;
2762                 dbcr_dac(child) &= ~(DBCR_DAC2R | DBCR_DAC2W);
2763         } else
2764                 return -EINVAL;
2765 
2766         return 0;
2767 }
2768 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
2769 
2770 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
2771 static int set_dac_range(struct task_struct *child,
2772                          struct ppc_hw_breakpoint *bp_info)
2773 {
2774         int mode = bp_info->addr_mode & PPC_BREAKPOINT_MODE_MASK;
2775 
2776         /* We don't allow range watchpoints to be used with DVC */
2777         if (bp_info->condition_mode)
2778                 return -EINVAL;
2779 
2780         /*
2781          * Best effort to verify the address range.  The user/supervisor bits
2782          * prevent trapping in kernel space, but let's fail on an obvious bad
2783          * range.  The simple test on the mask is not fool-proof, and any
2784          * exclusive range will spill over into kernel space.
2785          */
2786         if (bp_info->addr >= TASK_SIZE)
2787                 return -EIO;
2788         if (mode == PPC_BREAKPOINT_MODE_MASK) {
2789                 /*
2790                  * dac2 is a bitmask.  Don't allow a mask that makes a
2791                  * kernel space address from a valid dac1 value
2792                  */
2793                 if (~((unsigned long)bp_info->addr2) >= TASK_SIZE)
2794                         return -EIO;
2795         } else {
2796                 /*
2797                  * For range breakpoints, addr2 must also be a valid address
2798                  */
2799                 if (bp_info->addr2 >= TASK_SIZE)
2800                         return -EIO;
2801         }
2802 
2803         if (child->thread.debug.dbcr0 &
2804             (DBCR0_DAC1R | DBCR0_DAC1W | DBCR0_DAC2R | DBCR0_DAC2W))
2805                 return -ENOSPC;
2806 
2807         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
2808                 child->thread.debug.dbcr0 |= (DBCR0_DAC1R | DBCR0_IDM);
2809         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
2810                 child->thread.debug.dbcr0 |= (DBCR0_DAC1W | DBCR0_IDM);
2811         child->thread.debug.dac1 = bp_info->addr;
2812         child->thread.debug.dac2 = bp_info->addr2;
2813         if (mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE)
2814                 child->thread.debug.dbcr2  |= DBCR2_DAC12M;
2815         else if (mode == PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
2816                 child->thread.debug.dbcr2  |= DBCR2_DAC12MX;
2817         else    /* PPC_BREAKPOINT_MODE_MASK */
2818                 child->thread.debug.dbcr2  |= DBCR2_DAC12MM;
2819         child->thread.regs->msr |= MSR_DE;
2820 
2821         return 5;
2822 }
2823 #endif /* CONFIG_PPC_ADV_DEBUG_DAC_RANGE */
2824 
2825 static long ppc_set_hwdebug(struct task_struct *child,
2826                      struct ppc_hw_breakpoint *bp_info)
2827 {
2828 #ifdef CONFIG_HAVE_HW_BREAKPOINT
2829         int len = 0;
2830         struct thread_struct *thread = &(child->thread);
2831         struct perf_event *bp;
2832         struct perf_event_attr attr;
2833 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
2834 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
2835         struct arch_hw_breakpoint brk;
2836 #endif
2837 
2838         if (bp_info->version != 1)
2839                 return -ENOTSUPP;
2840 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
2841         /*
2842          * Check for invalid flags and combinations
2843          */
2844         if ((bp_info->trigger_type == 0) ||
2845             (bp_info->trigger_type & ~(PPC_BREAKPOINT_TRIGGER_EXECUTE |
2846                                        PPC_BREAKPOINT_TRIGGER_RW)) ||
2847             (bp_info->addr_mode & ~PPC_BREAKPOINT_MODE_MASK) ||
2848             (bp_info->condition_mode &
2849              ~(PPC_BREAKPOINT_CONDITION_MODE |
2850                PPC_BREAKPOINT_CONDITION_BE_ALL)))
2851                 return -EINVAL;
2852 #if CONFIG_PPC_ADV_DEBUG_DVCS == 0
2853         if (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
2854                 return -EINVAL;
2855 #endif
2856 
2857         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_EXECUTE) {
2858                 if ((bp_info->trigger_type != PPC_BREAKPOINT_TRIGGER_EXECUTE) ||
2859                     (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE))
2860                         return -EINVAL;
2861                 return set_instruction_bp(child, bp_info);
2862         }
2863         if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_EXACT)
2864                 return set_dac(child, bp_info);
2865 
2866 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
2867         return set_dac_range(child, bp_info);
2868 #else
2869         return -EINVAL;
2870 #endif
2871 #else /* !CONFIG_PPC_ADV_DEBUG_DVCS */
2872         /*
2873          * We only support one data breakpoint
2874          */
2875         if ((bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_RW) == 0 ||
2876             (bp_info->trigger_type & ~PPC_BREAKPOINT_TRIGGER_RW) != 0 ||
2877             bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
2878                 return -EINVAL;
2879 
2880         if ((unsigned long)bp_info->addr >= TASK_SIZE)
2881                 return -EIO;
2882 
2883         brk.address = bp_info->addr & ~7UL;
2884         brk.type = HW_BRK_TYPE_TRANSLATE;
2885         brk.len = 8;
2886         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
2887                 brk.type |= HW_BRK_TYPE_READ;
2888         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
2889                 brk.type |= HW_BRK_TYPE_WRITE;
2890 #ifdef CONFIG_HAVE_HW_BREAKPOINT
2891         /*
2892          * Check if the request is for 'range' breakpoints. We can
2893          * support it if range < 8 bytes.
2894          */
2895         if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE)
2896                 len = bp_info->addr2 - bp_info->addr;
2897         else if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_EXACT)
2898                 len = 1;
2899         else
2900                 return -EINVAL;
2901         bp = thread->ptrace_bps[0];
2902         if (bp)
2903                 return -ENOSPC;
2904 
2905         /* Create a new breakpoint request if one doesn't exist already */
2906         hw_breakpoint_init(&attr);
2907         attr.bp_addr = (unsigned long)bp_info->addr & ~HW_BREAKPOINT_ALIGN;
2908         attr.bp_len = len;
2909         arch_bp_generic_fields(brk.type, &attr.bp_type);
2910 
2911         thread->ptrace_bps[0] = bp = register_user_hw_breakpoint(&attr,
2912                                                ptrace_triggered, NULL, child);
2913         if (IS_ERR(bp)) {
2914                 thread->ptrace_bps[0] = NULL;
2915                 return PTR_ERR(bp);
2916         }
2917 
2918         return 1;
2919 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
2920 
2921         if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT)
2922                 return -EINVAL;
2923 
2924         if (child->thread.hw_brk.address)
2925                 return -ENOSPC;
2926 
2927         if (!ppc_breakpoint_available())
2928                 return -ENODEV;
2929 
2930         child->thread.hw_brk = brk;
2931 
2932         return 1;
2933 #endif /* !CONFIG_PPC_ADV_DEBUG_DVCS */
2934 }
2935 
2936 static long ppc_del_hwdebug(struct task_struct *child, long data)
2937 {
2938 #ifdef CONFIG_HAVE_HW_BREAKPOINT
2939         int ret = 0;
2940         struct thread_struct *thread = &(child->thread);
2941         struct perf_event *bp;
2942 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
2943 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
2944         int rc;
2945 
2946         if (data <= 4)
2947                 rc = del_instruction_bp(child, (int)data);
2948         else
2949                 rc = del_dac(child, (int)data - 4);
2950 
2951         if (!rc) {
2952                 if (!DBCR_ACTIVE_EVENTS(child->thread.debug.dbcr0,
2953                                         child->thread.debug.dbcr1)) {
2954                         child->thread.debug.dbcr0 &= ~DBCR0_IDM;
2955                         child->thread.regs->msr &= ~MSR_DE;
2956                 }
2957         }
2958         return rc;
2959 #else
2960         if (data != 1)
2961                 return -EINVAL;
2962 
2963 #ifdef CONFIG_HAVE_HW_BREAKPOINT
2964         bp = thread->ptrace_bps[0];
2965         if (bp) {
2966                 unregister_hw_breakpoint(bp);
2967                 thread->ptrace_bps[0] = NULL;
2968         } else
2969                 ret = -ENOENT;
2970         return ret;
2971 #else /* CONFIG_HAVE_HW_BREAKPOINT */
2972         if (child->thread.hw_brk.address == 0)
2973                 return -ENOENT;
2974 
2975         child->thread.hw_brk.address = 0;
2976         child->thread.hw_brk.type = 0;
2977 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
2978 
2979         return 0;
2980 #endif
2981 }
2982 
2983 long arch_ptrace(struct task_struct *child, long request,
2984                  unsigned long addr, unsigned long data)
2985 {
2986         int ret = -EPERM;
2987         void __user *datavp = (void __user *) data;
2988         unsigned long __user *datalp = datavp;
2989 
2990         switch (request) {
2991         /* read the word at location addr in the USER area. */
2992         case PTRACE_PEEKUSR: {
2993                 unsigned long index, tmp;
2994 
2995                 ret = -EIO;
2996                 /* convert to index and check */
2997 #ifdef CONFIG_PPC32
2998                 index = addr >> 2;
2999                 if ((addr & 3) || (index > PT_FPSCR)
3000                     || (child->thread.regs == NULL))
3001 #else
3002                 index = addr >> 3;
3003                 if ((addr & 7) || (index > PT_FPSCR))
3004 #endif
3005                         break;
3006 
3007                 CHECK_FULL_REGS(child->thread.regs);
3008                 if (index < PT_FPR0) {
3009                         ret = ptrace_get_reg(child, (int) index, &tmp);
3010                         if (ret)
3011                                 break;
3012                 } else {
3013                         unsigned int fpidx = index - PT_FPR0;
3014 
3015                         flush_fp_to_thread(child);
3016                         if (fpidx < (PT_FPSCR - PT_FPR0))
3017                                 memcpy(&tmp, &child->thread.TS_FPR(fpidx),
3018                                        sizeof(long));
3019                         else
3020                                 tmp = child->thread.fp_state.fpscr;
3021                 }
3022                 ret = put_user(tmp, datalp);
3023                 break;
3024         }
3025 
3026         /* write the word at location addr in the USER area */
3027         case PTRACE_POKEUSR: {
3028                 unsigned long index;
3029 
3030                 ret = -EIO;
3031                 /* convert to index and check */
3032 #ifdef CONFIG_PPC32
3033                 index = addr >> 2;
3034                 if ((addr & 3) || (index > PT_FPSCR)
3035                     || (child->thread.regs == NULL))
3036 #else
3037                 index = addr >> 3;
3038                 if ((addr & 7) || (index > PT_FPSCR))
3039 #endif
3040                         break;
3041 
3042                 CHECK_FULL_REGS(child->thread.regs);
3043                 if (index < PT_FPR0) {
3044                         ret = ptrace_put_reg(child, index, data);
3045                 } else {
3046                         unsigned int fpidx = index - PT_FPR0;
3047 
3048                         flush_fp_to_thread(child);
3049                         if (fpidx < (PT_FPSCR - PT_FPR0))
3050                                 memcpy(&child->thread.TS_FPR(fpidx), &data,
3051                                        sizeof(long));
3052                         else
3053                                 child->thread.fp_state.fpscr = data;
3054                         ret = 0;
3055                 }
3056                 break;
3057         }
3058 
3059         case PPC_PTRACE_GETHWDBGINFO: {
3060                 struct ppc_debug_info dbginfo;
3061 
3062                 dbginfo.version = 1;
3063 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
3064                 dbginfo.num_instruction_bps = CONFIG_PPC_ADV_DEBUG_IACS;
3065                 dbginfo.num_data_bps = CONFIG_PPC_ADV_DEBUG_DACS;
3066                 dbginfo.num_condition_regs = CONFIG_PPC_ADV_DEBUG_DVCS;
3067                 dbginfo.data_bp_alignment = 4;
3068                 dbginfo.sizeof_condition = 4;
3069                 dbginfo.features = PPC_DEBUG_FEATURE_INSN_BP_RANGE |
3070                                    PPC_DEBUG_FEATURE_INSN_BP_MASK;
3071 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
3072                 dbginfo.features |=
3073                                    PPC_DEBUG_FEATURE_DATA_BP_RANGE |
3074                                    PPC_DEBUG_FEATURE_DATA_BP_MASK;
3075 #endif
3076 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
3077                 dbginfo.num_instruction_bps = 0;
3078                 if (ppc_breakpoint_available())
3079                         dbginfo.num_data_bps = 1;
3080                 else
3081                         dbginfo.num_data_bps = 0;
3082                 dbginfo.num_condition_regs = 0;
3083 #ifdef CONFIG_PPC64
3084                 dbginfo.data_bp_alignment = 8;
3085 #else
3086                 dbginfo.data_bp_alignment = 4;
3087 #endif
3088                 dbginfo.sizeof_condition = 0;
3089 #ifdef CONFIG_HAVE_HW_BREAKPOINT
3090                 dbginfo.features = PPC_DEBUG_FEATURE_DATA_BP_RANGE;
3091                 if (dawr_enabled())
3092                         dbginfo.features |= PPC_DEBUG_FEATURE_DATA_BP_DAWR;
3093 #else
3094                 dbginfo.features = 0;
3095 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
3096 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
3097 
3098                 if (copy_to_user(datavp, &dbginfo,
3099                                  sizeof(struct ppc_debug_info)))
3100                         return -EFAULT;
3101                 return 0;
3102         }
3103 
3104         case PPC_PTRACE_SETHWDEBUG: {
3105                 struct ppc_hw_breakpoint bp_info;
3106 
3107                 if (copy_from_user(&bp_info, datavp,
3108                                    sizeof(struct ppc_hw_breakpoint)))
3109                         return -EFAULT;
3110                 return ppc_set_hwdebug(child, &bp_info);
3111         }
3112 
3113         case PPC_PTRACE_DELHWDEBUG: {
3114                 ret = ppc_del_hwdebug(child, data);
3115                 break;
3116         }
3117 
3118         case PTRACE_GET_DEBUGREG: {
3119 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
3120                 unsigned long dabr_fake;
3121 #endif
3122                 ret = -EINVAL;
3123                 /* We only support one DABR and no IABRS at the moment */
3124                 if (addr > 0)
3125                         break;
3126 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
3127                 ret = put_user(child->thread.debug.dac1, datalp);
3128 #else
3129                 dabr_fake = ((child->thread.hw_brk.address & (~HW_BRK_TYPE_DABR)) |
3130                              (child->thread.hw_brk.type & HW_BRK_TYPE_DABR));
3131                 ret = put_user(dabr_fake, datalp);
3132 #endif
3133                 break;
3134         }
3135 
3136         case PTRACE_SET_DEBUGREG:
3137                 ret = ptrace_set_debugreg(child, addr, data);
3138                 break;
3139 
3140 #ifdef CONFIG_PPC64
3141         case PTRACE_GETREGS64:
3142 #endif
3143         case PTRACE_GETREGS:    /* Get all pt_regs from the child. */
3144                 return copy_regset_to_user(child, &user_ppc_native_view,
3145                                            REGSET_GPR,
3146                                            0, sizeof(struct user_pt_regs),
3147                                            datavp);
3148 
3149 #ifdef CONFIG_PPC64
3150         case PTRACE_SETREGS64:
3151 #endif
3152         case PTRACE_SETREGS:    /* Set all gp regs in the child. */
3153                 return copy_regset_from_user(child, &user_ppc_native_view,
3154                                              REGSET_GPR,
3155                                              0, sizeof(struct user_pt_regs),
3156                                              datavp);
3157 
3158         case PTRACE_GETFPREGS: /* Get the child FPU state (FPR0...31 + FPSCR) */
3159                 return copy_regset_to_user(child, &user_ppc_native_view,
3160                                            REGSET_FPR,
3161                                            0, sizeof(elf_fpregset_t),
3162                                            datavp);
3163 
3164         case PTRACE_SETFPREGS: /* Set the child FPU state (FPR0...31 + FPSCR) */
3165                 return copy_regset_from_user(child, &user_ppc_native_view,
3166                                              REGSET_FPR,
3167                                              0, sizeof(elf_fpregset_t),
3168                                              datavp);
3169 
3170 #ifdef CONFIG_ALTIVEC
3171         case PTRACE_GETVRREGS:
3172                 return copy_regset_to_user(child, &user_ppc_native_view,
3173                                            REGSET_VMX,
3174                                            0, (33 * sizeof(vector128) +
3175                                                sizeof(u32)),
3176                                            datavp);
3177 
3178         case PTRACE_SETVRREGS:
3179                 return copy_regset_from_user(child, &user_ppc_native_view,
3180                                              REGSET_VMX,
3181                                              0, (33 * sizeof(vector128) +
3182                                                  sizeof(u32)),
3183                                              datavp);
3184 #endif
3185 #ifdef CONFIG_VSX
3186         case PTRACE_GETVSRREGS:
3187                 return copy_regset_to_user(child, &user_ppc_native_view,
3188                                            REGSET_VSX,
3189                                            0, 32 * sizeof(double),
3190                                            datavp);
3191 
3192         case PTRACE_SETVSRREGS:
3193                 return copy_regset_from_user(child, &user_ppc_native_view,
3194                                              REGSET_VSX,
3195                                              0, 32 * sizeof(double),
3196                                              datavp);
3197 #endif
3198 #ifdef CONFIG_SPE
3199         case PTRACE_GETEVRREGS:
3200                 /* Get the child spe register state. */
3201                 return copy_regset_to_user(child, &user_ppc_native_view,
3202                                            REGSET_SPE, 0, 35 * sizeof(u32),
3203                                            datavp);
3204 
3205         case PTRACE_SETEVRREGS:
3206                 /* Set the child spe register state. */
3207                 return copy_regset_from_user(child, &user_ppc_native_view,
3208                                              REGSET_SPE, 0, 35 * sizeof(u32),
3209                                              datavp);
3210 #endif
3211 
3212         default:
3213                 ret = ptrace_request(child, request, addr, data);
3214                 break;
3215         }
3216         return ret;
3217 }
3218 
3219 #ifdef CONFIG_SECCOMP
3220 static int do_seccomp(struct pt_regs *regs)
3221 {
3222         if (!test_thread_flag(TIF_SECCOMP))
3223                 return 0;
3224 
3225         /*
3226          * The ABI we present to seccomp tracers is that r3 contains
3227          * the syscall return value and orig_gpr3 contains the first
3228          * syscall parameter. This is different to the ptrace ABI where
3229          * both r3 and orig_gpr3 contain the first syscall parameter.
3230          */
3231         regs->gpr[3] = -ENOSYS;
3232 
3233         /*
3234          * We use the __ version here because we have already checked
3235          * TIF_SECCOMP. If this fails, there is nothing left to do, we
3236          * have already loaded -ENOSYS into r3, or seccomp has put
3237          * something else in r3 (via SECCOMP_RET_ERRNO/TRACE).
3238          */
3239         if (__secure_computing(NULL))
3240                 return -1;
3241 
3242         /*
3243          * The syscall was allowed by seccomp, restore the register
3244          * state to what audit expects.
3245          * Note that we use orig_gpr3, which means a seccomp tracer can
3246          * modify the first syscall parameter (in orig_gpr3) and also
3247          * allow the syscall to proceed.
3248          */
3249         regs->gpr[3] = regs->orig_gpr3;
3250 
3251         return 0;
3252 }
3253 #else
3254 static inline int do_seccomp(struct pt_regs *regs) { return 0; }
3255 #endif /* CONFIG_SECCOMP */
3256 
3257 /**
3258  * do_syscall_trace_enter() - Do syscall tracing on kernel entry.
3259  * @regs: the pt_regs of the task to trace (current)
3260  *
3261  * Performs various types of tracing on syscall entry. This includes seccomp,
3262  * ptrace, syscall tracepoints and audit.
3263  *
3264  * The pt_regs are potentially visible to userspace via ptrace, so their
3265  * contents is ABI.
3266  *
3267  * One or more of the tracers may modify the contents of pt_regs, in particular
3268  * to modify arguments or even the syscall number itself.
3269  *
3270  * It's also possible that a tracer can choose to reject the system call. In
3271  * that case this function will return an illegal syscall number, and will put
3272  * an appropriate return value in regs->r3.
3273  *
3274  * Return: the (possibly changed) syscall number.
3275  */
3276 long do_syscall_trace_enter(struct pt_regs *regs)
3277 {
3278         u32 flags;
3279 
3280         user_exit();
3281 
3282         flags = READ_ONCE(current_thread_info()->flags) &
3283                 (_TIF_SYSCALL_EMU | _TIF_SYSCALL_TRACE);
3284 
3285         if (flags) {
3286                 int rc = tracehook_report_syscall_entry(regs);
3287 
3288                 if (unlikely(flags & _TIF_SYSCALL_EMU)) {
3289                         /*
3290                          * A nonzero return code from
3291                          * tracehook_report_syscall_entry() tells us to prevent
3292                          * the syscall execution, but we are not going to
3293                          * execute it anyway.
3294                          *
3295                          * Returning -1 will skip the syscall execution. We want
3296                          * to avoid clobbering any registers, so we don't goto
3297                          * the skip label below.
3298                          */
3299                         return -1;
3300                 }
3301 
3302                 if (rc) {
3303                         /*
3304                          * The tracer decided to abort the syscall. Note that
3305                          * the tracer may also just change regs->gpr[0] to an
3306                          * invalid syscall number, that is handled below on the
3307                          * exit path.
3308                          */
3309                         goto skip;
3310                 }
3311         }
3312 
3313         /* Run seccomp after ptrace; allow it to set gpr[3]. */
3314         if (do_seccomp(regs))
3315                 return -1;
3316 
3317         /* Avoid trace and audit when syscall is invalid. */
3318         if (regs->gpr[0] >= NR_syscalls)
3319                 goto skip;
3320 
3321         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
3322                 trace_sys_enter(regs, regs->gpr[0]);
3323 
3324 #ifdef CONFIG_PPC64
3325         if (!is_32bit_task())
3326                 audit_syscall_entry(regs->gpr[0], regs->gpr[3], regs->gpr[4],
3327                                     regs->gpr[5], regs->gpr[6]);
3328         else
3329 #endif
3330                 audit_syscall_entry(regs->gpr[0],
3331                                     regs->gpr[3] & 0xffffffff,
3332                                     regs->gpr[4] & 0xffffffff,
3333                                     regs->gpr[5] & 0xffffffff,
3334                                     regs->gpr[6] & 0xffffffff);
3335 
3336         /* Return the possibly modified but valid syscall number */
3337         return regs->gpr[0];
3338 
3339 skip:
3340         /*
3341          * If we are aborting explicitly, or if the syscall number is
3342          * now invalid, set the return value to -ENOSYS.
3343          */
3344         regs->gpr[3] = -ENOSYS;
3345         return -1;
3346 }
3347 
3348 void do_syscall_trace_leave(struct pt_regs *regs)
3349 {
3350         int step;
3351 
3352         audit_syscall_exit(regs);
3353 
3354         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
3355                 trace_sys_exit(regs, regs->result);
3356 
3357         step = test_thread_flag(TIF_SINGLESTEP);
3358         if (step || test_thread_flag(TIF_SYSCALL_TRACE))
3359                 tracehook_report_syscall_exit(regs, step);
3360 
3361         user_enter();
3362 }
3363 
3364 void __init pt_regs_check(void)
3365 {
3366         BUILD_BUG_ON(offsetof(struct pt_regs, gpr) !=
3367                      offsetof(struct user_pt_regs, gpr));
3368         BUILD_BUG_ON(offsetof(struct pt_regs, nip) !=
3369                      offsetof(struct user_pt_regs, nip));
3370         BUILD_BUG_ON(offsetof(struct pt_regs, msr) !=
3371                      offsetof(struct user_pt_regs, msr));
3372         BUILD_BUG_ON(offsetof(struct pt_regs, msr) !=
3373                      offsetof(struct user_pt_regs, msr));
3374         BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
3375                      offsetof(struct user_pt_regs, orig_gpr3));
3376         BUILD_BUG_ON(offsetof(struct pt_regs, ctr) !=
3377                      offsetof(struct user_pt_regs, ctr));
3378         BUILD_BUG_ON(offsetof(struct pt_regs, link) !=
3379                      offsetof(struct user_pt_regs, link));
3380         BUILD_BUG_ON(offsetof(struct pt_regs, xer) !=
3381                      offsetof(struct user_pt_regs, xer));
3382         BUILD_BUG_ON(offsetof(struct pt_regs, ccr) !=
3383                      offsetof(struct user_pt_regs, ccr));
3384 #ifdef __powerpc64__
3385         BUILD_BUG_ON(offsetof(struct pt_regs, softe) !=
3386                      offsetof(struct user_pt_regs, softe));
3387 #else
3388         BUILD_BUG_ON(offsetof(struct pt_regs, mq) !=
3389                      offsetof(struct user_pt_regs, mq));
3390 #endif
3391         BUILD_BUG_ON(offsetof(struct pt_regs, trap) !=
3392                      offsetof(struct user_pt_regs, trap));
3393         BUILD_BUG_ON(offsetof(struct pt_regs, dar) !=
3394                      offsetof(struct user_pt_regs, dar));
3395         BUILD_BUG_ON(offsetof(struct pt_regs, dsisr) !=
3396                      offsetof(struct user_pt_regs, dsisr));
3397         BUILD_BUG_ON(offsetof(struct pt_regs, result) !=
3398                      offsetof(struct user_pt_regs, result));
3399 
3400         BUILD_BUG_ON(sizeof(struct user_pt_regs) > sizeof(struct pt_regs));
3401 }
3402 

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