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Linux/arch/powerpc/platforms/85xx/stx_gp3.c

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  1 /*
  2  * Based on MPC8560 ADS and arch/ppc stx_gp3 ports
  3  *
  4  * Maintained by Kumar Gala (see MAINTAINERS for contact information)
  5  *
  6  * Copyright 2008 Freescale Semiconductor Inc.
  7  *
  8  * Dan Malek <dan@embeddededge.com>
  9  * Copyright 2004 Embedded Edge, LLC
 10  *
 11  * Copied from mpc8560_ads.c
 12  * Copyright 2002, 2003 Motorola Inc.
 13  *
 14  * Ported to 2.6, Matt Porter <mporter@kernel.crashing.org>
 15  * Copyright 2004-2005 MontaVista Software, Inc.
 16  *
 17  * This program is free software; you can redistribute  it and/or modify it
 18  * under  the terms of  the GNU General  Public License as published by the
 19  * Free Software Foundation;  either version 2 of the  License, or (at your
 20  * option) any later version.
 21  */
 22 
 23 #include <linux/stddef.h>
 24 #include <linux/kernel.h>
 25 #include <linux/pci.h>
 26 #include <linux/kdev_t.h>
 27 #include <linux/delay.h>
 28 #include <linux/seq_file.h>
 29 #include <linux/of_platform.h>
 30 
 31 #include <asm/system.h>
 32 #include <asm/time.h>
 33 #include <asm/machdep.h>
 34 #include <asm/pci-bridge.h>
 35 #include <asm/mpic.h>
 36 #include <asm/prom.h>
 37 #include <mm/mmu_decl.h>
 38 #include <asm/udbg.h>
 39 
 40 #include <sysdev/fsl_soc.h>
 41 #include <sysdev/fsl_pci.h>
 42 
 43 #ifdef CONFIG_CPM2
 44 #include <asm/cpm2.h>
 45 #include <sysdev/cpm2_pic.h>
 46 
 47 static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
 48 {
 49         int cascade_irq;
 50 
 51         while ((cascade_irq = cpm2_get_irq()) >= 0)
 52                 generic_handle_irq(cascade_irq);
 53 
 54         desc->chip->eoi(irq);
 55 }
 56 #endif /* CONFIG_CPM2 */
 57 
 58 static void __init stx_gp3_pic_init(void)
 59 {
 60         struct mpic *mpic;
 61         struct resource r;
 62         struct device_node *np;
 63 #ifdef CONFIG_CPM2
 64         int irq;
 65 #endif
 66 
 67         np = of_find_node_by_type(NULL, "open-pic");
 68         if (!np) {
 69                 printk(KERN_ERR "Could not find open-pic node\n");
 70                 return;
 71         }
 72 
 73         if (of_address_to_resource(np, 0, &r)) {
 74                 printk(KERN_ERR "Could not map mpic register space\n");
 75                 of_node_put(np);
 76                 return;
 77         }
 78 
 79         mpic = mpic_alloc(np, r.start,
 80                         MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
 81                         0, 256, " OpenPIC  ");
 82         BUG_ON(mpic == NULL);
 83         of_node_put(np);
 84 
 85         mpic_init(mpic);
 86 
 87 #ifdef CONFIG_CPM2
 88         /* Setup CPM2 PIC */
 89         np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
 90         if (np == NULL) {
 91                 printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
 92                 return;
 93         }
 94         irq = irq_of_parse_and_map(np, 0);
 95 
 96         if (irq == NO_IRQ) {
 97                 of_node_put(np);
 98                 printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
 99                 return;
100         }
101 
102         cpm2_pic_init(np);
103         of_node_put(np);
104         set_irq_chained_handler(irq, cpm2_cascade);
105 #endif
106 }
107 
108 /*
109  * Setup the architecture
110  */
111 static void __init stx_gp3_setup_arch(void)
112 {
113 #ifdef CONFIG_PCI
114         struct device_node *np;
115 #endif
116 
117         if (ppc_md.progress)
118                 ppc_md.progress("stx_gp3_setup_arch()", 0);
119 
120 #ifdef CONFIG_CPM2
121         cpm2_reset();
122 #endif
123 
124 #ifdef CONFIG_PCI
125         for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
126                 fsl_add_bridge(np, 1);
127 #endif
128 }
129 
130 static void stx_gp3_show_cpuinfo(struct seq_file *m)
131 {
132         uint pvid, svid, phid1;
133 
134         pvid = mfspr(SPRN_PVR);
135         svid = mfspr(SPRN_SVR);
136 
137         seq_printf(m, "Vendor\t\t: RPC Electronics STx \n");
138         seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
139         seq_printf(m, "SVR\t\t: 0x%x\n", svid);
140 
141         /* Display cpu Pll setting */
142         phid1 = mfspr(SPRN_HID1);
143         seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
144 }
145 
146 static struct of_device_id __initdata of_bus_ids[] = {
147         { .compatible = "simple-bus", },
148         { .compatible = "gianfar", },
149         {},
150 };
151 
152 static int __init declare_of_platform_devices(void)
153 {
154         of_platform_bus_probe(NULL, of_bus_ids, NULL);
155 
156         return 0;
157 }
158 machine_device_initcall(stx_gp3, declare_of_platform_devices);
159 
160 /*
161  * Called very early, device-tree isn't unflattened
162  */
163 static int __init stx_gp3_probe(void)
164 {
165         unsigned long root = of_get_flat_dt_root();
166 
167         return of_flat_dt_is_compatible(root, "stx,gp3-8560");
168 }
169 
170 define_machine(stx_gp3) {
171         .name                   = "STX GP3",
172         .probe                  = stx_gp3_probe,
173         .setup_arch             = stx_gp3_setup_arch,
174         .init_IRQ               = stx_gp3_pic_init,
175         .show_cpuinfo           = stx_gp3_show_cpuinfo,
176         .get_irq                = mpic_get_irq,
177         .restart                = fsl_rstcr_restart,
178         .calibrate_decr         = generic_calibrate_decr,
179         .progress               = udbg_progress,
180 };
181 

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