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TOMOYO Linux Cross Reference
Linux/arch/powerpc/platforms/powermac/feature.c

Version: ~ [ linux-4.14 ] ~ [ linux-4.13.12 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.61 ] ~ [ linux-4.8.17 ] ~ [ linux-4.7.10 ] ~ [ linux-4.6.7 ] ~ [ linux-4.5.7 ] ~ [ linux-4.4.97 ] ~ [ linux-4.3.6 ] ~ [ linux-4.2.8 ] ~ [ linux-4.1.46 ] ~ [ linux-4.0.9 ] ~ [ linux-3.19.8 ] ~ [ linux-3.18.80 ] ~ [ linux-3.17.8 ] ~ [ linux-3.16.50 ] ~ [ linux-3.15.10 ] ~ [ linux-3.14.79 ] ~ [ linux-3.13.11 ] ~ [ linux-3.12.74 ] ~ [ linux-3.11.10 ] ~ [ linux-3.10.108 ] ~ [ linux-3.9.11 ] ~ [ linux-3.8.13 ] ~ [ linux-3.7.10 ] ~ [ linux-3.6.11 ] ~ [ linux-3.5.7 ] ~ [ linux-3.4.113 ] ~ [ linux-3.3.8 ] ~ [ linux-3.2.95 ] ~ [ linux-3.1.10 ] ~ [ linux-3.0.101 ] ~ [ linux-2.6.39.4 ] ~ [ linux-2.6.38.8 ] ~ [ linux-2.6.37.6 ] ~ [ linux-2.6.36.4 ] ~ [ linux-2.6.35.14 ] ~ [ linux-2.6.34.15 ] ~ [ linux-2.6.33.20 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.27.62 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.5 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 /*
  2  *  Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au)
  3  *                          Ben. Herrenschmidt (benh@kernel.crashing.org)
  4  *
  5  *  This program is free software; you can redistribute it and/or
  6  *  modify it under the terms of the GNU General Public License
  7  *  as published by the Free Software Foundation; either version
  8  *  2 of the License, or (at your option) any later version.
  9  *
 10  *  TODO:
 11  *
 12  *   - Replace mdelay with some schedule loop if possible
 13  *   - Shorten some obfuscated delays on some routines (like modem
 14  *     power)
 15  *   - Refcount some clocks (see darwin)
 16  *   - Split split split...
 17  *
 18  */
 19 #include <linux/types.h>
 20 #include <linux/init.h>
 21 #include <linux/delay.h>
 22 #include <linux/kernel.h>
 23 #include <linux/sched.h>
 24 #include <linux/of.h>
 25 #include <linux/of_address.h>
 26 #include <linux/spinlock.h>
 27 #include <linux/adb.h>
 28 #include <linux/pmu.h>
 29 #include <linux/ioport.h>
 30 #include <linux/export.h>
 31 #include <linux/pci.h>
 32 #include <asm/sections.h>
 33 #include <asm/errno.h>
 34 #include <asm/ohare.h>
 35 #include <asm/heathrow.h>
 36 #include <asm/keylargo.h>
 37 #include <asm/uninorth.h>
 38 #include <asm/io.h>
 39 #include <asm/prom.h>
 40 #include <asm/machdep.h>
 41 #include <asm/pmac_feature.h>
 42 #include <asm/dbdma.h>
 43 #include <asm/pci-bridge.h>
 44 #include <asm/pmac_low_i2c.h>
 45 
 46 #undef DEBUG_FEATURE
 47 
 48 #ifdef DEBUG_FEATURE
 49 #define DBG(fmt...) printk(KERN_DEBUG fmt)
 50 #else
 51 #define DBG(fmt...)
 52 #endif
 53 
 54 #ifdef CONFIG_6xx
 55 extern int powersave_lowspeed;
 56 #endif
 57 
 58 extern int powersave_nap;
 59 extern struct device_node *k2_skiplist[2];
 60 
 61 /*
 62  * We use a single global lock to protect accesses. Each driver has
 63  * to take care of its own locking
 64  */
 65 DEFINE_RAW_SPINLOCK(feature_lock);
 66 
 67 #define LOCK(flags)     raw_spin_lock_irqsave(&feature_lock, flags);
 68 #define UNLOCK(flags)   raw_spin_unlock_irqrestore(&feature_lock, flags);
 69 
 70 
 71 /*
 72  * Instance of some macio stuffs
 73  */
 74 struct macio_chip macio_chips[MAX_MACIO_CHIPS];
 75 
 76 struct macio_chip *macio_find(struct device_node *child, int type)
 77 {
 78         while(child) {
 79                 int     i;
 80 
 81                 for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++)
 82                         if (child == macio_chips[i].of_node &&
 83                             (!type || macio_chips[i].type == type))
 84                                 return &macio_chips[i];
 85                 child = child->parent;
 86         }
 87         return NULL;
 88 }
 89 EXPORT_SYMBOL_GPL(macio_find);
 90 
 91 static const char *macio_names[] =
 92 {
 93         "Unknown",
 94         "Grand Central",
 95         "OHare",
 96         "OHareII",
 97         "Heathrow",
 98         "Gatwick",
 99         "Paddington",
100         "Keylargo",
101         "Pangea",
102         "Intrepid",
103         "K2",
104         "Shasta",
105 };
106 
107 
108 struct device_node *uninorth_node;
109 u32 __iomem *uninorth_base;
110 
111 static u32 uninorth_rev;
112 static int uninorth_maj;
113 static void __iomem *u3_ht_base;
114 
115 /*
116  * For each motherboard family, we have a table of functions pointers
117  * that handle the various features.
118  */
119 
120 typedef long (*feature_call)(struct device_node *node, long param, long value);
121 
122 struct feature_table_entry {
123         unsigned int    selector;
124         feature_call    function;
125 };
126 
127 struct pmac_mb_def
128 {
129         const char*                     model_string;
130         const char*                     model_name;
131         int                             model_id;
132         struct feature_table_entry*     features;
133         unsigned long                   board_flags;
134 };
135 static struct pmac_mb_def pmac_mb;
136 
137 /*
138  * Here are the chip specific feature functions
139  */
140 
141 static inline int simple_feature_tweak(struct device_node *node, int type,
142                                        int reg, u32 mask, int value)
143 {
144         struct macio_chip*      macio;
145         unsigned long           flags;
146 
147         macio = macio_find(node, type);
148         if (!macio)
149                 return -ENODEV;
150         LOCK(flags);
151         if (value)
152                 MACIO_BIS(reg, mask);
153         else
154                 MACIO_BIC(reg, mask);
155         (void)MACIO_IN32(reg);
156         UNLOCK(flags);
157 
158         return 0;
159 }
160 
161 #ifndef CONFIG_PPC64
162 
163 static long ohare_htw_scc_enable(struct device_node *node, long param,
164                                  long value)
165 {
166         struct macio_chip*      macio;
167         unsigned long           chan_mask;
168         unsigned long           fcr;
169         unsigned long           flags;
170         int                     htw, trans;
171         unsigned long           rmask;
172 
173         macio = macio_find(node, 0);
174         if (!macio)
175                 return -ENODEV;
176         if (!strcmp(node->name, "ch-a"))
177                 chan_mask = MACIO_FLAG_SCCA_ON;
178         else if (!strcmp(node->name, "ch-b"))
179                 chan_mask = MACIO_FLAG_SCCB_ON;
180         else
181                 return -ENODEV;
182 
183         htw = (macio->type == macio_heathrow || macio->type == macio_paddington
184                 || macio->type == macio_gatwick);
185         /* On these machines, the HRW_SCC_TRANS_EN_N bit mustn't be touched */
186         trans = (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
187                  pmac_mb.model_id != PMAC_TYPE_YIKES);
188         if (value) {
189 #ifdef CONFIG_ADB_PMU
190                 if ((param & 0xfff) == PMAC_SCC_IRDA)
191                         pmu_enable_irled(1);
192 #endif /* CONFIG_ADB_PMU */
193                 LOCK(flags);
194                 fcr = MACIO_IN32(OHARE_FCR);
195                 /* Check if scc cell need enabling */
196                 if (!(fcr & OH_SCC_ENABLE)) {
197                         fcr |= OH_SCC_ENABLE;
198                         if (htw) {
199                                 /* Side effect: this will also power up the
200                                  * modem, but it's too messy to figure out on which
201                                  * ports this controls the transceiver and on which
202                                  * it controls the modem
203                                  */
204                                 if (trans)
205                                         fcr &= ~HRW_SCC_TRANS_EN_N;
206                                 MACIO_OUT32(OHARE_FCR, fcr);
207                                 fcr |= (rmask = HRW_RESET_SCC);
208                                 MACIO_OUT32(OHARE_FCR, fcr);
209                         } else {
210                                 fcr |= (rmask = OH_SCC_RESET);
211                                 MACIO_OUT32(OHARE_FCR, fcr);
212                         }
213                         UNLOCK(flags);
214                         (void)MACIO_IN32(OHARE_FCR);
215                         mdelay(15);
216                         LOCK(flags);
217                         fcr &= ~rmask;
218                         MACIO_OUT32(OHARE_FCR, fcr);
219                 }
220                 if (chan_mask & MACIO_FLAG_SCCA_ON)
221                         fcr |= OH_SCCA_IO;
222                 if (chan_mask & MACIO_FLAG_SCCB_ON)
223                         fcr |= OH_SCCB_IO;
224                 MACIO_OUT32(OHARE_FCR, fcr);
225                 macio->flags |= chan_mask;
226                 UNLOCK(flags);
227                 if (param & PMAC_SCC_FLAG_XMON)
228                         macio->flags |= MACIO_FLAG_SCC_LOCKED;
229         } else {
230                 if (macio->flags & MACIO_FLAG_SCC_LOCKED)
231                         return -EPERM;
232                 LOCK(flags);
233                 fcr = MACIO_IN32(OHARE_FCR);
234                 if (chan_mask & MACIO_FLAG_SCCA_ON)
235                         fcr &= ~OH_SCCA_IO;
236                 if (chan_mask & MACIO_FLAG_SCCB_ON)
237                         fcr &= ~OH_SCCB_IO;
238                 MACIO_OUT32(OHARE_FCR, fcr);
239                 if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) {
240                         fcr &= ~OH_SCC_ENABLE;
241                         if (htw && trans)
242                                 fcr |= HRW_SCC_TRANS_EN_N;
243                         MACIO_OUT32(OHARE_FCR, fcr);
244                 }
245                 macio->flags &= ~(chan_mask);
246                 UNLOCK(flags);
247                 mdelay(10);
248 #ifdef CONFIG_ADB_PMU
249                 if ((param & 0xfff) == PMAC_SCC_IRDA)
250                         pmu_enable_irled(0);
251 #endif /* CONFIG_ADB_PMU */
252         }
253         return 0;
254 }
255 
256 static long ohare_floppy_enable(struct device_node *node, long param,
257                                 long value)
258 {
259         return simple_feature_tweak(node, macio_ohare,
260                 OHARE_FCR, OH_FLOPPY_ENABLE, value);
261 }
262 
263 static long ohare_mesh_enable(struct device_node *node, long param, long value)
264 {
265         return simple_feature_tweak(node, macio_ohare,
266                 OHARE_FCR, OH_MESH_ENABLE, value);
267 }
268 
269 static long ohare_ide_enable(struct device_node *node, long param, long value)
270 {
271         switch(param) {
272         case 0:
273                 /* For some reason, setting the bit in set_initial_features()
274                  * doesn't stick. I'm still investigating... --BenH.
275                  */
276                 if (value)
277                         simple_feature_tweak(node, macio_ohare,
278                                 OHARE_FCR, OH_IOBUS_ENABLE, 1);
279                 return simple_feature_tweak(node, macio_ohare,
280                         OHARE_FCR, OH_IDE0_ENABLE, value);
281         case 1:
282                 return simple_feature_tweak(node, macio_ohare,
283                         OHARE_FCR, OH_BAY_IDE_ENABLE, value);
284         default:
285                 return -ENODEV;
286         }
287 }
288 
289 static long ohare_ide_reset(struct device_node *node, long param, long value)
290 {
291         switch(param) {
292         case 0:
293                 return simple_feature_tweak(node, macio_ohare,
294                         OHARE_FCR, OH_IDE0_RESET_N, !value);
295         case 1:
296                 return simple_feature_tweak(node, macio_ohare,
297                         OHARE_FCR, OH_IDE1_RESET_N, !value);
298         default:
299                 return -ENODEV;
300         }
301 }
302 
303 static long ohare_sleep_state(struct device_node *node, long param, long value)
304 {
305         struct macio_chip*      macio = &macio_chips[0];
306 
307         if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
308                 return -EPERM;
309         if (value == 1) {
310                 MACIO_BIC(OHARE_FCR, OH_IOBUS_ENABLE);
311         } else if (value == 0) {
312                 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
313         }
314 
315         return 0;
316 }
317 
318 static long heathrow_modem_enable(struct device_node *node, long param,
319                                   long value)
320 {
321         struct macio_chip*      macio;
322         u8                      gpio;
323         unsigned long           flags;
324 
325         macio = macio_find(node, macio_unknown);
326         if (!macio)
327                 return -ENODEV;
328         gpio = MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1;
329         if (!value) {
330                 LOCK(flags);
331                 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
332                 UNLOCK(flags);
333                 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
334                 mdelay(250);
335         }
336         if (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
337             pmac_mb.model_id != PMAC_TYPE_YIKES) {
338                 LOCK(flags);
339                 if (value)
340                         MACIO_BIC(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
341                 else
342                         MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
343                 UNLOCK(flags);
344                 (void)MACIO_IN32(HEATHROW_FCR);
345                 mdelay(250);
346         }
347         if (value) {
348                 LOCK(flags);
349                 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
350                 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
351                 UNLOCK(flags); mdelay(250); LOCK(flags);
352                 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
353                 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
354                 UNLOCK(flags); mdelay(250); LOCK(flags);
355                 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
356                 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
357                 UNLOCK(flags); mdelay(250);
358         }
359         return 0;
360 }
361 
362 static long heathrow_floppy_enable(struct device_node *node, long param,
363                                    long value)
364 {
365         return simple_feature_tweak(node, macio_unknown,
366                 HEATHROW_FCR,
367                 HRW_SWIM_ENABLE|HRW_BAY_FLOPPY_ENABLE,
368                 value);
369 }
370 
371 static long heathrow_mesh_enable(struct device_node *node, long param,
372                                  long value)
373 {
374         struct macio_chip*      macio;
375         unsigned long           flags;
376 
377         macio = macio_find(node, macio_unknown);
378         if (!macio)
379                 return -ENODEV;
380         LOCK(flags);
381         /* Set clear mesh cell enable */
382         if (value)
383                 MACIO_BIS(HEATHROW_FCR, HRW_MESH_ENABLE);
384         else
385                 MACIO_BIC(HEATHROW_FCR, HRW_MESH_ENABLE);
386         (void)MACIO_IN32(HEATHROW_FCR);
387         udelay(10);
388         /* Set/Clear termination power */
389         if (value)
390                 MACIO_BIC(HEATHROW_MBCR, 0x04000000);
391         else
392                 MACIO_BIS(HEATHROW_MBCR, 0x04000000);
393         (void)MACIO_IN32(HEATHROW_MBCR);
394         udelay(10);
395         UNLOCK(flags);
396 
397         return 0;
398 }
399 
400 static long heathrow_ide_enable(struct device_node *node, long param,
401                                 long value)
402 {
403         switch(param) {
404         case 0:
405                 return simple_feature_tweak(node, macio_unknown,
406                         HEATHROW_FCR, HRW_IDE0_ENABLE, value);
407         case 1:
408                 return simple_feature_tweak(node, macio_unknown,
409                         HEATHROW_FCR, HRW_BAY_IDE_ENABLE, value);
410         default:
411                 return -ENODEV;
412         }
413 }
414 
415 static long heathrow_ide_reset(struct device_node *node, long param,
416                                long value)
417 {
418         switch(param) {
419         case 0:
420                 return simple_feature_tweak(node, macio_unknown,
421                         HEATHROW_FCR, HRW_IDE0_RESET_N, !value);
422         case 1:
423                 return simple_feature_tweak(node, macio_unknown,
424                         HEATHROW_FCR, HRW_IDE1_RESET_N, !value);
425         default:
426                 return -ENODEV;
427         }
428 }
429 
430 static long heathrow_bmac_enable(struct device_node *node, long param,
431                                  long value)
432 {
433         struct macio_chip*      macio;
434         unsigned long           flags;
435 
436         macio = macio_find(node, 0);
437         if (!macio)
438                 return -ENODEV;
439         if (value) {
440                 LOCK(flags);
441                 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
442                 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_RESET);
443                 UNLOCK(flags);
444                 (void)MACIO_IN32(HEATHROW_FCR);
445                 mdelay(10);
446                 LOCK(flags);
447                 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_RESET);
448                 UNLOCK(flags);
449                 (void)MACIO_IN32(HEATHROW_FCR);
450                 mdelay(10);
451         } else {
452                 LOCK(flags);
453                 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
454                 UNLOCK(flags);
455         }
456         return 0;
457 }
458 
459 static long heathrow_sound_enable(struct device_node *node, long param,
460                                   long value)
461 {
462         struct macio_chip*      macio;
463         unsigned long           flags;
464 
465         /* B&W G3 and Yikes don't support that properly (the
466          * sound appear to never come back after being shut down).
467          */
468         if (pmac_mb.model_id == PMAC_TYPE_YOSEMITE ||
469             pmac_mb.model_id == PMAC_TYPE_YIKES)
470                 return 0;
471 
472         macio = macio_find(node, 0);
473         if (!macio)
474                 return -ENODEV;
475         if (value) {
476                 LOCK(flags);
477                 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
478                 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
479                 UNLOCK(flags);
480                 (void)MACIO_IN32(HEATHROW_FCR);
481         } else {
482                 LOCK(flags);
483                 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
484                 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
485                 UNLOCK(flags);
486         }
487         return 0;
488 }
489 
490 static u32 save_fcr[6];
491 static u32 save_mbcr;
492 static struct dbdma_regs save_dbdma[13];
493 static struct dbdma_regs save_alt_dbdma[13];
494 
495 static void dbdma_save(struct macio_chip *macio, struct dbdma_regs *save)
496 {
497         int i;
498 
499         /* Save state & config of DBDMA channels */
500         for (i = 0; i < 13; i++) {
501                 volatile struct dbdma_regs __iomem * chan = (void __iomem *)
502                         (macio->base + ((0x8000+i*0x100)>>2));
503                 save[i].cmdptr_hi = in_le32(&chan->cmdptr_hi);
504                 save[i].cmdptr = in_le32(&chan->cmdptr);
505                 save[i].intr_sel = in_le32(&chan->intr_sel);
506                 save[i].br_sel = in_le32(&chan->br_sel);
507                 save[i].wait_sel = in_le32(&chan->wait_sel);
508         }
509 }
510 
511 static void dbdma_restore(struct macio_chip *macio, struct dbdma_regs *save)
512 {
513         int i;
514 
515         /* Save state & config of DBDMA channels */
516         for (i = 0; i < 13; i++) {
517                 volatile struct dbdma_regs __iomem * chan = (void __iomem *)
518                         (macio->base + ((0x8000+i*0x100)>>2));
519                 out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);
520                 while (in_le32(&chan->status) & ACTIVE)
521                         mb();
522                 out_le32(&chan->cmdptr_hi, save[i].cmdptr_hi);
523                 out_le32(&chan->cmdptr, save[i].cmdptr);
524                 out_le32(&chan->intr_sel, save[i].intr_sel);
525                 out_le32(&chan->br_sel, save[i].br_sel);
526                 out_le32(&chan->wait_sel, save[i].wait_sel);
527         }
528 }
529 
530 static void heathrow_sleep(struct macio_chip *macio, int secondary)
531 {
532         if (secondary) {
533                 dbdma_save(macio, save_alt_dbdma);
534                 save_fcr[2] = MACIO_IN32(0x38);
535                 save_fcr[3] = MACIO_IN32(0x3c);
536         } else {
537                 dbdma_save(macio, save_dbdma);
538                 save_fcr[0] = MACIO_IN32(0x38);
539                 save_fcr[1] = MACIO_IN32(0x3c);
540                 save_mbcr = MACIO_IN32(0x34);
541                 /* Make sure sound is shut down */
542                 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
543                 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
544                 /* This seems to be necessary as well or the fan
545                  * keeps coming up and battery drains fast */
546                 MACIO_BIC(HEATHROW_FCR, HRW_IOBUS_ENABLE);
547                 MACIO_BIC(HEATHROW_FCR, HRW_IDE0_RESET_N);
548                 /* Make sure eth is down even if module or sleep
549                  * won't work properly */
550                 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE | HRW_BMAC_RESET);
551         }
552         /* Make sure modem is shut down */
553         MACIO_OUT8(HRW_GPIO_MODEM_RESET,
554                 MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1);
555         MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
556         MACIO_BIC(HEATHROW_FCR, OH_SCCA_IO|OH_SCCB_IO|HRW_SCC_ENABLE);
557 
558         /* Let things settle */
559         (void)MACIO_IN32(HEATHROW_FCR);
560 }
561 
562 static void heathrow_wakeup(struct macio_chip *macio, int secondary)
563 {
564         if (secondary) {
565                 MACIO_OUT32(0x38, save_fcr[2]);
566                 (void)MACIO_IN32(0x38);
567                 mdelay(1);
568                 MACIO_OUT32(0x3c, save_fcr[3]);
569                 (void)MACIO_IN32(0x38);
570                 mdelay(10);
571                 dbdma_restore(macio, save_alt_dbdma);
572         } else {
573                 MACIO_OUT32(0x38, save_fcr[0] | HRW_IOBUS_ENABLE);
574                 (void)MACIO_IN32(0x38);
575                 mdelay(1);
576                 MACIO_OUT32(0x3c, save_fcr[1]);
577                 (void)MACIO_IN32(0x38);
578                 mdelay(1);
579                 MACIO_OUT32(0x34, save_mbcr);
580                 (void)MACIO_IN32(0x38);
581                 mdelay(10);
582                 dbdma_restore(macio, save_dbdma);
583         }
584 }
585 
586 static long heathrow_sleep_state(struct device_node *node, long param,
587                                  long value)
588 {
589         if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
590                 return -EPERM;
591         if (value == 1) {
592                 if (macio_chips[1].type == macio_gatwick)
593                         heathrow_sleep(&macio_chips[0], 1);
594                 heathrow_sleep(&macio_chips[0], 0);
595         } else if (value == 0) {
596                 heathrow_wakeup(&macio_chips[0], 0);
597                 if (macio_chips[1].type == macio_gatwick)
598                         heathrow_wakeup(&macio_chips[0], 1);
599         }
600         return 0;
601 }
602 
603 static long core99_scc_enable(struct device_node *node, long param, long value)
604 {
605         struct macio_chip*      macio;
606         unsigned long           flags;
607         unsigned long           chan_mask;
608         u32                     fcr;
609 
610         macio = macio_find(node, 0);
611         if (!macio)
612                 return -ENODEV;
613         if (!strcmp(node->name, "ch-a"))
614                 chan_mask = MACIO_FLAG_SCCA_ON;
615         else if (!strcmp(node->name, "ch-b"))
616                 chan_mask = MACIO_FLAG_SCCB_ON;
617         else
618                 return -ENODEV;
619 
620         if (value) {
621                 int need_reset_scc = 0;
622                 int need_reset_irda = 0;
623 
624                 LOCK(flags);
625                 fcr = MACIO_IN32(KEYLARGO_FCR0);
626                 /* Check if scc cell need enabling */
627                 if (!(fcr & KL0_SCC_CELL_ENABLE)) {
628                         fcr |= KL0_SCC_CELL_ENABLE;
629                         need_reset_scc = 1;
630                 }
631                 if (chan_mask & MACIO_FLAG_SCCA_ON) {
632                         fcr |= KL0_SCCA_ENABLE;
633                         /* Don't enable line drivers for I2S modem */
634                         if ((param & 0xfff) == PMAC_SCC_I2S1)
635                                 fcr &= ~KL0_SCC_A_INTF_ENABLE;
636                         else
637                                 fcr |= KL0_SCC_A_INTF_ENABLE;
638                 }
639                 if (chan_mask & MACIO_FLAG_SCCB_ON) {
640                         fcr |= KL0_SCCB_ENABLE;
641                         /* Perform irda specific inits */
642                         if ((param & 0xfff) == PMAC_SCC_IRDA) {
643                                 fcr &= ~KL0_SCC_B_INTF_ENABLE;
644                                 fcr |= KL0_IRDA_ENABLE;
645                                 fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE;
646                                 fcr |= KL0_IRDA_SOURCE1_SEL;
647                                 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
648                                 fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
649                                 need_reset_irda = 1;
650                         } else
651                                 fcr |= KL0_SCC_B_INTF_ENABLE;
652                 }
653                 MACIO_OUT32(KEYLARGO_FCR0, fcr);
654                 macio->flags |= chan_mask;
655                 if (need_reset_scc)  {
656                         MACIO_BIS(KEYLARGO_FCR0, KL0_SCC_RESET);
657                         (void)MACIO_IN32(KEYLARGO_FCR0);
658                         UNLOCK(flags);
659                         mdelay(15);
660                         LOCK(flags);
661                         MACIO_BIC(KEYLARGO_FCR0, KL0_SCC_RESET);
662                 }
663                 if (need_reset_irda)  {
664                         MACIO_BIS(KEYLARGO_FCR0, KL0_IRDA_RESET);
665                         (void)MACIO_IN32(KEYLARGO_FCR0);
666                         UNLOCK(flags);
667                         mdelay(15);
668                         LOCK(flags);
669                         MACIO_BIC(KEYLARGO_FCR0, KL0_IRDA_RESET);
670                 }
671                 UNLOCK(flags);
672                 if (param & PMAC_SCC_FLAG_XMON)
673                         macio->flags |= MACIO_FLAG_SCC_LOCKED;
674         } else {
675                 if (macio->flags & MACIO_FLAG_SCC_LOCKED)
676                         return -EPERM;
677                 LOCK(flags);
678                 fcr = MACIO_IN32(KEYLARGO_FCR0);
679                 if (chan_mask & MACIO_FLAG_SCCA_ON)
680                         fcr &= ~KL0_SCCA_ENABLE;
681                 if (chan_mask & MACIO_FLAG_SCCB_ON) {
682                         fcr &= ~KL0_SCCB_ENABLE;
683                         /* Perform irda specific clears */
684                         if ((param & 0xfff) == PMAC_SCC_IRDA) {
685                                 fcr &= ~KL0_IRDA_ENABLE;
686                                 fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE);
687                                 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
688                                 fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
689                         }
690                 }
691                 MACIO_OUT32(KEYLARGO_FCR0, fcr);
692                 if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) {
693                         fcr &= ~KL0_SCC_CELL_ENABLE;
694                         MACIO_OUT32(KEYLARGO_FCR0, fcr);
695                 }
696                 macio->flags &= ~(chan_mask);
697                 UNLOCK(flags);
698                 mdelay(10);
699         }
700         return 0;
701 }
702 
703 static long
704 core99_modem_enable(struct device_node *node, long param, long value)
705 {
706         struct macio_chip*      macio;
707         u8                      gpio;
708         unsigned long           flags;
709 
710         /* Hack for internal USB modem */
711         if (node == NULL) {
712                 if (macio_chips[0].type != macio_keylargo)
713                         return -ENODEV;
714                 node = macio_chips[0].of_node;
715         }
716         macio = macio_find(node, 0);
717         if (!macio)
718                 return -ENODEV;
719         gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
720         gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
721         gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
722 
723         if (!value) {
724                 LOCK(flags);
725                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
726                 UNLOCK(flags);
727                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
728                 mdelay(250);
729         }
730         LOCK(flags);
731         if (value) {
732                 MACIO_BIC(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
733                 UNLOCK(flags);
734                 (void)MACIO_IN32(KEYLARGO_FCR2);
735                 mdelay(250);
736         } else {
737                 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
738                 UNLOCK(flags);
739         }
740         if (value) {
741                 LOCK(flags);
742                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
743                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
744                 UNLOCK(flags); mdelay(250); LOCK(flags);
745                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
746                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
747                 UNLOCK(flags); mdelay(250); LOCK(flags);
748                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
749                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
750                 UNLOCK(flags); mdelay(250);
751         }
752         return 0;
753 }
754 
755 static long
756 pangea_modem_enable(struct device_node *node, long param, long value)
757 {
758         struct macio_chip*      macio;
759         u8                      gpio;
760         unsigned long           flags;
761 
762         /* Hack for internal USB modem */
763         if (node == NULL) {
764                 if (macio_chips[0].type != macio_pangea &&
765                     macio_chips[0].type != macio_intrepid)
766                         return -ENODEV;
767                 node = macio_chips[0].of_node;
768         }
769         macio = macio_find(node, 0);
770         if (!macio)
771                 return -ENODEV;
772         gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
773         gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
774         gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
775 
776         if (!value) {
777                 LOCK(flags);
778                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
779                 UNLOCK(flags);
780                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
781                 mdelay(250);
782         }
783         LOCK(flags);
784         if (value) {
785                 MACIO_OUT8(KL_GPIO_MODEM_POWER,
786                         KEYLARGO_GPIO_OUTPUT_ENABLE);
787                 UNLOCK(flags);
788                 (void)MACIO_IN32(KEYLARGO_FCR2);
789                 mdelay(250);
790         } else {
791                 MACIO_OUT8(KL_GPIO_MODEM_POWER,
792                         KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
793                 UNLOCK(flags);
794         }
795         if (value) {
796                 LOCK(flags);
797                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
798                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
799                 UNLOCK(flags); mdelay(250); LOCK(flags);
800                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
801                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
802                 UNLOCK(flags); mdelay(250); LOCK(flags);
803                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
804                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
805                 UNLOCK(flags); mdelay(250);
806         }
807         return 0;
808 }
809 
810 static long
811 core99_ata100_enable(struct device_node *node, long value)
812 {
813         unsigned long flags;
814         struct pci_dev *pdev = NULL;
815         u8 pbus, pid;
816         int rc;
817 
818         if (uninorth_rev < 0x24)
819                 return -ENODEV;
820 
821         LOCK(flags);
822         if (value)
823                 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
824         else
825                 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
826         (void)UN_IN(UNI_N_CLOCK_CNTL);
827         UNLOCK(flags);
828         udelay(20);
829 
830         if (value) {
831                 if (pci_device_from_OF_node(node, &pbus, &pid) == 0)
832                         pdev = pci_get_bus_and_slot(pbus, pid);
833                 if (pdev == NULL)
834                         return 0;
835                 rc = pci_enable_device(pdev);
836                 if (rc == 0)
837                         pci_set_master(pdev);
838                 pci_dev_put(pdev);
839                 if (rc)
840                         return rc;
841         }
842         return 0;
843 }
844 
845 static long
846 core99_ide_enable(struct device_node *node, long param, long value)
847 {
848         /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2
849          * based ata-100
850          */
851         switch(param) {
852             case 0:
853                 return simple_feature_tweak(node, macio_unknown,
854                         KEYLARGO_FCR1, KL1_EIDE0_ENABLE, value);
855             case 1:
856                 return simple_feature_tweak(node, macio_unknown,
857                         KEYLARGO_FCR1, KL1_EIDE1_ENABLE, value);
858             case 2:
859                 return simple_feature_tweak(node, macio_unknown,
860                         KEYLARGO_FCR1, KL1_UIDE_ENABLE, value);
861             case 3:
862                 return core99_ata100_enable(node, value);
863             default:
864                 return -ENODEV;
865         }
866 }
867 
868 static long
869 core99_ide_reset(struct device_node *node, long param, long value)
870 {
871         switch(param) {
872             case 0:
873                 return simple_feature_tweak(node, macio_unknown,
874                         KEYLARGO_FCR1, KL1_EIDE0_RESET_N, !value);
875             case 1:
876                 return simple_feature_tweak(node, macio_unknown,
877                         KEYLARGO_FCR1, KL1_EIDE1_RESET_N, !value);
878             case 2:
879                 return simple_feature_tweak(node, macio_unknown,
880                         KEYLARGO_FCR1, KL1_UIDE_RESET_N, !value);
881             default:
882                 return -ENODEV;
883         }
884 }
885 
886 static long
887 core99_gmac_enable(struct device_node *node, long param, long value)
888 {
889         unsigned long flags;
890 
891         LOCK(flags);
892         if (value)
893                 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
894         else
895                 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
896         (void)UN_IN(UNI_N_CLOCK_CNTL);
897         UNLOCK(flags);
898         udelay(20);
899 
900         return 0;
901 }
902 
903 static long
904 core99_gmac_phy_reset(struct device_node *node, long param, long value)
905 {
906         unsigned long flags;
907         struct macio_chip *macio;
908 
909         macio = &macio_chips[0];
910         if (macio->type != macio_keylargo && macio->type != macio_pangea &&
911             macio->type != macio_intrepid)
912                 return -ENODEV;
913 
914         LOCK(flags);
915         MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE);
916         (void)MACIO_IN8(KL_GPIO_ETH_PHY_RESET);
917         UNLOCK(flags);
918         mdelay(10);
919         LOCK(flags);
920         MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, /*KEYLARGO_GPIO_OUTPUT_ENABLE | */
921                 KEYLARGO_GPIO_OUTOUT_DATA);
922         UNLOCK(flags);
923         mdelay(10);
924 
925         return 0;
926 }
927 
928 static long
929 core99_sound_chip_enable(struct device_node *node, long param, long value)
930 {
931         struct macio_chip*      macio;
932         unsigned long           flags;
933 
934         macio = macio_find(node, 0);
935         if (!macio)
936                 return -ENODEV;
937 
938         /* Do a better probe code, screamer G4 desktops &
939          * iMacs can do that too, add a recalibrate  in
940          * the driver as well
941          */
942         if (pmac_mb.model_id == PMAC_TYPE_PISMO ||
943             pmac_mb.model_id == PMAC_TYPE_TITANIUM) {
944                 LOCK(flags);
945                 if (value)
946                         MACIO_OUT8(KL_GPIO_SOUND_POWER,
947                                 KEYLARGO_GPIO_OUTPUT_ENABLE |
948                                 KEYLARGO_GPIO_OUTOUT_DATA);
949                 else
950                         MACIO_OUT8(KL_GPIO_SOUND_POWER,
951                                 KEYLARGO_GPIO_OUTPUT_ENABLE);
952                 (void)MACIO_IN8(KL_GPIO_SOUND_POWER);
953                 UNLOCK(flags);
954         }
955         return 0;
956 }
957 
958 static long
959 core99_airport_enable(struct device_node *node, long param, long value)
960 {
961         struct macio_chip*      macio;
962         unsigned long           flags;
963         int                     state;
964 
965         macio = macio_find(node, 0);
966         if (!macio)
967                 return -ENODEV;
968 
969         /* Hint: we allow passing of macio itself for the sake of the
970          * sleep code
971          */
972         if (node != macio->of_node &&
973             (!node->parent || node->parent != macio->of_node))
974                 return -ENODEV;
975         state = (macio->flags & MACIO_FLAG_AIRPORT_ON) != 0;
976         if (value == state)
977                 return 0;
978         if (value) {
979                 /* This code is a reproduction of OF enable-cardslot
980                  * and init-wireless methods, slightly hacked until
981                  * I got it working.
982                  */
983                 LOCK(flags);
984                 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 5);
985                 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
986                 UNLOCK(flags);
987                 mdelay(10);
988                 LOCK(flags);
989                 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 4);
990                 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
991                 UNLOCK(flags);
992 
993                 mdelay(10);
994 
995                 LOCK(flags);
996                 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
997                 (void)MACIO_IN32(KEYLARGO_FCR2);
998                 udelay(10);
999                 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xb, 0);
1000                 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xb);
1001                 udelay(10);
1002                 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xa, 0x28);
1003                 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xa);
1004                 udelay(10);
1005                 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xd, 0x28);
1006                 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xd);
1007                 udelay(10);
1008                 MACIO_OUT8(KEYLARGO_GPIO_0+0xd, 0x28);
1009                 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xd);
1010                 udelay(10);
1011                 MACIO_OUT8(KEYLARGO_GPIO_0+0xe, 0x28);
1012                 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xe);
1013                 UNLOCK(flags);
1014                 udelay(10);
1015                 MACIO_OUT32(0x1c000, 0);
1016                 mdelay(1);
1017                 MACIO_OUT8(0x1a3e0, 0x41);
1018                 (void)MACIO_IN8(0x1a3e0);
1019                 udelay(10);
1020                 LOCK(flags);
1021                 MACIO_BIS(KEYLARGO_FCR2, KL2_CARDSEL_16);
1022                 (void)MACIO_IN32(KEYLARGO_FCR2);
1023                 UNLOCK(flags);
1024                 mdelay(100);
1025 
1026                 macio->flags |= MACIO_FLAG_AIRPORT_ON;
1027         } else {
1028                 LOCK(flags);
1029                 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
1030                 (void)MACIO_IN32(KEYLARGO_FCR2);
1031                 MACIO_OUT8(KL_GPIO_AIRPORT_0, 0);
1032                 MACIO_OUT8(KL_GPIO_AIRPORT_1, 0);
1033                 MACIO_OUT8(KL_GPIO_AIRPORT_2, 0);
1034                 MACIO_OUT8(KL_GPIO_AIRPORT_3, 0);
1035                 MACIO_OUT8(KL_GPIO_AIRPORT_4, 0);
1036                 (void)MACIO_IN8(KL_GPIO_AIRPORT_4);
1037                 UNLOCK(flags);
1038 
1039                 macio->flags &= ~MACIO_FLAG_AIRPORT_ON;
1040         }
1041         return 0;
1042 }
1043 
1044 #ifdef CONFIG_SMP
1045 static long
1046 core99_reset_cpu(struct device_node *node, long param, long value)
1047 {
1048         unsigned int reset_io = 0;
1049         unsigned long flags;
1050         struct macio_chip *macio;
1051         struct device_node *np;
1052         struct device_node *cpus;
1053         const int dflt_reset_lines[] = {        KL_GPIO_RESET_CPU0,
1054                                                 KL_GPIO_RESET_CPU1,
1055                                                 KL_GPIO_RESET_CPU2,
1056                                                 KL_GPIO_RESET_CPU3 };
1057 
1058         macio = &macio_chips[0];
1059         if (macio->type != macio_keylargo)
1060                 return -ENODEV;
1061 
1062         cpus = of_find_node_by_path("/cpus");
1063         if (cpus == NULL)
1064                 return -ENODEV;
1065         for (np = cpus->child; np != NULL; np = np->sibling) {
1066                 const u32 *num = of_get_property(np, "reg", NULL);
1067                 const u32 *rst = of_get_property(np, "soft-reset", NULL);
1068                 if (num == NULL || rst == NULL)
1069                         continue;
1070                 if (param == *num) {
1071                         reset_io = *rst;
1072                         break;
1073                 }
1074         }
1075         of_node_put(cpus);
1076         if (np == NULL || reset_io == 0)
1077                 reset_io = dflt_reset_lines[param];
1078 
1079         LOCK(flags);
1080         MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
1081         (void)MACIO_IN8(reset_io);
1082         udelay(1);
1083         MACIO_OUT8(reset_io, 0);
1084         (void)MACIO_IN8(reset_io);
1085         UNLOCK(flags);
1086 
1087         return 0;
1088 }
1089 #endif /* CONFIG_SMP */
1090 
1091 static long
1092 core99_usb_enable(struct device_node *node, long param, long value)
1093 {
1094         struct macio_chip *macio;
1095         unsigned long flags;
1096         const char *prop;
1097         int number;
1098         u32 reg;
1099 
1100         macio = &macio_chips[0];
1101         if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1102             macio->type != macio_intrepid)
1103                 return -ENODEV;
1104 
1105         prop = of_get_property(node, "AAPL,clock-id", NULL);
1106         if (!prop)
1107                 return -ENODEV;
1108         if (strncmp(prop, "usb0u048", 8) == 0)
1109                 number = 0;
1110         else if (strncmp(prop, "usb1u148", 8) == 0)
1111                 number = 2;
1112         else if (strncmp(prop, "usb2u248", 8) == 0)
1113                 number = 4;
1114         else
1115                 return -ENODEV;
1116 
1117         /* Sorry for the brute-force locking, but this is only used during
1118          * sleep and the timing seem to be critical
1119          */
1120         LOCK(flags);
1121         if (value) {
1122                 /* Turn ON */
1123                 if (number == 0) {
1124                         MACIO_BIC(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
1125                         (void)MACIO_IN32(KEYLARGO_FCR0);
1126                         UNLOCK(flags);
1127                         mdelay(1);
1128                         LOCK(flags);
1129                         MACIO_BIS(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
1130                 } else if (number == 2) {
1131                         MACIO_BIC(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
1132                         UNLOCK(flags);
1133                         (void)MACIO_IN32(KEYLARGO_FCR0);
1134                         mdelay(1);
1135                         LOCK(flags);
1136                         MACIO_BIS(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
1137                 } else if (number == 4) {
1138                         MACIO_BIC(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
1139                         UNLOCK(flags);
1140                         (void)MACIO_IN32(KEYLARGO_FCR1);
1141                         mdelay(1);
1142                         LOCK(flags);
1143                         MACIO_BIS(KEYLARGO_FCR1, KL1_USB2_CELL_ENABLE);
1144                 }
1145                 if (number < 4) {
1146                         reg = MACIO_IN32(KEYLARGO_FCR4);
1147                         reg &=  ~(KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
1148                                 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number));
1149                         reg &=  ~(KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
1150                                 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1));
1151                         MACIO_OUT32(KEYLARGO_FCR4, reg);
1152                         (void)MACIO_IN32(KEYLARGO_FCR4);
1153                         udelay(10);
1154                 } else {
1155                         reg = MACIO_IN32(KEYLARGO_FCR3);
1156                         reg &=  ~(KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
1157                                 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0));
1158                         reg &=  ~(KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
1159                                 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1));
1160                         MACIO_OUT32(KEYLARGO_FCR3, reg);
1161                         (void)MACIO_IN32(KEYLARGO_FCR3);
1162                         udelay(10);
1163                 }
1164                 if (macio->type == macio_intrepid) {
1165                         /* wait for clock stopped bits to clear */
1166                         u32 test0 = 0, test1 = 0;
1167                         u32 status0, status1;
1168                         int timeout = 1000;
1169 
1170                         UNLOCK(flags);
1171                         switch (number) {
1172                         case 0:
1173                                 test0 = UNI_N_CLOCK_STOPPED_USB0;
1174                                 test1 = UNI_N_CLOCK_STOPPED_USB0PCI;
1175                                 break;
1176                         case 2:
1177                                 test0 = UNI_N_CLOCK_STOPPED_USB1;
1178                                 test1 = UNI_N_CLOCK_STOPPED_USB1PCI;
1179                                 break;
1180                         case 4:
1181                                 test0 = UNI_N_CLOCK_STOPPED_USB2;
1182                                 test1 = UNI_N_CLOCK_STOPPED_USB2PCI;
1183                                 break;
1184                         }
1185                         do {
1186                                 if (--timeout <= 0) {
1187                                         printk(KERN_ERR "core99_usb_enable: "
1188                                                "Timeout waiting for clocks\n");
1189                                         break;
1190                                 }
1191                                 mdelay(1);
1192                                 status0 = UN_IN(UNI_N_CLOCK_STOP_STATUS0);
1193                                 status1 = UN_IN(UNI_N_CLOCK_STOP_STATUS1);
1194                         } while ((status0 & test0) | (status1 & test1));
1195                         LOCK(flags);
1196                 }
1197         } else {
1198                 /* Turn OFF */
1199                 if (number < 4) {
1200                         reg = MACIO_IN32(KEYLARGO_FCR4);
1201                         reg |=  KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
1202                                 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number);
1203                         reg |=  KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
1204                                 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1);
1205                         MACIO_OUT32(KEYLARGO_FCR4, reg);
1206                         (void)MACIO_IN32(KEYLARGO_FCR4);
1207                         udelay(1);
1208                 } else {
1209                         reg = MACIO_IN32(KEYLARGO_FCR3);
1210                         reg |=  KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
1211                                 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0);
1212                         reg |=  KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
1213                                 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1);
1214                         MACIO_OUT32(KEYLARGO_FCR3, reg);
1215                         (void)MACIO_IN32(KEYLARGO_FCR3);
1216                         udelay(1);
1217                 }
1218                 if (number == 0) {
1219                         if (macio->type != macio_intrepid)
1220                                 MACIO_BIC(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
1221                         (void)MACIO_IN32(KEYLARGO_FCR0);
1222                         udelay(1);
1223                         MACIO_BIS(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
1224                         (void)MACIO_IN32(KEYLARGO_FCR0);
1225                 } else if (number == 2) {
1226                         if (macio->type != macio_intrepid)
1227                                 MACIO_BIC(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
1228                         (void)MACIO_IN32(KEYLARGO_FCR0);
1229                         udelay(1);
1230                         MACIO_BIS(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
1231                         (void)MACIO_IN32(KEYLARGO_FCR0);
1232                 } else if (number == 4) {
1233                         udelay(1);
1234                         MACIO_BIS(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
1235                         (void)MACIO_IN32(KEYLARGO_FCR1);
1236                 }
1237                 udelay(1);
1238         }
1239         UNLOCK(flags);
1240 
1241         return 0;
1242 }
1243 
1244 static long
1245 core99_firewire_enable(struct device_node *node, long param, long value)
1246 {
1247         unsigned long flags;
1248         struct macio_chip *macio;
1249 
1250         macio = &macio_chips[0];
1251         if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1252             macio->type != macio_intrepid)
1253                 return -ENODEV;
1254         if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
1255                 return -ENODEV;
1256 
1257         LOCK(flags);
1258         if (value) {
1259                 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
1260                 (void)UN_IN(UNI_N_CLOCK_CNTL);
1261         } else {
1262                 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
1263                 (void)UN_IN(UNI_N_CLOCK_CNTL);
1264         }
1265         UNLOCK(flags);
1266         mdelay(1);
1267 
1268         return 0;
1269 }
1270 
1271 static long
1272 core99_firewire_cable_power(struct device_node *node, long param, long value)
1273 {
1274         unsigned long flags;
1275         struct macio_chip *macio;
1276 
1277         /* Trick: we allow NULL node */
1278         if ((pmac_mb.board_flags & PMAC_MB_HAS_FW_POWER) == 0)
1279                 return -ENODEV;
1280         macio = &macio_chips[0];
1281         if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1282             macio->type != macio_intrepid)
1283                 return -ENODEV;
1284         if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
1285                 return -ENODEV;
1286 
1287         LOCK(flags);
1288         if (value) {
1289                 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 0);
1290                 MACIO_IN8(KL_GPIO_FW_CABLE_POWER);
1291                 udelay(10);
1292         } else {
1293                 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 4);
1294                 MACIO_IN8(KL_GPIO_FW_CABLE_POWER); udelay(10);
1295         }
1296         UNLOCK(flags);
1297         mdelay(1);
1298 
1299         return 0;
1300 }
1301 
1302 static long
1303 intrepid_aack_delay_enable(struct device_node *node, long param, long value)
1304 {
1305         unsigned long flags;
1306 
1307         if (uninorth_rev < 0xd2)
1308                 return -ENODEV;
1309 
1310         LOCK(flags);
1311         if (param)
1312                 UN_BIS(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE);
1313         else
1314                 UN_BIC(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE);
1315         UNLOCK(flags);
1316 
1317         return 0;
1318 }
1319 
1320 
1321 #endif /* CONFIG_PPC64 */
1322 
1323 static long
1324 core99_read_gpio(struct device_node *node, long param, long value)
1325 {
1326         struct macio_chip *macio = &macio_chips[0];
1327 
1328         return MACIO_IN8(param);
1329 }
1330 
1331 
1332 static long
1333 core99_write_gpio(struct device_node *node, long param, long value)
1334 {
1335         struct macio_chip *macio = &macio_chips[0];
1336 
1337         MACIO_OUT8(param, (u8)(value & 0xff));
1338         return 0;
1339 }
1340 
1341 #ifdef CONFIG_PPC64
1342 static long g5_gmac_enable(struct device_node *node, long param, long value)
1343 {
1344         struct macio_chip *macio = &macio_chips[0];
1345         unsigned long flags;
1346 
1347         if (node == NULL)
1348                 return -ENODEV;
1349 
1350         LOCK(flags);
1351         if (value) {
1352                 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
1353                 mb();
1354                 k2_skiplist[0] = NULL;
1355         } else {
1356                 k2_skiplist[0] = node;
1357                 mb();
1358                 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
1359         }
1360         
1361         UNLOCK(flags);
1362         mdelay(1);
1363 
1364         return 0;
1365 }
1366 
1367 static long g5_fw_enable(struct device_node *node, long param, long value)
1368 {
1369         struct macio_chip *macio = &macio_chips[0];
1370         unsigned long flags;
1371 
1372         if (node == NULL)
1373                 return -ENODEV;
1374 
1375         LOCK(flags);
1376         if (value) {
1377                 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
1378                 mb();
1379                 k2_skiplist[1] = NULL;
1380         } else {
1381                 k2_skiplist[1] = node;
1382                 mb();
1383                 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
1384         }
1385         
1386         UNLOCK(flags);
1387         mdelay(1);
1388 
1389         return 0;
1390 }
1391 
1392 static long g5_mpic_enable(struct device_node *node, long param, long value)
1393 {
1394         unsigned long flags;
1395         struct device_node *parent = of_get_parent(node);
1396         int is_u3;
1397 
1398         if (parent == NULL)
1399                 return 0;
1400         is_u3 = strcmp(parent->name, "u3") == 0 ||
1401                 strcmp(parent->name, "u4") == 0;
1402         of_node_put(parent);
1403         if (!is_u3)
1404                 return 0;
1405 
1406         LOCK(flags);
1407         UN_BIS(U3_TOGGLE_REG, U3_MPIC_RESET | U3_MPIC_OUTPUT_ENABLE);
1408         UNLOCK(flags);
1409 
1410         return 0;
1411 }
1412 
1413 static long g5_eth_phy_reset(struct device_node *node, long param, long value)
1414 {
1415         struct macio_chip *macio = &macio_chips[0];
1416         struct device_node *phy;
1417         int need_reset;
1418 
1419         /*
1420          * We must not reset the combo PHYs, only the BCM5221 found in
1421          * the iMac G5.
1422          */
1423         phy = of_get_next_child(node, NULL);
1424         if (!phy)
1425                 return -ENODEV;
1426         need_reset = of_device_is_compatible(phy, "B5221");
1427         of_node_put(phy);
1428         if (!need_reset)
1429                 return 0;
1430 
1431         /* PHY reset is GPIO 29, not in device-tree unfortunately */
1432         MACIO_OUT8(K2_GPIO_EXTINT_0 + 29,
1433                    KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
1434         /* Thankfully, this is now always called at a time when we can
1435          * schedule by sungem.
1436          */
1437         msleep(10);
1438         MACIO_OUT8(K2_GPIO_EXTINT_0 + 29, 0);
1439 
1440         return 0;
1441 }
1442 
1443 static long g5_i2s_enable(struct device_node *node, long param, long value)
1444 {
1445         /* Very crude implementation for now */
1446         struct macio_chip *macio = &macio_chips[0];
1447         unsigned long flags;
1448         int cell;
1449         u32 fcrs[3][3] = {
1450                 { 0,
1451                   K2_FCR1_I2S0_CELL_ENABLE |
1452                   K2_FCR1_I2S0_CLK_ENABLE_BIT | K2_FCR1_I2S0_ENABLE,
1453                   KL3_I2S0_CLK18_ENABLE
1454                 },
1455                 { KL0_SCC_A_INTF_ENABLE,
1456                   K2_FCR1_I2S1_CELL_ENABLE |
1457                   K2_FCR1_I2S1_CLK_ENABLE_BIT | K2_FCR1_I2S1_ENABLE,
1458                   KL3_I2S1_CLK18_ENABLE
1459                 },
1460                 { KL0_SCC_B_INTF_ENABLE,
1461                   SH_FCR1_I2S2_CELL_ENABLE |
1462                   SH_FCR1_I2S2_CLK_ENABLE_BIT | SH_FCR1_I2S2_ENABLE,
1463                   SH_FCR3_I2S2_CLK18_ENABLE
1464                 },
1465         };
1466 
1467         if (macio->type != macio_keylargo2 && macio->type != macio_shasta)
1468                 return -ENODEV;
1469         if (strncmp(node->name, "i2s-", 4))
1470                 return -ENODEV;
1471         cell = node->name[4] - 'a';
1472         switch(cell) {
1473         case 0:
1474         case 1:
1475                 break;
1476         case 2:
1477                 if (macio->type == macio_shasta)
1478                         break;
1479         default:
1480                 return -ENODEV;
1481         }
1482 
1483         LOCK(flags);
1484         if (value) {
1485                 MACIO_BIC(KEYLARGO_FCR0, fcrs[cell][0]);
1486                 MACIO_BIS(KEYLARGO_FCR1, fcrs[cell][1]);
1487                 MACIO_BIS(KEYLARGO_FCR3, fcrs[cell][2]);
1488         } else {
1489                 MACIO_BIC(KEYLARGO_FCR3, fcrs[cell][2]);
1490                 MACIO_BIC(KEYLARGO_FCR1, fcrs[cell][1]);
1491                 MACIO_BIS(KEYLARGO_FCR0, fcrs[cell][0]);
1492         }
1493         udelay(10);
1494         UNLOCK(flags);
1495 
1496         return 0;
1497 }
1498 
1499 
1500 #ifdef CONFIG_SMP
1501 static long g5_reset_cpu(struct device_node *node, long param, long value)
1502 {
1503         unsigned int reset_io = 0;
1504         unsigned long flags;
1505         struct macio_chip *macio;
1506         struct device_node *np;
1507         struct device_node *cpus;
1508 
1509         macio = &macio_chips[0];
1510         if (macio->type != macio_keylargo2 && macio->type != macio_shasta)
1511                 return -ENODEV;
1512 
1513         cpus = of_find_node_by_path("/cpus");
1514         if (cpus == NULL)
1515                 return -ENODEV;
1516         for (np = cpus->child; np != NULL; np = np->sibling) {
1517                 const u32 *num = of_get_property(np, "reg", NULL);
1518                 const u32 *rst = of_get_property(np, "soft-reset", NULL);
1519                 if (num == NULL || rst == NULL)
1520                         continue;
1521                 if (param == *num) {
1522                         reset_io = *rst;
1523                         break;
1524                 }
1525         }
1526         of_node_put(cpus);
1527         if (np == NULL || reset_io == 0)
1528                 return -ENODEV;
1529 
1530         LOCK(flags);
1531         MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
1532         (void)MACIO_IN8(reset_io);
1533         udelay(1);
1534         MACIO_OUT8(reset_io, 0);
1535         (void)MACIO_IN8(reset_io);
1536         UNLOCK(flags);
1537 
1538         return 0;
1539 }
1540 #endif /* CONFIG_SMP */
1541 
1542 /*
1543  * This can be called from pmac_smp so isn't static
1544  *
1545  * This takes the second CPU off the bus on dual CPU machines
1546  * running UP
1547  */
1548 void g5_phy_disable_cpu1(void)
1549 {
1550         if (uninorth_maj == 3)
1551                 UN_OUT(U3_API_PHY_CONFIG_1, 0);
1552 }
1553 #endif /* CONFIG_PPC64 */
1554 
1555 #ifndef CONFIG_PPC64
1556 
1557 
1558 #ifdef CONFIG_PM
1559 static u32 save_gpio_levels[2];
1560 static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT];
1561 static u8 save_gpio_normal[KEYLARGO_GPIO_CNT];
1562 static u32 save_unin_clock_ctl;
1563 
1564 static void keylargo_shutdown(struct macio_chip *macio, int sleep_mode)
1565 {
1566         u32 temp;
1567 
1568         if (sleep_mode) {
1569                 mdelay(1);
1570                 MACIO_BIS(KEYLARGO_FCR0, KL0_USB_REF_SUSPEND);
1571                 (void)MACIO_IN32(KEYLARGO_FCR0);
1572                 mdelay(1);
1573         }
1574 
1575         MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1576                                 KL0_SCC_CELL_ENABLE |
1577                                 KL0_IRDA_ENABLE | KL0_IRDA_CLK32_ENABLE |
1578                                 KL0_IRDA_CLK19_ENABLE);
1579 
1580         MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK);
1581         MACIO_BIS(KEYLARGO_MBCR, KL_MBCR_MB0_IDE_ENABLE);
1582 
1583         MACIO_BIC(KEYLARGO_FCR1,
1584                 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
1585                 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
1586                 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1587                 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1588                 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1589                 KL1_EIDE0_ENABLE | KL1_EIDE0_RESET_N |
1590                 KL1_EIDE1_ENABLE | KL1_EIDE1_RESET_N |
1591                 KL1_UIDE_ENABLE);
1592 
1593         MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
1594         MACIO_BIC(KEYLARGO_FCR2, KL2_IOBUS_ENABLE);
1595 
1596         temp = MACIO_IN32(KEYLARGO_FCR3);
1597         if (macio->rev >= 2) {
1598                 temp |= KL3_SHUTDOWN_PLL2X;
1599                 if (sleep_mode)
1600                         temp |= KL3_SHUTDOWN_PLL_TOTAL;
1601         }
1602 
1603         temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
1604                 KL3_SHUTDOWN_PLLKW35;
1605         if (sleep_mode)
1606                 temp |= KL3_SHUTDOWN_PLLKW12;
1607         temp &= ~(KL3_CLK66_ENABLE | KL3_CLK49_ENABLE | KL3_CLK45_ENABLE
1608                 | KL3_CLK31_ENABLE | KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
1609         if (sleep_mode)
1610                 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE);
1611         MACIO_OUT32(KEYLARGO_FCR3, temp);
1612 
1613         /* Flush posted writes & wait a bit */
1614         (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1615 }
1616 
1617 static void pangea_shutdown(struct macio_chip *macio, int sleep_mode)
1618 {
1619         u32 temp;
1620 
1621         MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1622                                 KL0_SCC_CELL_ENABLE |
1623                                 KL0_USB0_CELL_ENABLE | KL0_USB1_CELL_ENABLE);
1624 
1625         MACIO_BIC(KEYLARGO_FCR1,
1626                 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
1627                 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
1628                 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1629                 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1630                 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1631                 KL1_UIDE_ENABLE);
1632         if (pmac_mb.board_flags & PMAC_MB_MOBILE)
1633                 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
1634 
1635         MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
1636 
1637         temp = MACIO_IN32(KEYLARGO_FCR3);
1638         temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
1639                 KL3_SHUTDOWN_PLLKW35;
1640         temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE | KL3_CLK31_ENABLE
1641                 | KL3_I2S0_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE);
1642         if (sleep_mode)
1643                 temp &= ~(KL3_VIA_CLK16_ENABLE | KL3_TIMER_CLK18_ENABLE);
1644         MACIO_OUT32(KEYLARGO_FCR3, temp);
1645 
1646         /* Flush posted writes & wait a bit */
1647         (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1648 }
1649 
1650 static void intrepid_shutdown(struct macio_chip *macio, int sleep_mode)
1651 {
1652         u32 temp;
1653 
1654         MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1655                   KL0_SCC_CELL_ENABLE);
1656 
1657         MACIO_BIC(KEYLARGO_FCR1,
1658                 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1659                 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1660                 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1661                 KL1_EIDE0_ENABLE);
1662         if (pmac_mb.board_flags & PMAC_MB_MOBILE)
1663                 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
1664 
1665         temp = MACIO_IN32(KEYLARGO_FCR3);
1666         temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE |
1667                   KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
1668         if (sleep_mode)
1669                 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_IT_VIA_CLK32_ENABLE);
1670         MACIO_OUT32(KEYLARGO_FCR3, temp);
1671 
1672         /* Flush posted writes & wait a bit */
1673         (void)MACIO_IN32(KEYLARGO_FCR0);
1674         mdelay(10);
1675 }
1676 
1677 
1678 static int
1679 core99_sleep(void)
1680 {
1681         struct macio_chip *macio;
1682         int i;
1683 
1684         macio = &macio_chips[0];
1685         if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1686             macio->type != macio_intrepid)
1687                 return -ENODEV;
1688 
1689         /* We power off the wireless slot in case it was not done
1690          * by the driver. We don't power it on automatically however
1691          */
1692         if (macio->flags & MACIO_FLAG_AIRPORT_ON)
1693                 core99_airport_enable(macio->of_node, 0, 0);
1694 
1695         /* We power off the FW cable. Should be done by the driver... */
1696         if (macio->flags & MACIO_FLAG_FW_SUPPORTED) {
1697                 core99_firewire_enable(NULL, 0, 0);
1698                 core99_firewire_cable_power(NULL, 0, 0);
1699         }
1700 
1701         /* We make sure int. modem is off (in case driver lost it) */
1702         if (macio->type == macio_keylargo)
1703                 core99_modem_enable(macio->of_node, 0, 0);
1704         else
1705                 pangea_modem_enable(macio->of_node, 0, 0);
1706 
1707         /* We make sure the sound is off as well */
1708         core99_sound_chip_enable(macio->of_node, 0, 0);
1709 
1710         /*
1711          * Save various bits of KeyLargo
1712          */
1713 
1714         /* Save the state of the various GPIOs */
1715         save_gpio_levels[0] = MACIO_IN32(KEYLARGO_GPIO_LEVELS0);
1716         save_gpio_levels[1] = MACIO_IN32(KEYLARGO_GPIO_LEVELS1);
1717         for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
1718                 save_gpio_extint[i] = MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+i);
1719         for (i=0; i<KEYLARGO_GPIO_CNT; i++)
1720                 save_gpio_normal[i] = MACIO_IN8(KEYLARGO_GPIO_0+i);
1721 
1722         /* Save the FCRs */
1723         if (macio->type == macio_keylargo)
1724                 save_mbcr = MACIO_IN32(KEYLARGO_MBCR);
1725         save_fcr[0] = MACIO_IN32(KEYLARGO_FCR0);
1726         save_fcr[1] = MACIO_IN32(KEYLARGO_FCR1);
1727         save_fcr[2] = MACIO_IN32(KEYLARGO_FCR2);
1728         save_fcr[3] = MACIO_IN32(KEYLARGO_FCR3);
1729         save_fcr[4] = MACIO_IN32(KEYLARGO_FCR4);
1730         if (macio->type == macio_pangea || macio->type == macio_intrepid)
1731                 save_fcr[5] = MACIO_IN32(KEYLARGO_FCR5);
1732 
1733         /* Save state & config of DBDMA channels */
1734         dbdma_save(macio, save_dbdma);
1735 
1736         /*
1737          * Turn off as much as we can
1738          */
1739         if (macio->type == macio_pangea)
1740                 pangea_shutdown(macio, 1);
1741         else if (macio->type == macio_intrepid)
1742                 intrepid_shutdown(macio, 1);
1743         else if (macio->type == macio_keylargo)
1744                 keylargo_shutdown(macio, 1);
1745 
1746         /*
1747          * Put the host bridge to sleep
1748          */
1749 
1750         save_unin_clock_ctl = UN_IN(UNI_N_CLOCK_CNTL);
1751         /* Note: do not switch GMAC off, driver does it when necessary, WOL must keep it
1752          * enabled !
1753          */
1754         UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl &
1755                ~(/*UNI_N_CLOCK_CNTL_GMAC|*/UNI_N_CLOCK_CNTL_FW/*|UNI_N_CLOCK_CNTL_PCI*/));
1756         udelay(100);
1757         UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
1758         UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_SLEEP);
1759         mdelay(10);
1760 
1761         /*
1762          * FIXME: A bit of black magic with OpenPIC (don't ask me why)
1763          */
1764         if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
1765                 MACIO_BIS(0x506e0, 0x00400000);
1766                 MACIO_BIS(0x506e0, 0x80000000);
1767         }
1768         return 0;
1769 }
1770 
1771 static int
1772 core99_wake_up(void)
1773 {
1774         struct macio_chip *macio;
1775         int i;
1776 
1777         macio = &macio_chips[0];
1778         if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1779             macio->type != macio_intrepid)
1780                 return -ENODEV;
1781 
1782         /*
1783          * Wakeup the host bridge
1784          */
1785         UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
1786         udelay(10);
1787         UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
1788         udelay(10);
1789 
1790         /*
1791          * Restore KeyLargo
1792          */
1793 
1794         if (macio->type == macio_keylargo) {
1795                 MACIO_OUT32(KEYLARGO_MBCR, save_mbcr);
1796                 (void)MACIO_IN32(KEYLARGO_MBCR); udelay(10);
1797         }
1798         MACIO_OUT32(KEYLARGO_FCR0, save_fcr[0]);
1799         (void)MACIO_IN32(KEYLARGO_FCR0); udelay(10);
1800         MACIO_OUT32(KEYLARGO_FCR1, save_fcr[1]);
1801         (void)MACIO_IN32(KEYLARGO_FCR1); udelay(10);
1802         MACIO_OUT32(KEYLARGO_FCR2, save_fcr[2]);
1803         (void)MACIO_IN32(KEYLARGO_FCR2); udelay(10);
1804         MACIO_OUT32(KEYLARGO_FCR3, save_fcr[3]);
1805         (void)MACIO_IN32(KEYLARGO_FCR3); udelay(10);
1806         MACIO_OUT32(KEYLARGO_FCR4, save_fcr[4]);
1807         (void)MACIO_IN32(KEYLARGO_FCR4); udelay(10);
1808         if (macio->type == macio_pangea || macio->type == macio_intrepid) {
1809                 MACIO_OUT32(KEYLARGO_FCR5, save_fcr[5]);
1810                 (void)MACIO_IN32(KEYLARGO_FCR5); udelay(10);
1811         }
1812 
1813         dbdma_restore(macio, save_dbdma);
1814 
1815         MACIO_OUT32(KEYLARGO_GPIO_LEVELS0, save_gpio_levels[0]);
1816         MACIO_OUT32(KEYLARGO_GPIO_LEVELS1, save_gpio_levels[1]);
1817         for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
1818                 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+i, save_gpio_extint[i]);
1819         for (i=0; i<KEYLARGO_GPIO_CNT; i++)
1820                 MACIO_OUT8(KEYLARGO_GPIO_0+i, save_gpio_normal[i]);
1821 
1822         /* FIXME more black magic with OpenPIC ... */
1823         if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
1824                 MACIO_BIC(0x506e0, 0x00400000);
1825                 MACIO_BIC(0x506e0, 0x80000000);
1826         }
1827 
1828         UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl);
1829         udelay(100);
1830 
1831         return 0;
1832 }
1833 
1834 #endif /* CONFIG_PM */
1835 
1836 static long
1837 core99_sleep_state(struct device_node *node, long param, long value)
1838 {
1839         /* Param == 1 means to enter the "fake sleep" mode that is
1840          * used for CPU speed switch
1841          */
1842         if (param == 1) {
1843                 if (value == 1) {
1844                         UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
1845                         UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_IDLE2);
1846                 } else {
1847                         UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
1848                         udelay(10);
1849                         UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
1850                         udelay(10);
1851                 }
1852                 return 0;
1853         }
1854         if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
1855                 return -EPERM;
1856 
1857 #ifdef CONFIG_PM
1858         if (value == 1)
1859                 return core99_sleep();
1860         else if (value == 0)
1861                 return core99_wake_up();
1862 
1863 #endif /* CONFIG_PM */
1864         return 0;
1865 }
1866 
1867 #endif /* CONFIG_PPC64 */
1868 
1869 static long
1870 generic_dev_can_wake(struct device_node *node, long param, long value)
1871 {
1872         /* Todo: eventually check we are really dealing with on-board
1873          * video device ...
1874          */
1875 
1876         if (pmac_mb.board_flags & PMAC_MB_MAY_SLEEP)
1877                 pmac_mb.board_flags |= PMAC_MB_CAN_SLEEP;
1878         return 0;
1879 }
1880 
1881 static long generic_get_mb_info(struct device_node *node, long param, long value)
1882 {
1883         switch(param) {
1884                 case PMAC_MB_INFO_MODEL:
1885                         return pmac_mb.model_id;
1886                 case PMAC_MB_INFO_FLAGS:
1887                         return pmac_mb.board_flags;
1888                 case PMAC_MB_INFO_NAME:
1889                         /* hack hack hack... but should work */
1890                         *((const char **)value) = pmac_mb.model_name;
1891                         return 0;
1892         }
1893         return -EINVAL;
1894 }
1895 
1896 
1897 /*
1898  * Table definitions
1899  */
1900 
1901 /* Used on any machine
1902  */
1903 static struct feature_table_entry any_features[] = {
1904         { PMAC_FTR_GET_MB_INFO,         generic_get_mb_info },
1905         { PMAC_FTR_DEVICE_CAN_WAKE,     generic_dev_can_wake },
1906         { 0, NULL }
1907 };
1908 
1909 #ifndef CONFIG_PPC64
1910 
1911 /* OHare based motherboards. Currently, we only use these on the
1912  * 2400,3400 and 3500 series powerbooks. Some older desktops seem
1913  * to have issues with turning on/off those asic cells
1914  */
1915 static struct feature_table_entry ohare_features[] = {
1916         { PMAC_FTR_SCC_ENABLE,          ohare_htw_scc_enable },
1917         { PMAC_FTR_SWIM3_ENABLE,        ohare_floppy_enable },
1918         { PMAC_FTR_MESH_ENABLE,         ohare_mesh_enable },
1919         { PMAC_FTR_IDE_ENABLE,          ohare_ide_enable},
1920         { PMAC_FTR_IDE_RESET,           ohare_ide_reset},
1921         { PMAC_FTR_SLEEP_STATE,         ohare_sleep_state },
1922         { 0, NULL }
1923 };
1924 
1925 /* Heathrow desktop machines (Beige G3).
1926  * Separated as some features couldn't be properly tested
1927  * and the serial port control bits appear to confuse it.
1928  */
1929 static struct feature_table_entry heathrow_desktop_features[] = {
1930         { PMAC_FTR_SWIM3_ENABLE,        heathrow_floppy_enable },
1931         { PMAC_FTR_MESH_ENABLE,         heathrow_mesh_enable },
1932         { PMAC_FTR_IDE_ENABLE,          heathrow_ide_enable },
1933         { PMAC_FTR_IDE_RESET,           heathrow_ide_reset },
1934         { PMAC_FTR_BMAC_ENABLE,         heathrow_bmac_enable },
1935         { 0, NULL }
1936 };
1937 
1938 /* Heathrow based laptop, that is the Wallstreet and mainstreet
1939  * powerbooks.
1940  */
1941 static struct feature_table_entry heathrow_laptop_features[] = {
1942         { PMAC_FTR_SCC_ENABLE,          ohare_htw_scc_enable },
1943         { PMAC_FTR_MODEM_ENABLE,        heathrow_modem_enable },
1944         { PMAC_FTR_SWIM3_ENABLE,        heathrow_floppy_enable },
1945         { PMAC_FTR_MESH_ENABLE,         heathrow_mesh_enable },
1946         { PMAC_FTR_IDE_ENABLE,          heathrow_ide_enable },
1947         { PMAC_FTR_IDE_RESET,           heathrow_ide_reset },
1948         { PMAC_FTR_BMAC_ENABLE,         heathrow_bmac_enable },
1949         { PMAC_FTR_SOUND_CHIP_ENABLE,   heathrow_sound_enable },
1950         { PMAC_FTR_SLEEP_STATE,         heathrow_sleep_state },
1951         { 0, NULL }
1952 };
1953 
1954 /* Paddington based machines
1955  * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4.
1956  */
1957 static struct feature_table_entry paddington_features[] = {
1958         { PMAC_FTR_SCC_ENABLE,          ohare_htw_scc_enable },
1959         { PMAC_FTR_MODEM_ENABLE,        heathrow_modem_enable },
1960         { PMAC_FTR_SWIM3_ENABLE,        heathrow_floppy_enable },
1961         { PMAC_FTR_MESH_ENABLE,         heathrow_mesh_enable },
1962         { PMAC_FTR_IDE_ENABLE,          heathrow_ide_enable },
1963         { PMAC_FTR_IDE_RESET,           heathrow_ide_reset },
1964         { PMAC_FTR_BMAC_ENABLE,         heathrow_bmac_enable },
1965         { PMAC_FTR_SOUND_CHIP_ENABLE,   heathrow_sound_enable },
1966         { PMAC_FTR_SLEEP_STATE,         heathrow_sleep_state },
1967         { 0, NULL }
1968 };
1969 
1970 /* Core99 & MacRISC 2 machines (all machines released since the
1971  * iBook (included), that is all AGP machines, except pangea
1972  * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo
1973  * used on iBook2 & iMac "flow power".
1974  */
1975 static struct feature_table_entry core99_features[] = {
1976         { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
1977         { PMAC_FTR_MODEM_ENABLE,        core99_modem_enable },
1978         { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
1979         { PMAC_FTR_IDE_RESET,           core99_ide_reset },
1980         { PMAC_FTR_GMAC_ENABLE,         core99_gmac_enable },
1981         { PMAC_FTR_GMAC_PHY_RESET,      core99_gmac_phy_reset },
1982         { PMAC_FTR_SOUND_CHIP_ENABLE,   core99_sound_chip_enable },
1983         { PMAC_FTR_AIRPORT_ENABLE,      core99_airport_enable },
1984         { PMAC_FTR_USB_ENABLE,          core99_usb_enable },
1985         { PMAC_FTR_1394_ENABLE,         core99_firewire_enable },
1986         { PMAC_FTR_1394_CABLE_POWER,    core99_firewire_cable_power },
1987 #ifdef CONFIG_PM
1988         { PMAC_FTR_SLEEP_STATE,         core99_sleep_state },
1989 #endif
1990 #ifdef CONFIG_SMP
1991         { PMAC_FTR_RESET_CPU,           core99_reset_cpu },
1992 #endif /* CONFIG_SMP */
1993         { PMAC_FTR_READ_GPIO,           core99_read_gpio },
1994         { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
1995         { 0, NULL }
1996 };
1997 
1998 /* RackMac
1999  */
2000 static struct feature_table_entry rackmac_features[] = {
2001         { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
2002         { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
2003         { PMAC_FTR_IDE_RESET,           core99_ide_reset },
2004         { PMAC_FTR_GMAC_ENABLE,         core99_gmac_enable },
2005         { PMAC_FTR_GMAC_PHY_RESET,      core99_gmac_phy_reset },
2006         { PMAC_FTR_USB_ENABLE,          core99_usb_enable },
2007         { PMAC_FTR_1394_ENABLE,         core99_firewire_enable },
2008         { PMAC_FTR_1394_CABLE_POWER,    core99_firewire_cable_power },
2009         { PMAC_FTR_SLEEP_STATE,         core99_sleep_state },
2010 #ifdef CONFIG_SMP
2011         { PMAC_FTR_RESET_CPU,           core99_reset_cpu },
2012 #endif /* CONFIG_SMP */
2013         { PMAC_FTR_READ_GPIO,           core99_read_gpio },
2014         { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
2015         { 0, NULL }
2016 };
2017 
2018 /* Pangea features
2019  */
2020 static struct feature_table_entry pangea_features[] = {
2021         { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
2022         { PMAC_FTR_MODEM_ENABLE,        pangea_modem_enable },
2023         { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
2024         { PMAC_FTR_IDE_RESET,           core99_ide_reset },
2025         { PMAC_FTR_GMAC_ENABLE,         core99_gmac_enable },
2026         { PMAC_FTR_GMAC_PHY_RESET,      core99_gmac_phy_reset },
2027         { PMAC_FTR_SOUND_CHIP_ENABLE,   core99_sound_chip_enable },
2028         { PMAC_FTR_AIRPORT_ENABLE,      core99_airport_enable },
2029         { PMAC_FTR_USB_ENABLE,          core99_usb_enable },
2030         { PMAC_FTR_1394_ENABLE,         core99_firewire_enable },
2031         { PMAC_FTR_1394_CABLE_POWER,    core99_firewire_cable_power },
2032         { PMAC_FTR_SLEEP_STATE,         core99_sleep_state },
2033         { PMAC_FTR_READ_GPIO,           core99_read_gpio },
2034         { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
2035         { 0, NULL }
2036 };
2037 
2038 /* Intrepid features
2039  */
2040 static struct feature_table_entry intrepid_features[] = {
2041         { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
2042         { PMAC_FTR_MODEM_ENABLE,        pangea_modem_enable },
2043         { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
2044         { PMAC_FTR_IDE_RESET,           core99_ide_reset },
2045         { PMAC_FTR_GMAC_ENABLE,         core99_gmac_enable },
2046         { PMAC_FTR_GMAC_PHY_RESET,      core99_gmac_phy_reset },
2047         { PMAC_FTR_SOUND_CHIP_ENABLE,   core99_sound_chip_enable },
2048         { PMAC_FTR_AIRPORT_ENABLE,      core99_airport_enable },
2049         { PMAC_FTR_USB_ENABLE,          core99_usb_enable },
2050         { PMAC_FTR_1394_ENABLE,         core99_firewire_enable },
2051         { PMAC_FTR_1394_CABLE_POWER,    core99_firewire_cable_power },
2052         { PMAC_FTR_SLEEP_STATE,         core99_sleep_state },
2053         { PMAC_FTR_READ_GPIO,           core99_read_gpio },
2054         { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
2055         { PMAC_FTR_AACK_DELAY_ENABLE,   intrepid_aack_delay_enable },
2056         { 0, NULL }
2057 };
2058 
2059 #else /* CONFIG_PPC64 */
2060 
2061 /* G5 features
2062  */
2063 static struct feature_table_entry g5_features[] = {
2064         { PMAC_FTR_GMAC_ENABLE,         g5_gmac_enable },
2065         { PMAC_FTR_1394_ENABLE,         g5_fw_enable },
2066         { PMAC_FTR_ENABLE_MPIC,         g5_mpic_enable },
2067         { PMAC_FTR_GMAC_PHY_RESET,      g5_eth_phy_reset },
2068         { PMAC_FTR_SOUND_CHIP_ENABLE,   g5_i2s_enable },
2069 #ifdef CONFIG_SMP
2070         { PMAC_FTR_RESET_CPU,           g5_reset_cpu },
2071 #endif /* CONFIG_SMP */
2072         { PMAC_FTR_READ_GPIO,           core99_read_gpio },
2073         { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
2074         { 0, NULL }
2075 };
2076 
2077 #endif /* CONFIG_PPC64 */
2078 
2079 static struct pmac_mb_def pmac_mb_defs[] = {
2080 #ifndef CONFIG_PPC64
2081         /*
2082          * Desktops
2083          */
2084 
2085         {       "AAPL,8500",                    "PowerMac 8500/8600",
2086                 PMAC_TYPE_PSURGE,               NULL,
2087                 0
2088         },
2089         {       "AAPL,9500",                    "PowerMac 9500/9600",
2090                 PMAC_TYPE_PSURGE,               NULL,
2091                 0
2092         },
2093         {       "AAPL,7200",                    "PowerMac 7200",
2094                 PMAC_TYPE_PSURGE,               NULL,
2095                 0
2096         },
2097         {       "AAPL,7300",                    "PowerMac 7200/7300",
2098                 PMAC_TYPE_PSURGE,               NULL,
2099                 0
2100         },
2101         {       "AAPL,7500",                    "PowerMac 7500",
2102                 PMAC_TYPE_PSURGE,               NULL,
2103                 0
2104         },
2105         {       "AAPL,ShinerESB",               "Apple Network Server",
2106                 PMAC_TYPE_ANS,                  NULL,
2107                 0
2108         },
2109         {       "AAPL,e407",                    "Alchemy",
2110                 PMAC_TYPE_ALCHEMY,              NULL,
2111                 0
2112         },
2113         {       "AAPL,e411",                    "Gazelle",
2114                 PMAC_TYPE_GAZELLE,              NULL,
2115                 0
2116         },
2117         {       "AAPL,Gossamer",                "PowerMac G3 (Gossamer)",
2118                 PMAC_TYPE_GOSSAMER,             heathrow_desktop_features,
2119                 0
2120         },
2121         {       "AAPL,PowerMac G3",             "PowerMac G3 (Silk)",
2122                 PMAC_TYPE_SILK,                 heathrow_desktop_features,
2123                 0
2124         },
2125         {       "PowerMac1,1",                  "Blue&White G3",
2126                 PMAC_TYPE_YOSEMITE,             paddington_features,
2127                 0
2128         },
2129         {       "PowerMac1,2",                  "PowerMac G4 PCI Graphics",
2130                 PMAC_TYPE_YIKES,                paddington_features,
2131                 0
2132         },
2133         {       "PowerMac2,1",                  "iMac FireWire",
2134                 PMAC_TYPE_FW_IMAC,              core99_features,
2135                 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2136         },
2137         {       "PowerMac2,2",                  "iMac FireWire",
2138                 PMAC_TYPE_FW_IMAC,              core99_features,
2139                 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2140         },
2141         {       "PowerMac3,1",                  "PowerMac G4 AGP Graphics",
2142                 PMAC_TYPE_SAWTOOTH,             core99_features,
2143                 PMAC_MB_OLD_CORE99
2144         },
2145         {       "PowerMac3,2",                  "PowerMac G4 AGP Graphics",
2146                 PMAC_TYPE_SAWTOOTH,             core99_features,
2147                 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2148         },
2149         {       "PowerMac3,3",                  "PowerMac G4 AGP Graphics",
2150                 PMAC_TYPE_SAWTOOTH,             core99_features,
2151                 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2152         },
2153         {       "PowerMac3,4",                  "PowerMac G4 Silver",
2154                 PMAC_TYPE_QUICKSILVER,          core99_features,
2155                 PMAC_MB_MAY_SLEEP
2156         },
2157         {       "PowerMac3,5",                  "PowerMac G4 Silver",
2158                 PMAC_TYPE_QUICKSILVER,          core99_features,
2159                 PMAC_MB_MAY_SLEEP
2160         },
2161         {       "PowerMac3,6",                  "PowerMac G4 Windtunnel",
2162                 PMAC_TYPE_WINDTUNNEL,           core99_features,
2163                 PMAC_MB_MAY_SLEEP,
2164         },
2165         {       "PowerMac4,1",                  "iMac \"Flower Power\"",
2166                 PMAC_TYPE_PANGEA_IMAC,          pangea_features,
2167                 PMAC_MB_MAY_SLEEP
2168         },
2169         {       "PowerMac4,2",                  "Flat panel iMac",
2170                 PMAC_TYPE_FLAT_PANEL_IMAC,      pangea_features,
2171                 PMAC_MB_CAN_SLEEP
2172         },
2173         {       "PowerMac4,4",                  "eMac",
2174                 PMAC_TYPE_EMAC,                 core99_features,
2175                 PMAC_MB_MAY_SLEEP
2176         },
2177         {       "PowerMac5,1",                  "PowerMac G4 Cube",
2178                 PMAC_TYPE_CUBE,                 core99_features,
2179                 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2180         },
2181         {       "PowerMac6,1",                  "Flat panel iMac",
2182                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2183                 PMAC_MB_MAY_SLEEP,
2184         },
2185         {       "PowerMac6,3",                  "Flat panel iMac",
2186                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2187                 PMAC_MB_MAY_SLEEP,
2188         },
2189         {       "PowerMac6,4",                  "eMac",
2190                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2191                 PMAC_MB_MAY_SLEEP,
2192         },
2193         {       "PowerMac10,1",                 "Mac mini",
2194                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2195                 PMAC_MB_MAY_SLEEP,
2196         },
2197         {       "PowerMac10,2",                 "Mac mini (Late 2005)",
2198                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2199                 PMAC_MB_MAY_SLEEP,
2200         },
2201         {       "iMac,1",                       "iMac (first generation)",
2202                 PMAC_TYPE_ORIG_IMAC,            paddington_features,
2203                 0
2204         },
2205 
2206         /*
2207          * Xserve's
2208          */
2209 
2210         {       "RackMac1,1",                   "XServe",
2211                 PMAC_TYPE_RACKMAC,              rackmac_features,
2212                 0,
2213         },
2214         {       "RackMac1,2",                   "XServe rev. 2",
2215                 PMAC_TYPE_RACKMAC,              rackmac_features,
2216                 0,
2217         },
2218 
2219         /*
2220          * Laptops
2221          */
2222 
2223         {       "AAPL,3400/2400",               "PowerBook 3400",
2224                 PMAC_TYPE_HOOPER,               ohare_features,
2225                 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2226         },
2227         {       "AAPL,3500",                    "PowerBook 3500",
2228                 PMAC_TYPE_KANGA,                ohare_features,
2229                 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2230         },
2231         {       "AAPL,PowerBook1998",           "PowerBook Wallstreet",
2232                 PMAC_TYPE_WALLSTREET,           heathrow_laptop_features,
2233                 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2234         },
2235         {       "PowerBook1,1",                 "PowerBook 101 (Lombard)",
2236                 PMAC_TYPE_101_PBOOK,            paddington_features,
2237                 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2238         },
2239         {       "PowerBook2,1",                 "iBook (first generation)",
2240                 PMAC_TYPE_ORIG_IBOOK,           core99_features,
2241                 PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2242         },
2243         {       "PowerBook2,2",                 "iBook FireWire",
2244                 PMAC_TYPE_FW_IBOOK,             core99_features,
2245                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
2246                 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2247         },
2248         {       "PowerBook3,1",                 "PowerBook Pismo",
2249                 PMAC_TYPE_PISMO,                core99_features,
2250                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
2251                 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2252         },
2253         {       "PowerBook3,2",                 "PowerBook Titanium",
2254                 PMAC_TYPE_TITANIUM,             core99_features,
2255                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2256         },
2257         {       "PowerBook3,3",                 "PowerBook Titanium II",
2258                 PMAC_TYPE_TITANIUM2,            core99_features,
2259                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2260         },
2261         {       "PowerBook3,4",                 "PowerBook Titanium III",
2262                 PMAC_TYPE_TITANIUM3,            core99_features,
2263                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2264         },
2265         {       "PowerBook3,5",                 "PowerBook Titanium IV",
2266                 PMAC_TYPE_TITANIUM4,            core99_features,
2267                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2268         },
2269         {       "PowerBook4,1",                 "iBook 2",
2270                 PMAC_TYPE_IBOOK2,               pangea_features,
2271                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2272         },
2273         {       "PowerBook4,2",                 "iBook 2",
2274                 PMAC_TYPE_IBOOK2,               pangea_features,
2275                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2276         },
2277         {       "PowerBook4,3",                 "iBook 2 rev. 2",
2278                 PMAC_TYPE_IBOOK2,               pangea_features,
2279                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2280         },
2281         {       "PowerBook5,1",                 "PowerBook G4 17\"",
2282                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2283                 PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2284         },
2285         {       "PowerBook5,2",                 "PowerBook G4 15\"",
2286                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2287                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2288         },
2289         {       "PowerBook5,3",                 "PowerBook G4 17\"",
2290                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2291                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2292         },
2293         {       "PowerBook5,4",                 "PowerBook G4 15\"",
2294                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2295                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2296         },
2297         {       "PowerBook5,5",                 "PowerBook G4 17\"",
2298                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2299                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2300         },
2301         {       "PowerBook5,6",                 "PowerBook G4 15\"",
2302                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2303                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2304         },
2305         {       "PowerBook5,7",                 "PowerBook G4 17\"",
2306                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2307                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2308         },
2309         {       "PowerBook5,8",                 "PowerBook G4 15\"",
2310                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2311                 PMAC_MB_MAY_SLEEP  | PMAC_MB_MOBILE,
2312         },
2313         {       "PowerBook5,9",                 "PowerBook G4 17\"",
2314                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2315                 PMAC_MB_MAY_SLEEP | PMAC_MB_MOBILE,
2316         },
2317         {       "PowerBook6,1",                 "PowerBook G4 12\"",
2318                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2319                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2320         },
2321         {       "PowerBook6,2",                 "PowerBook G4",
2322                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2323                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2324         },
2325         {       "PowerBook6,3",                 "iBook G4",
2326                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2327                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2328         },
2329         {       "PowerBook6,4",                 "PowerBook G4 12\"",
2330                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2331                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2332         },
2333         {       "PowerBook6,5",                 "iBook G4",
2334                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2335                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2336         },
2337         {       "PowerBook6,7",                 "iBook G4",
2338                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2339                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2340         },
2341         {       "PowerBook6,8",                 "PowerBook G4 12\"",
2342                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2343                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2344         },
2345 #else /* CONFIG_PPC64 */
2346         {       "PowerMac7,2",                  "PowerMac G5",
2347                 PMAC_TYPE_POWERMAC_G5,          g5_features,
2348                 0,
2349         },
2350 #ifdef CONFIG_PPC64
2351         {       "PowerMac7,3",                  "PowerMac G5",
2352                 PMAC_TYPE_POWERMAC_G5,          g5_features,
2353                 0,
2354         },
2355         {       "PowerMac8,1",                  "iMac G5",
2356                 PMAC_TYPE_IMAC_G5,              g5_features,
2357                 0,
2358         },
2359         {       "PowerMac9,1",                  "PowerMac G5",
2360                 PMAC_TYPE_POWERMAC_G5_U3L,      g5_features,
2361                 0,
2362         },
2363         {       "PowerMac11,2",                 "PowerMac G5 Dual Core",
2364                 PMAC_TYPE_POWERMAC_G5_U3L,      g5_features,
2365                 0,
2366         },
2367         {       "PowerMac12,1",                 "iMac G5 (iSight)",
2368                 PMAC_TYPE_POWERMAC_G5_U3L,      g5_features,
2369                 0,
2370         },
2371         {       "RackMac3,1",                   "XServe G5",
2372                 PMAC_TYPE_XSERVE_G5,            g5_features,
2373                 0,
2374         },
2375 #endif /* CONFIG_PPC64 */
2376 #endif /* CONFIG_PPC64 */
2377 };
2378 
2379 /*
2380  * The toplevel feature_call callback
2381  */
2382 long pmac_do_feature_call(unsigned int selector, ...)
2383 {
2384         struct device_node *node;
2385         long param, value;
2386         int i;
2387         feature_call func = NULL;
2388         va_list args;
2389 
2390         if (pmac_mb.features)
2391                 for (i=0; pmac_mb.features[i].function; i++)
2392                         if (pmac_mb.features[i].selector == selector) {
2393                                 func = pmac_mb.features[i].function;
2394                                 break;
2395                         }
2396         if (!func)
2397                 for (i=0; any_features[i].function; i++)
2398                         if (any_features[i].selector == selector) {
2399                                 func = any_features[i].function;
2400                                 break;
2401                         }
2402         if (!func)
2403                 return -ENODEV;
2404 
2405         va_start(args, selector);
2406         node = (struct device_node*)va_arg(args, void*);
2407         param = va_arg(args, long);
2408         value = va_arg(args, long);
2409         va_end(args);
2410 
2411         return func(node, param, value);
2412 }
2413 
2414 static int __init probe_motherboard(void)
2415 {
2416         int i;
2417         struct macio_chip *macio = &macio_chips[0];
2418         const char *model = NULL;
2419         struct device_node *dt;
2420         int ret = 0;
2421 
2422         /* Lookup known motherboard type in device-tree. First try an
2423          * exact match on the "model" property, then try a "compatible"
2424          * match is none is found.
2425          */
2426         dt = of_find_node_by_name(NULL, "device-tree");
2427         if (dt != NULL)
2428                 model = of_get_property(dt, "model", NULL);
2429         for(i=0; model && i<ARRAY_SIZE(pmac_mb_defs); i++) {
2430             if (strcmp(model, pmac_mb_defs[i].model_string) == 0) {
2431                 pmac_mb = pmac_mb_defs[i];
2432                 goto found;
2433             }
2434         }
2435         for(i=0; i<ARRAY_SIZE(pmac_mb_defs); i++) {
2436             if (of_machine_is_compatible(pmac_mb_defs[i].model_string)) {
2437                 pmac_mb = pmac_mb_defs[i];
2438                 goto found;
2439             }
2440         }
2441 
2442         /* Fallback to selection depending on mac-io chip type */
2443         switch(macio->type) {
2444 #ifndef CONFIG_PPC64
2445             case macio_grand_central:
2446                 pmac_mb.model_id = PMAC_TYPE_PSURGE;
2447                 pmac_mb.model_name = "Unknown PowerSurge";
2448                 break;
2449             case macio_ohare:
2450                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_OHARE;
2451                 pmac_mb.model_name = "Unknown OHare-based";
2452                 break;
2453             case macio_heathrow:
2454                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_HEATHROW;
2455                 pmac_mb.model_name = "Unknown Heathrow-based";
2456                 pmac_mb.features = heathrow_desktop_features;
2457                 break;
2458             case macio_paddington:
2459                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PADDINGTON;
2460                 pmac_mb.model_name = "Unknown Paddington-based";
2461                 pmac_mb.features = paddington_features;
2462                 break;
2463             case macio_keylargo:
2464                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_CORE99;
2465                 pmac_mb.model_name = "Unknown Keylargo-based";
2466                 pmac_mb.features = core99_features;
2467                 break;
2468             case macio_pangea:
2469                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PANGEA;
2470                 pmac_mb.model_name = "Unknown Pangea-based";
2471                 pmac_mb.features = pangea_features;
2472                 break;
2473             case macio_intrepid:
2474                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_INTREPID;
2475                 pmac_mb.model_name = "Unknown Intrepid-based";
2476                 pmac_mb.features = intrepid_features;
2477                 break;
2478 #else /* CONFIG_PPC64 */
2479         case macio_keylargo2:
2480                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_K2;
2481                 pmac_mb.model_name = "Unknown K2-based";
2482                 pmac_mb.features = g5_features;
2483                 break;
2484         case macio_shasta:
2485                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_SHASTA;
2486                 pmac_mb.model_name = "Unknown Shasta-based";
2487                 pmac_mb.features = g5_features;
2488                 break;
2489 #endif /* CONFIG_PPC64 */
2490         default:
2491                 ret = -ENODEV;
2492                 goto done;
2493         }
2494 found:
2495 #ifndef CONFIG_PPC64
2496         /* Fixup Hooper vs. Comet */
2497         if (pmac_mb.model_id == PMAC_TYPE_HOOPER) {
2498                 u32 __iomem * mach_id_ptr = ioremap(0xf3000034, 4);
2499                 if (!mach_id_ptr) {
2500                         ret = -ENODEV;
2501                         goto done;
2502                 }
2503                 /* Here, I used to disable the media-bay on comet. It
2504                  * appears this is wrong, the floppy connector is actually
2505                  * a kind of media-bay and works with the current driver.
2506                  */
2507                 if (__raw_readl(mach_id_ptr) & 0x20000000UL)
2508                         pmac_mb.model_id = PMAC_TYPE_COMET;
2509                 iounmap(mach_id_ptr);
2510         }
2511 
2512         /* Set default value of powersave_nap on machines that support it.
2513          * It appears that uninorth rev 3 has a problem with it, we don't
2514          * enable it on those. In theory, the flush-on-lock property is
2515          * supposed to be set when not supported, but I'm not very confident
2516          * that all Apple OF revs did it properly, I do it the paranoid way.
2517          */
2518         while (uninorth_base && uninorth_rev > 3) {
2519                 struct device_node *cpus = of_find_node_by_path("/cpus");
2520                 struct device_node *np;
2521 
2522                 if (!cpus || !cpus->child) {
2523                         printk(KERN_WARNING "Can't find CPU(s) in device tree !\n");
2524                         of_node_put(cpus);
2525                         break;
2526                 }
2527                 np = cpus->child;
2528                 /* Nap mode not supported on SMP */
2529                 if (np->sibling) {
2530                         of_node_put(cpus);
2531                         break;
2532                 }
2533                 /* Nap mode not supported if flush-on-lock property is present */
2534                 if (of_get_property(np, "flush-on-lock", NULL)) {
2535                         of_node_put(cpus);
2536                         break;
2537                 }
2538                 of_node_put(cpus);
2539                 powersave_nap = 1;
2540                 printk(KERN_DEBUG "Processor NAP mode on idle enabled.\n");
2541                 break;
2542         }
2543 
2544         /* On CPUs that support it (750FX), lowspeed by default during
2545          * NAP mode
2546          */
2547         powersave_lowspeed = 1;
2548 
2549 #else /* CONFIG_PPC64 */
2550         powersave_nap = 1;
2551 #endif  /* CONFIG_PPC64 */
2552 
2553         /* Check for "mobile" machine */
2554         if (model && (strncmp(model, "PowerBook", 9) == 0
2555                    || strncmp(model, "iBook", 5) == 0))
2556                 pmac_mb.board_flags |= PMAC_MB_MOBILE;
2557 
2558 
2559         printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name);
2560 done:
2561         of_node_put(dt);
2562         return ret;
2563 }
2564 
2565 /* Initialize the Core99 UniNorth host bridge and memory controller
2566  */
2567 static void __init probe_uninorth(void)
2568 {
2569         const u32 *addrp;
2570         phys_addr_t address;
2571         unsigned long actrl;
2572 
2573         /* Locate core99 Uni-N */
2574         uninorth_node = of_find_node_by_name(NULL, "uni-n");
2575         uninorth_maj = 1;
2576 
2577         /* Locate G5 u3 */
2578         if (uninorth_node == NULL) {
2579                 uninorth_node = of_find_node_by_name(NULL, "u3");
2580                 uninorth_maj = 3;
2581         }
2582         /* Locate G5 u4 */
2583         if (uninorth_node == NULL) {
2584                 uninorth_node = of_find_node_by_name(NULL, "u4");
2585                 uninorth_maj = 4;
2586         }
2587         if (uninorth_node == NULL) {
2588                 uninorth_maj = 0;
2589                 return;
2590         }
2591 
2592         addrp = of_get_property(uninorth_node, "reg", NULL);
2593         if (addrp == NULL)
2594                 return;
2595         address = of_translate_address(uninorth_node, addrp);
2596         if (address == 0)
2597                 return;
2598         uninorth_base = ioremap(address, 0x40000);
2599         if (uninorth_base == NULL)
2600                 return;
2601         uninorth_rev = in_be32(UN_REG(UNI_N_VERSION));
2602         if (uninorth_maj == 3 || uninorth_maj == 4) {
2603                 u3_ht_base = ioremap(address + U3_HT_CONFIG_BASE, 0x1000);
2604                 if (u3_ht_base == NULL) {
2605                         iounmap(uninorth_base);
2606                         return;
2607                 }
2608         }
2609 
2610         printk(KERN_INFO "Found %s memory controller & host bridge"
2611                " @ 0x%08x revision: 0x%02x\n", uninorth_maj == 3 ? "U3" :
2612                uninorth_maj == 4 ? "U4" : "UniNorth",
2613                (unsigned int)address, uninorth_rev);
2614         printk(KERN_INFO "Mapped at 0x%08lx\n", (unsigned long)uninorth_base);
2615 
2616         /* Set the arbitrer QAck delay according to what Apple does
2617          */
2618         if (uninorth_rev < 0x11) {
2619                 actrl = UN_IN(UNI_N_ARB_CTRL) & ~UNI_N_ARB_CTRL_QACK_DELAY_MASK;
2620                 actrl |= ((uninorth_rev < 3) ? UNI_N_ARB_CTRL_QACK_DELAY105 :
2621                         UNI_N_ARB_CTRL_QACK_DELAY) <<
2622                         UNI_N_ARB_CTRL_QACK_DELAY_SHIFT;
2623                 UN_OUT(UNI_N_ARB_CTRL, actrl);
2624         }
2625 
2626         /* Some more magic as done by them in recent MacOS X on UniNorth
2627          * revs 1.5 to 2.O and Pangea. Seem to toggle the UniN Maxbus/PCI
2628          * memory timeout
2629          */
2630         if ((uninorth_rev >= 0x11 && uninorth_rev <= 0x24) ||
2631             uninorth_rev == 0xc0)
2632                 UN_OUT(0x2160, UN_IN(0x2160) & 0x00ffffff);
2633 }
2634 
2635 static void __init probe_one_macio(const char *name, const char *compat, int type)
2636 {
2637         struct device_node*     node;
2638         int                     i;
2639         volatile u32 __iomem    *base;
2640         const u32               *addrp, *revp;
2641         phys_addr_t             addr;
2642         u64                     size;
2643 
2644         for (node = NULL; (node = of_find_node_by_name(node, name)) != NULL;) {
2645                 if (!compat)
2646                         break;
2647                 if (of_device_is_compatible(node, compat))
2648                         break;
2649         }
2650         if (!node)
2651                 return;
2652         for(i=0; i<MAX_MACIO_CHIPS; i++) {
2653                 if (!macio_chips[i].of_node)
2654                         break;
2655                 if (macio_chips[i].of_node == node)
2656                         return;
2657         }
2658 
2659         if (i >= MAX_MACIO_CHIPS) {
2660                 printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n");
2661                 printk(KERN_ERR "pmac_feature: %pOF skipped\n", node);
2662                 return;
2663         }
2664         addrp = of_get_pci_address(node, 0, &size, NULL);
2665         if (addrp == NULL) {
2666                 printk(KERN_ERR "pmac_feature: %pOF: can't find base !\n",
2667                        node);
2668                 return;
2669         }
2670         addr = of_translate_address(node, addrp);
2671         if (addr == 0) {
2672                 printk(KERN_ERR "pmac_feature: %pOF, can't translate base !\n",
2673                        node);
2674                 return;
2675         }
2676         base = ioremap(addr, (unsigned long)size);
2677         if (!base) {
2678                 printk(KERN_ERR "pmac_feature: %pOF, can't map mac-io chip !\n",
2679                        node);
2680                 return;
2681         }
2682         if (type == macio_keylargo || type == macio_keylargo2) {
2683                 const u32 *did = of_get_property(node, "device-id", NULL);
2684                 if (*did == 0x00000025)
2685                         type = macio_pangea;
2686                 if (*did == 0x0000003e)
2687                         type = macio_intrepid;
2688                 if (*did == 0x0000004f)
2689                         type = macio_shasta;
2690         }
2691         macio_chips[i].of_node  = node;
2692         macio_chips[i].type     = type;
2693         macio_chips[i].base     = base;
2694         macio_chips[i].flags    = MACIO_FLAG_SCCA_ON | MACIO_FLAG_SCCB_ON;
2695         macio_chips[i].name     = macio_names[type];
2696         revp = of_get_property(node, "revision-id", NULL);
2697         if (revp)
2698                 macio_chips[i].rev = *revp;
2699         printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n",
2700                 macio_names[type], macio_chips[i].rev, macio_chips[i].base);
2701 }
2702 
2703 static int __init
2704 probe_macios(void)
2705 {
2706         /* Warning, ordering is important */
2707         probe_one_macio("gc", NULL, macio_grand_central);
2708         probe_one_macio("ohare", NULL, macio_ohare);
2709         probe_one_macio("pci106b,7", NULL, macio_ohareII);
2710         probe_one_macio("mac-io", "keylargo", macio_keylargo);
2711         probe_one_macio("mac-io", "paddington", macio_paddington);
2712         probe_one_macio("mac-io", "gatwick", macio_gatwick);
2713         probe_one_macio("mac-io", "heathrow", macio_heathrow);
2714         probe_one_macio("mac-io", "K2-Keylargo", macio_keylargo2);
2715 
2716         /* Make sure the "main" macio chip appear first */
2717         if (macio_chips[0].type == macio_gatwick
2718             && macio_chips[1].type == macio_heathrow) {
2719                 struct macio_chip temp = macio_chips[0];
2720                 macio_chips[0] = macio_chips[1];
2721                 macio_chips[1] = temp;
2722         }
2723         if (macio_chips[0].type == macio_ohareII
2724             && macio_chips[1].type == macio_ohare) {
2725                 struct macio_chip temp = macio_chips[0];
2726                 macio_chips[0] = macio_chips[1];
2727                 macio_chips[1] = temp;
2728         }
2729         macio_chips[0].lbus.index = 0;
2730         macio_chips[1].lbus.index = 1;
2731 
2732         return (macio_chips[0].of_node == NULL) ? -ENODEV : 0;
2733 }
2734 
2735 static void __init
2736 initial_serial_shutdown(struct device_node *np)
2737 {
2738         int len;
2739         const struct slot_names_prop {
2740                 int     count;
2741                 char    name[1];
2742         } *slots;
2743         const char *conn;
2744         int port_type = PMAC_SCC_ASYNC;
2745         int modem = 0;
2746 
2747         slots = of_get_property(np, "slot-names", &len);
2748         conn = of_get_property(np, "AAPL,connector", &len);
2749         if (conn && (strcmp(conn, "infrared") == 0))
2750                 port_type = PMAC_SCC_IRDA;
2751         else if (of_device_is_compatible(np, "cobalt"))
2752                 modem = 1;
2753         else if (slots && slots->count > 0) {
2754                 if (strcmp(slots->name, "IrDA") == 0)
2755                         port_type = PMAC_SCC_IRDA;
2756                 else if (strcmp(slots->name, "Modem") == 0)
2757                         modem = 1;
2758         }
2759         if (modem)
2760                 pmac_call_feature(PMAC_FTR_MODEM_ENABLE, np, 0, 0);
2761         pmac_call_feature(PMAC_FTR_SCC_ENABLE, np, port_type, 0);
2762 }
2763 
2764 static void __init
2765 set_initial_features(void)
2766 {
2767         struct device_node *np;
2768 
2769         /* That hack appears to be necessary for some StarMax motherboards
2770          * but I'm not too sure it was audited for side-effects on other
2771          * ohare based machines...
2772          * Since I still have difficulties figuring the right way to
2773          * differentiate them all and since that hack was there for a long
2774          * time, I'll keep it around
2775          */
2776         if (macio_chips[0].type == macio_ohare) {
2777                 struct macio_chip *macio = &macio_chips[0];
2778                 np = of_find_node_by_name(NULL, "via-pmu");
2779                 if (np)
2780                         MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
2781                 else
2782                         MACIO_OUT32(OHARE_FCR, STARMAX_FEATURES);
2783                 of_node_put(np);
2784         } else if (macio_chips[1].type == macio_ohare) {
2785                 struct macio_chip *macio = &macio_chips[1];
2786                 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
2787         }
2788 
2789 #ifdef CONFIG_PPC64
2790         if (macio_chips[0].type == macio_keylargo2 ||
2791             macio_chips[0].type == macio_shasta) {
2792 #ifndef CONFIG_SMP
2793                 /* On SMP machines running UP, we have the second CPU eating
2794                  * bus cycles. We need to take it off the bus. This is done
2795                  * from pmac_smp for SMP kernels running on one CPU
2796                  */
2797                 np = of_find_node_by_type(NULL, "cpu");
2798                 if (np != NULL)
2799                         np = of_find_node_by_type(np, "cpu");
2800                 if (np != NULL) {
2801                         g5_phy_disable_cpu1();
2802                         of_node_put(np);
2803                 }
2804 #endif /* CONFIG_SMP */
2805                 /* Enable GMAC for now for PCI probing. It will be disabled
2806                  * later on after PCI probe
2807                  */
2808                 for_each_node_by_name(np, "ethernet")
2809                         if (of_device_is_compatible(np, "K2-GMAC"))
2810                                 g5_gmac_enable(np, 0, 1);
2811 
2812                 /* Enable FW before PCI probe. Will be disabled later on
2813                  * Note: We should have a batter way to check that we are
2814                  * dealing with uninorth internal cell and not a PCI cell
2815                  * on the external PCI. The code below works though.
2816                  */
2817                 for_each_node_by_name(np, "firewire") {
2818                         if (of_device_is_compatible(np, "pci106b,5811")) {
2819                                 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
2820                                 g5_fw_enable(np, 0, 1);
2821                         }
2822                 }
2823         }
2824 #else /* CONFIG_PPC64 */
2825 
2826         if (macio_chips[0].type == macio_keylargo ||
2827             macio_chips[0].type == macio_pangea ||
2828             macio_chips[0].type == macio_intrepid) {
2829                 /* Enable GMAC for now for PCI probing. It will be disabled
2830                  * later on after PCI probe
2831                  */
2832                 for_each_node_by_name(np, "ethernet") {
2833                         if (np->parent
2834                             && of_device_is_compatible(np->parent, "uni-north")
2835                             && of_device_is_compatible(np, "gmac"))
2836                                 core99_gmac_enable(np, 0, 1);
2837                 }
2838 
2839                 /* Enable FW before PCI probe. Will be disabled later on
2840                  * Note: We should have a batter way to check that we are
2841                  * dealing with uninorth internal cell and not a PCI cell
2842                  * on the external PCI. The code below works though.
2843                  */
2844                 for_each_node_by_name(np, "firewire") {
2845                         if (np->parent
2846                             && of_device_is_compatible(np->parent, "uni-north")
2847                             && (of_device_is_compatible(np, "pci106b,18") ||
2848                                 of_device_is_compatible(np, "pci106b,30") ||
2849                                 of_device_is_compatible(np, "pci11c1,5811"))) {
2850                                 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
2851                                 core99_firewire_enable(np, 0, 1);
2852                         }
2853                 }
2854 
2855                 /* Enable ATA-100 before PCI probe. */
2856                 np = of_find_node_by_name(NULL, "ata-6");
2857                 for_each_node_by_name(np, "ata-6") {
2858                         if (np->parent
2859                             && of_device_is_compatible(np->parent, "uni-north")
2860                             && of_device_is_compatible(np, "kauai-ata")) {
2861                                 core99_ata100_enable(np, 1);
2862                         }
2863                 }
2864 
2865                 /* Switch airport off */
2866                 for_each_node_by_name(np, "radio") {
2867                         if (np->parent == macio_chips[0].of_node) {
2868                                 macio_chips[0].flags |= MACIO_FLAG_AIRPORT_ON;
2869                                 core99_airport_enable(np, 0, 0);
2870                         }
2871                 }
2872         }
2873 
2874         /* On all machines that support sound PM, switch sound off */
2875         if (macio_chips[0].of_node)
2876                 pmac_do_feature_call(PMAC_FTR_SOUND_CHIP_ENABLE,
2877                         macio_chips[0].of_node, 0, 0);
2878 
2879         /* While on some desktop G3s, we turn it back on */
2880         if (macio_chips[0].of_node && macio_chips[0].type == macio_heathrow
2881                 && (pmac_mb.model_id == PMAC_TYPE_GOSSAMER ||
2882                     pmac_mb.model_id == PMAC_TYPE_SILK)) {
2883                 struct macio_chip *macio = &macio_chips[0];
2884                 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
2885                 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
2886         }
2887 
2888 #endif /* CONFIG_PPC64 */
2889 
2890         /* On all machines, switch modem & serial ports off */
2891         for_each_node_by_name(np, "ch-a")
2892                 initial_serial_shutdown(np);
2893         of_node_put(np);
2894         for_each_node_by_name(np, "ch-b")
2895                 initial_serial_shutdown(np);
2896         of_node_put(np);
2897 }
2898 
2899 void __init
2900 pmac_feature_init(void)
2901 {
2902         /* Detect the UniNorth memory controller */
2903         probe_uninorth();
2904 
2905         /* Probe mac-io controllers */
2906         if (probe_macios()) {
2907                 printk(KERN_WARNING "No mac-io chip found\n");
2908                 return;
2909         }
2910 
2911         /* Probe machine type */
2912         if (probe_motherboard())
2913                 printk(KERN_WARNING "Unknown PowerMac !\n");
2914 
2915         /* Set some initial features (turn off some chips that will
2916          * be later turned on)
2917          */
2918         set_initial_features();
2919 }
2920 
2921 #if 0
2922 static void dump_HT_speeds(char *name, u32 cfg, u32 frq)
2923 {
2924         int     freqs[16] = { 200,300,400,500,600,800,1000,0,0,0,0,0,0,0,0,0 };
2925         int     bits[8] = { 8,16,0,32,2,4,0,0 };
2926         int     freq = (frq >> 8) & 0xf;
2927 
2928         if (freqs[freq] == 0)
2929                 printk("%s: Unknown HT link frequency %x\n", name, freq);
2930         else
2931                 printk("%s: %d MHz on main link, (%d in / %d out) bits width\n",
2932                        name, freqs[freq],
2933                        bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]);
2934 }
2935 
2936 void __init pmac_check_ht_link(void)
2937 {
2938         u32     ufreq, freq, ucfg, cfg;
2939         struct device_node *pcix_node;
2940         u8      px_bus, px_devfn;
2941         struct pci_controller *px_hose;
2942 
2943         (void)in_be32(u3_ht_base + U3_HT_LINK_COMMAND);
2944         ucfg = cfg = in_be32(u3_ht_base + U3_HT_LINK_CONFIG);
2945         ufreq = freq = in_be32(u3_ht_base + U3_HT_LINK_FREQ);
2946         dump_HT_speeds("U3 HyperTransport", cfg, freq);
2947 
2948         pcix_node = of_find_compatible_node(NULL, "pci", "pci-x");
2949         if (pcix_node == NULL) {
2950                 printk("No PCI-X bridge found\n");
2951                 return;
2952         }
2953         if (pci_device_from_OF_node(pcix_node, &px_bus, &px_devfn) != 0) {
2954                 printk("PCI-X bridge found but not matched to pci\n");
2955                 return;
2956         }
2957         px_hose = pci_find_hose_for_OF_device(pcix_node);
2958         if (px_hose == NULL) {
2959                 printk("PCI-X bridge found but not matched to host\n");
2960                 return;
2961         }       
2962         early_read_config_dword(px_hose, px_bus, px_devfn, 0xc4, &cfg);
2963         early_read_config_dword(px_hose, px_bus, px_devfn, 0xcc, &freq);
2964         dump_HT_speeds("PCI-X HT Uplink", cfg, freq);
2965         early_read_config_dword(px_hose, px_bus, px_devfn, 0xc8, &cfg);
2966         early_read_config_dword(px_hose, px_bus, px_devfn, 0xd0, &freq);
2967         dump_HT_speeds("PCI-X HT Downlink", cfg, freq);
2968 }
2969 #endif /* 0 */
2970 
2971 /*
2972  * Early video resume hook
2973  */
2974 
2975 static void (*pmac_early_vresume_proc)(void *data);
2976 static void *pmac_early_vresume_data;
2977 
2978 void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
2979 {
2980         if (!machine_is(powermac))
2981                 return;
2982         preempt_disable();
2983         pmac_early_vresume_proc = proc;
2984         pmac_early_vresume_data = data;
2985         preempt_enable();
2986 }
2987 EXPORT_SYMBOL(pmac_set_early_video_resume);
2988 
2989 void pmac_call_early_video_resume(void)
2990 {
2991         if (pmac_early_vresume_proc)
2992                 pmac_early_vresume_proc(pmac_early_vresume_data);
2993 }
2994 
2995 /*
2996  * AGP related suspend/resume code
2997  */
2998 
2999 static struct pci_dev *pmac_agp_bridge;
3000 static int (*pmac_agp_suspend)(struct pci_dev *bridge);
3001 static int (*pmac_agp_resume)(struct pci_dev *bridge);
3002 
3003 void pmac_register_agp_pm(struct pci_dev *bridge,
3004                                  int (*suspend)(struct pci_dev *bridge),
3005                                  int (*resume)(struct pci_dev *bridge))
3006 {
3007         if (suspend || resume) {
3008                 pmac_agp_bridge = bridge;
3009                 pmac_agp_suspend = suspend;
3010                 pmac_agp_resume = resume;
3011                 return;
3012         }
3013         if (bridge != pmac_agp_bridge)
3014                 return;
3015         pmac_agp_suspend = pmac_agp_resume = NULL;
3016         return;
3017 }
3018 EXPORT_SYMBOL(pmac_register_agp_pm);
3019 
3020 void pmac_suspend_agp_for_card(struct pci_dev *dev)
3021 {
3022         if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL)
3023                 return;
3024         if (pmac_agp_bridge->bus != dev->bus)
3025                 return;
3026         pmac_agp_suspend(pmac_agp_bridge);
3027 }
3028 EXPORT_SYMBOL(pmac_suspend_agp_for_card);
3029 
3030 void pmac_resume_agp_for_card(struct pci_dev *dev)
3031 {
3032         if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL)
3033                 return;
3034         if (pmac_agp_bridge->bus != dev->bus)
3035                 return;
3036         pmac_agp_resume(pmac_agp_bridge);
3037 }
3038 EXPORT_SYMBOL(pmac_resume_agp_for_card);
3039 
3040 int pmac_get_uninorth_variant(void)
3041 {
3042         return uninorth_maj;
3043 }
3044 

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