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Linux/arch/unicore32/kernel/fpu-ucf64.c

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  1 /*
  2  * linux/arch/unicore32/kernel/fpu-ucf64.c
  3  *
  4  * Code specific to PKUnity SoC and UniCore ISA
  5  *
  6  * Copyright (C) 2001-2010 GUAN Xue-tao
  7  *
  8  * This program is free software; you can redistribute it and/or modify
  9  * it under the terms of the GNU General Public License version 2 as
 10  * published by the Free Software Foundation.
 11  */
 12 #include <linux/module.h>
 13 #include <linux/types.h>
 14 #include <linux/kernel.h>
 15 #include <linux/signal.h>
 16 #include <linux/sched/signal.h>
 17 #include <linux/init.h>
 18 
 19 #include <asm/fpu-ucf64.h>
 20 
 21 /*
 22  * A special flag to tell the normalisation code not to normalise.
 23  */
 24 #define F64_NAN_FLAG    0x100
 25 
 26 /*
 27  * A bit pattern used to indicate the initial (unset) value of the
 28  * exception mask, in case nothing handles an instruction.  This
 29  * doesn't include the NAN flag, which get masked out before
 30  * we check for an error.
 31  */
 32 #define F64_EXCEPTION_ERROR     ((u32)-1 & ~F64_NAN_FLAG)
 33 
 34 /*
 35  * Since we aren't building with -mfpu=f64, we need to code
 36  * these instructions using their MRC/MCR equivalents.
 37  */
 38 #define f64reg(_f64_) #_f64_
 39 
 40 #define cff(_f64_) ({                   \
 41         u32 __v;                        \
 42         asm("cff %0, " f64reg(_f64_) "@ fmrx    %0, " #_f64_    \
 43             : "=r" (__v) : : "cc");     \
 44         __v;                            \
 45         })
 46 
 47 #define ctf(_f64_, _var_)               \
 48         asm("ctf %0, " f64reg(_f64_) "@ fmxr    " #_f64_ ", %0" \
 49            : : "r" (_var_) : "cc")
 50 
 51 /*
 52  * Raise a SIGFPE for the current process.
 53  * sicode describes the signal being raised.
 54  */
 55 void ucf64_raise_sigfpe(struct pt_regs *regs)
 56 {
 57         /*
 58          * This is the same as NWFPE, because it's not clear what
 59          * this is used for
 60          */
 61         current->thread.error_code = 0;
 62         current->thread.trap_no = 6;
 63 
 64         send_sig_fault(SIGFPE, FPE_FLTUNK,
 65                        (void __user *)(instruction_pointer(regs) - 4),
 66                        current);
 67 }
 68 
 69 /*
 70  * Handle exceptions of UniCore-F64.
 71  */
 72 void ucf64_exchandler(u32 inst, u32 fpexc, struct pt_regs *regs)
 73 {
 74         u32 tmp = fpexc;
 75         u32 exc = F64_EXCEPTION_ERROR & fpexc;
 76 
 77         pr_debug("UniCore-F64: instruction %08x fpscr %08x\n",
 78                         inst, fpexc);
 79 
 80         if (exc & FPSCR_CMPINSTR_BIT) {
 81                 if (exc & FPSCR_CON)
 82                         tmp |= FPSCR_CON;
 83                 else
 84                         tmp &= ~(FPSCR_CON);
 85                 exc &= ~(FPSCR_CMPINSTR_BIT | FPSCR_CON);
 86         } else {
 87                 pr_debug("UniCore-F64 Error: unhandled exceptions\n");
 88                 pr_debug("UniCore-F64 FPSCR 0x%08x INST 0x%08x\n",
 89                                 cff(FPSCR), inst);
 90 
 91                 ucf64_raise_sigfpe(regs);
 92                 return;
 93         }
 94 
 95         /*
 96          * Update the FPSCR with the additional exception flags.
 97          * Comparison instructions always return at least one of
 98          * these flags set.
 99          */
100         tmp &= ~(FPSCR_TRAP | FPSCR_IOS | FPSCR_OFS | FPSCR_UFS |
101                         FPSCR_IXS | FPSCR_HIS | FPSCR_IOC | FPSCR_OFC |
102                         FPSCR_UFC | FPSCR_IXC | FPSCR_HIC);
103 
104         tmp |= exc;
105         ctf(FPSCR, tmp);
106 }
107 
108 /*
109  * F64 support code initialisation.
110  */
111 static int __init ucf64_init(void)
112 {
113         ctf(FPSCR, 0x0);     /* FPSCR_UFE | FPSCR_NDE perhaps better */
114 
115         printk(KERN_INFO "Enable UniCore-F64 support.\n");
116 
117         return 0;
118 }
119 
120 late_initcall(ucf64_init);
121 

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