~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

TOMOYO Linux Cross Reference
Linux/arch/x86/include/asm/io.h

Version: ~ [ linux-5.16 ] ~ [ linux-5.15.13 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.90 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.170 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.224 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.261 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.296 ] ~ [ linux-4.8.17 ] ~ [ linux-4.7.10 ] ~ [ linux-4.6.7 ] ~ [ linux-4.5.7 ] ~ [ linux-4.4.298 ] ~ [ linux-4.3.6 ] ~ [ linux-4.2.8 ] ~ [ linux-4.1.52 ] ~ [ linux-4.0.9 ] ~ [ linux-3.18.140 ] ~ [ linux-3.16.85 ] ~ [ linux-3.14.79 ] ~ [ linux-3.12.74 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.5 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 #ifndef _ASM_X86_IO_H
  2 #define _ASM_X86_IO_H
  3 
  4 /*
  5  * This file contains the definitions for the x86 IO instructions
  6  * inb/inw/inl/outb/outw/outl and the "string versions" of the same
  7  * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
  8  * versions of the single-IO instructions (inb_p/inw_p/..).
  9  *
 10  * This file is not meant to be obfuscating: it's just complicated
 11  * to (a) handle it all in a way that makes gcc able to optimize it
 12  * as well as possible and (b) trying to avoid writing the same thing
 13  * over and over again with slight variations and possibly making a
 14  * mistake somewhere.
 15  */
 16 
 17 /*
 18  * Thanks to James van Artsdalen for a better timing-fix than
 19  * the two short jumps: using outb's to a nonexistent port seems
 20  * to guarantee better timings even on fast machines.
 21  *
 22  * On the other hand, I'd like to be sure of a non-existent port:
 23  * I feel a bit unsafe about using 0x80 (should be safe, though)
 24  *
 25  *              Linus
 26  */
 27 
 28  /*
 29   *  Bit simplified and optimized by Jan Hubicka
 30   *  Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
 31   *
 32   *  isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
 33   *  isa_read[wl] and isa_write[wl] fixed
 34   *  - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
 35   */
 36 
 37 #define ARCH_HAS_IOREMAP_WC
 38 #define ARCH_HAS_IOREMAP_WT
 39 
 40 #include <linux/string.h>
 41 #include <linux/compiler.h>
 42 #include <asm/page.h>
 43 #include <asm/early_ioremap.h>
 44 #include <asm/pgtable_types.h>
 45 
 46 #define build_mmio_read(name, size, type, reg, barrier) \
 47 static inline type name(const volatile void __iomem *addr) \
 48 { type ret; asm volatile("mov" size " %1,%0":reg (ret) \
 49 :"m" (*(volatile type __force *)addr) barrier); return ret; }
 50 
 51 #define build_mmio_write(name, size, type, reg, barrier) \
 52 static inline void name(type val, volatile void __iomem *addr) \
 53 { asm volatile("mov" size " %0,%1": :reg (val), \
 54 "m" (*(volatile type __force *)addr) barrier); }
 55 
 56 build_mmio_read(readb, "b", unsigned char, "=q", :"memory")
 57 build_mmio_read(readw, "w", unsigned short, "=r", :"memory")
 58 build_mmio_read(readl, "l", unsigned int, "=r", :"memory")
 59 
 60 build_mmio_read(__readb, "b", unsigned char, "=q", )
 61 build_mmio_read(__readw, "w", unsigned short, "=r", )
 62 build_mmio_read(__readl, "l", unsigned int, "=r", )
 63 
 64 build_mmio_write(writeb, "b", unsigned char, "q", :"memory")
 65 build_mmio_write(writew, "w", unsigned short, "r", :"memory")
 66 build_mmio_write(writel, "l", unsigned int, "r", :"memory")
 67 
 68 build_mmio_write(__writeb, "b", unsigned char, "q", )
 69 build_mmio_write(__writew, "w", unsigned short, "r", )
 70 build_mmio_write(__writel, "l", unsigned int, "r", )
 71 
 72 #define readb_relaxed(a) __readb(a)
 73 #define readw_relaxed(a) __readw(a)
 74 #define readl_relaxed(a) __readl(a)
 75 #define __raw_readb __readb
 76 #define __raw_readw __readw
 77 #define __raw_readl __readl
 78 
 79 #define writeb_relaxed(v, a) __writeb(v, a)
 80 #define writew_relaxed(v, a) __writew(v, a)
 81 #define writel_relaxed(v, a) __writel(v, a)
 82 #define __raw_writeb __writeb
 83 #define __raw_writew __writew
 84 #define __raw_writel __writel
 85 
 86 #define mmiowb() barrier()
 87 
 88 #ifdef CONFIG_X86_64
 89 
 90 build_mmio_read(readq, "q", unsigned long, "=r", :"memory")
 91 build_mmio_write(writeq, "q", unsigned long, "r", :"memory")
 92 
 93 #define readq_relaxed(a)        readq(a)
 94 #define writeq_relaxed(v, a)    writeq(v, a)
 95 
 96 #define __raw_readq(a)          readq(a)
 97 #define __raw_writeq(val, addr) writeq(val, addr)
 98 
 99 /* Let people know that we have them */
100 #define readq                   readq
101 #define writeq                  writeq
102 
103 #endif
104 
105 /**
106  *      virt_to_phys    -       map virtual addresses to physical
107  *      @address: address to remap
108  *
109  *      The returned physical address is the physical (CPU) mapping for
110  *      the memory address given. It is only valid to use this function on
111  *      addresses directly mapped or allocated via kmalloc.
112  *
113  *      This function does not give bus mappings for DMA transfers. In
114  *      almost all conceivable cases a device driver should not be using
115  *      this function
116  */
117 
118 static inline phys_addr_t virt_to_phys(volatile void *address)
119 {
120         return __pa(address);
121 }
122 
123 /**
124  *      phys_to_virt    -       map physical address to virtual
125  *      @address: address to remap
126  *
127  *      The returned virtual address is a current CPU mapping for
128  *      the memory address given. It is only valid to use this function on
129  *      addresses that have a kernel mapping
130  *
131  *      This function does not handle bus mappings for DMA transfers. In
132  *      almost all conceivable cases a device driver should not be using
133  *      this function
134  */
135 
136 static inline void *phys_to_virt(phys_addr_t address)
137 {
138         return __va(address);
139 }
140 
141 /*
142  * Change "struct page" to physical address.
143  */
144 #define page_to_phys(page)    ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
145 
146 /*
147  * ISA I/O bus memory addresses are 1:1 with the physical address.
148  * However, we truncate the address to unsigned int to avoid undesirable
149  * promitions in legacy drivers.
150  */
151 static inline unsigned int isa_virt_to_bus(volatile void *address)
152 {
153         return (unsigned int)virt_to_phys(address);
154 }
155 #define isa_page_to_bus(page)   ((unsigned int)page_to_phys(page))
156 #define isa_bus_to_virt         phys_to_virt
157 
158 /*
159  * However PCI ones are not necessarily 1:1 and therefore these interfaces
160  * are forbidden in portable PCI drivers.
161  *
162  * Allow them on x86 for legacy drivers, though.
163  */
164 #define virt_to_bus virt_to_phys
165 #define bus_to_virt phys_to_virt
166 
167 /*
168  * The default ioremap() behavior is non-cached; if you need something
169  * else, you probably want one of the following.
170  */
171 extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
172 extern void __iomem *ioremap_uc(resource_size_t offset, unsigned long size);
173 #define ioremap_uc ioremap_uc
174 
175 extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
176 extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size, unsigned long prot_val);
177 
178 /**
179  * ioremap     -   map bus memory into CPU space
180  * @offset:    bus address of the memory
181  * @size:      size of the resource to map
182  *
183  * ioremap performs a platform specific sequence of operations to
184  * make bus memory CPU accessible via the readb/readw/readl/writeb/
185  * writew/writel functions and the other mmio helpers. The returned
186  * address is not guaranteed to be usable directly as a virtual
187  * address.
188  *
189  * If the area you are trying to map is a PCI BAR you should have a
190  * look at pci_iomap().
191  */
192 static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
193 {
194         return ioremap_nocache(offset, size);
195 }
196 
197 extern void iounmap(volatile void __iomem *addr);
198 
199 extern void set_iounmap_nonlazy(void);
200 
201 #ifdef __KERNEL__
202 
203 #include <asm-generic/iomap.h>
204 
205 /*
206  * Convert a virtual cached pointer to an uncached pointer
207  */
208 #define xlate_dev_kmem_ptr(p)   p
209 
210 /**
211  * memset_io    Set a range of I/O memory to a constant value
212  * @addr:       The beginning of the I/O-memory range to set
213  * @val:        The value to set the memory to
214  * @count:      The number of bytes to set
215  *
216  * Set a range of I/O memory to a given value.
217  */
218 static inline void
219 memset_io(volatile void __iomem *addr, unsigned char val, size_t count)
220 {
221         memset((void __force *)addr, val, count);
222 }
223 
224 /**
225  * memcpy_fromio        Copy a block of data from I/O memory
226  * @dst:                The (RAM) destination for the copy
227  * @src:                The (I/O memory) source for the data
228  * @count:              The number of bytes to copy
229  *
230  * Copy a block of data from I/O memory.
231  */
232 static inline void
233 memcpy_fromio(void *dst, const volatile void __iomem *src, size_t count)
234 {
235         memcpy(dst, (const void __force *)src, count);
236 }
237 
238 /**
239  * memcpy_toio          Copy a block of data into I/O memory
240  * @dst:                The (I/O memory) destination for the copy
241  * @src:                The (RAM) source for the data
242  * @count:              The number of bytes to copy
243  *
244  * Copy a block of data to I/O memory.
245  */
246 static inline void
247 memcpy_toio(volatile void __iomem *dst, const void *src, size_t count)
248 {
249         memcpy((void __force *)dst, src, count);
250 }
251 
252 /*
253  * ISA space is 'always mapped' on a typical x86 system, no need to
254  * explicitly ioremap() it. The fact that the ISA IO space is mapped
255  * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
256  * are physical addresses. The following constant pointer can be
257  * used as the IO-area pointer (it can be iounmapped as well, so the
258  * analogy with PCI is quite large):
259  */
260 #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
261 
262 /*
263  *      Cache management
264  *
265  *      This needed for two cases
266  *      1. Out of order aware processors
267  *      2. Accidentally out of order processors (PPro errata #51)
268  */
269 
270 static inline void flush_write_buffers(void)
271 {
272 #if defined(CONFIG_X86_PPRO_FENCE)
273         asm volatile("lock; addl $0,0(%%esp)": : :"memory");
274 #endif
275 }
276 
277 #endif /* __KERNEL__ */
278 
279 extern void native_io_delay(void);
280 
281 extern int io_delay_type;
282 extern void io_delay_init(void);
283 
284 #if defined(CONFIG_PARAVIRT)
285 #include <asm/paravirt.h>
286 #else
287 
288 static inline void slow_down_io(void)
289 {
290         native_io_delay();
291 #ifdef REALLY_SLOW_IO
292         native_io_delay();
293         native_io_delay();
294         native_io_delay();
295 #endif
296 }
297 
298 #endif
299 
300 #define BUILDIO(bwl, bw, type)                                          \
301 static inline void out##bwl(unsigned type value, int port)              \
302 {                                                                       \
303         asm volatile("out" #bwl " %" #bw "0, %w1"                       \
304                      : : "a"(value), "Nd"(port));                       \
305 }                                                                       \
306                                                                         \
307 static inline unsigned type in##bwl(int port)                           \
308 {                                                                       \
309         unsigned type value;                                            \
310         asm volatile("in" #bwl " %w1, %" #bw ""                        \
311                      : "=a"(value) : "Nd"(port));                       \
312         return value;                                                   \
313 }                                                                       \
314                                                                         \
315 static inline void out##bwl##_p(unsigned type value, int port)          \
316 {                                                                       \
317         out##bwl(value, port);                                          \
318         slow_down_io();                                                 \
319 }                                                                       \
320                                                                         \
321 static inline unsigned type in##bwl##_p(int port)                       \
322 {                                                                       \
323         unsigned type value = in##bwl(port);                            \
324         slow_down_io();                                                 \
325         return value;                                                   \
326 }                                                                       \
327                                                                         \
328 static inline void outs##bwl(int port, const void *addr, unsigned long count) \
329 {                                                                       \
330         asm volatile("rep; outs" #bwl                                   \
331                      : "+S"(addr), "+c"(count) : "d"(port) : "memory"); \
332 }                                                                       \
333                                                                         \
334 static inline void ins##bwl(int port, void *addr, unsigned long count)  \
335 {                                                                       \
336         asm volatile("rep; ins" #bwl                                    \
337                      : "+D"(addr), "+c"(count) : "d"(port) : "memory"); \
338 }
339 
340 BUILDIO(b, b, char)
341 BUILDIO(w, w, short)
342 BUILDIO(l, , int)
343 
344 extern void *xlate_dev_mem_ptr(phys_addr_t phys);
345 extern void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr);
346 
347 extern int ioremap_change_attr(unsigned long vaddr, unsigned long size,
348                                 enum page_cache_mode pcm);
349 extern void __iomem *ioremap_wc(resource_size_t offset, unsigned long size);
350 extern void __iomem *ioremap_wt(resource_size_t offset, unsigned long size);
351 
352 extern bool is_early_ioremap_ptep(pte_t *ptep);
353 
354 #ifdef CONFIG_XEN
355 #include <xen/xen.h>
356 struct bio_vec;
357 
358 extern bool xen_biovec_phys_mergeable(const struct bio_vec *vec1,
359                                       const struct bio_vec *vec2);
360 
361 #define BIOVEC_PHYS_MERGEABLE(vec1, vec2)                               \
362         (__BIOVEC_PHYS_MERGEABLE(vec1, vec2) &&                         \
363          (!xen_domain() || xen_biovec_phys_mergeable(vec1, vec2)))
364 #endif  /* CONFIG_XEN */
365 
366 #define IO_SPACE_LIMIT 0xffff
367 
368 #ifdef CONFIG_MTRR
369 extern int __must_check arch_phys_wc_index(int handle);
370 #define arch_phys_wc_index arch_phys_wc_index
371 
372 extern int __must_check arch_phys_wc_add(unsigned long base,
373                                          unsigned long size);
374 extern void arch_phys_wc_del(int handle);
375 #define arch_phys_wc_add arch_phys_wc_add
376 #endif
377 
378 #ifdef CONFIG_X86_PAT
379 extern int arch_io_reserve_memtype_wc(resource_size_t start, resource_size_t size);
380 extern void arch_io_free_memtype_wc(resource_size_t start, resource_size_t size);
381 #define arch_io_reserve_memtype_wc arch_io_reserve_memtype_wc
382 #endif
383 
384 #endif /* _ASM_X86_IO_H */
385 

~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

kernel.org | git.kernel.org | LWN.net | Project Home | Wiki (Japanese) | Wiki (English) | SVN repository | Mail admin

Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.

osdn.jp